binutils-gdb/sim
2022-12-21 00:00:00 -05:00
..
aarch64 sim: aarch64: invert sim_cpu storage 2022-12-21 00:00:00 -05:00
arm sim: sim_cpu: invert sim_cpu storage 2022-12-20 23:57:38 -05:00
avr sim: avr: invert sim_cpu storage 2022-12-21 00:00:00 -05:00
bfin sim: bfin: invert sim_cpu storage 2022-12-21 00:00:00 -05:00
bpf sim: bpf: drop subdir configure logic 2022-11-07 23:25:01 +07:00
common sim: sim_cpu: invert sim_cpu storage 2022-12-20 23:57:38 -05:00
cr16 sim: sim_cpu: invert sim_cpu storage 2022-12-20 23:57:38 -05:00
cris sim: run: move linking into top-level 2022-11-05 20:00:56 +07:00
d10v sim: sim_cpu: invert sim_cpu storage 2022-12-20 23:57:38 -05:00
erc32 sim: build: respect AM_MAKEFLAGS when entering subdirs 2022-11-06 21:48:42 +07:00
example-synacor sim: run: move linking into top-level 2022-11-05 20:00:56 +07:00
frv sim: move register headers into sim/ namespace [PR sim/29869] 2022-12-20 21:06:32 -05:00
ft32 sim: ft32: invert sim_cpu storage 2022-12-21 00:00:00 -05:00
h8300 sim: move register headers into sim/ namespace [PR sim/29869] 2022-12-20 21:06:32 -05:00
igen sim: igen: cleanup archaic pointer-to-long printf casts 2022-11-11 22:08:14 +07:00
iq2000 sim: run: move linking into top-level 2022-11-05 20:00:56 +07:00
lm32 sim: move register headers into sim/ namespace [PR sim/29869] 2022-12-20 21:06:32 -05:00
m4 sim: restore lstat & mkdir func checks 2022-11-10 00:19:45 +07:00
m32c sim: move register headers into sim/ namespace [PR sim/29869] 2022-12-20 21:06:32 -05:00
m32r sim: run: move linking into top-level 2022-11-05 20:00:56 +07:00
m68hc11 sim: dv-core: add hw_detach_address method [PR sim/25211] 2022-12-19 20:31:02 -05:00
mcore sim: run: move linking into top-level 2022-11-05 20:00:56 +07:00
microblaze sim: microblaze: invert sim_cpu storage 2022-12-21 00:00:00 -05:00
mips sim: mips: call Unpredictable instead of setting bogus values [PR sim/29276] 2022-11-08 14:55:50 +07:00
mn10300 sim: sim_cpu: invert sim_cpu storage 2022-12-20 23:57:38 -05:00
moxie sim: moxie: invert sim_cpu storage 2022-12-21 00:00:00 -05:00
msp430 sim: msp430: invert sim_cpu storage 2022-12-21 00:00:00 -05:00
or1k sim: or1k: drop subdir configure logic 2022-11-07 23:25:27 +07:00
ppc sim: move register headers into sim/ namespace [PR sim/29869] 2022-12-20 21:06:32 -05:00
pru sim: pru: Fix behaviour when loop count is zero 2022-11-12 15:10:07 +02:00
riscv sim: move register headers into sim/ namespace [PR sim/29869] 2022-12-20 21:06:32 -05:00
rl78 sim: move register headers into sim/ namespace [PR sim/29869] 2022-12-20 21:06:32 -05:00
rx sim: move register headers into sim/ namespace [PR sim/29869] 2022-12-20 21:06:32 -05:00
sh sim: sim_cpu: invert sim_cpu storage 2022-12-20 23:57:38 -05:00
testsuite sim: pru: Fix behaviour when loop count is zero 2022-11-12 15:10:07 +02:00
v850 sim: v850: rename v850.dc to align with other ports 2022-11-11 01:42:29 +07:00
.gitignore
aclocal.m4
arch-subdir.mk.in
ChangeLog-2021
config.h.in sim: restore lstat & mkdir func checks 2022-11-10 00:19:45 +07:00
configure sim: restore lstat & mkdir func checks 2022-11-10 00:19:45 +07:00
configure.ac sim: v850: drop subdir configure logic 2022-11-07 23:26:07 +07:00
COPYING
gdbinit.in
MAINTAINERS
Makefile.am sim: build: add a proper var for enabled arches 2022-11-07 21:51:11 +07:00
Makefile.in sim: ppc: move spreg.[ch] files to the source tree 2022-12-20 21:05:43 -05:00
README-HACKING