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Matthew Malcomson 66e6f0b760 AArch64: Fix error checking for SIMD udot (by element)
Committed on behalf of Matthew Malcomson:

The SIMD UDOT instruction assembly has an unusual operand that selects a single
32 bit element with the mnemonic 4B.
This unusual mnemonic is handled by a special operand qualifier and associated
qualifier data in `aarch64_opnd_qualifiers`.

The current qualifier data describes 4 1-byte elements with the structure
{1, 4, 0x0, "4b", OQK_OPD_VARIANT}
This makes sense, as the instruction does work on 4 1-byte elements, however
some logic in the `operand_general_constraint_met_p` makes assumptions about
the range of index allowed when selecting a SIMD_ELEMENT depending on element
size.
That function reasons that e.g. in order to select a byte-sized element in a 16
byte V register an index must allow selection of one of the 16 elements and
hence its range will be in [0,15].

This reasoning breaks with the above description of a 4 part selection of 1
byte elements and allows an index outside the valid [0,3] range, triggering an
assert later on in the program in `aarch64_ins_reglane`.

vshcmd: > echo 'udot v0.2s, v1.8b, v2.4b[4]' | ../src/binutils-build/gas/as-new -march=armv8.4-a
as-new: ../../binutils-gdb/opcodes/aarch64-asm.c:134: aarch64_ins_reglane: Assertion `reglane_index < 4' failed.
{standard input}: Assembler messages:
{standard input}:1: Internal error (Aborted).
Please report this bug.

This patch changes the operand qualifier data so that it describes a single
32 bit element.
{4, 1, 0x0, "4b", OQK_OPD_VARIANT}
Hence the calculation in `operand_general_constraint_met_p` provides the
correct answer and the usual error checking machinery is used.

vshcmd: > echo 'udot v0.2s, v1.8b, v2.4b[4]' | ../src/binutils-build/gas/as-new -march=armv8.4-a
{standard input}: Assembler messages:
{standard input}:1: Error: register element index out of range 0 to 3 at operand 3 -- `udot v0.2s,v1.8b,v2.4b[4]'
2018-10-16 18:50:42 +01:00
bfd Simplify PR23110 PE_DEBUG_DATA size checks 2018-10-16 16:41:57 +10:30
binutils PR23780, assertion abort in function display_raw_attribute 2018-10-16 16:41:57 +10:30
config
contrib
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gas AArch64: Fix error checking for SIMD udot (by element) 2018-10-16 18:50:42 +01:00
gdb Remove unnecessary casts from TUI 2018-10-15 23:01:32 -06:00
gold PR23769, mixing split-stack and non-split-stack error message 2018-10-16 16:41:57 +10:30
gprof
include [PATCH, BINUTULS, AARCH64, 9/9] Add SSBS to MSR/MRS 2018-10-09 15:39:29 +01:00
intl
ld RISC-V: Adjust __global_pointer$ value to reduce code size. 2018-10-15 16:00:28 -07:00
libdecnumber
libiberty
opcodes AArch64: Fix error checking for SIMD udot (by element) 2018-10-16 18:50:42 +01:00
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