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cb587d836a
(arm-linux-nat.o, arm-linux-tdep.o): Update. * arm-linux-nat.c: Include "arm-linux-tdep.h". (typeNone, typeSingle, typeDouble, typeExtended) (FPWORDS, ARM_CPSR_REGNUM, FPREG, FPA11) (fetch_nwfpe_single, fetch_nwfpe_double, fetch_nwfpe_none) (fetch_nwfpe_extended, fetch_nwfpe_register, store_nwfpe_single) (store_nwfpe_double, store_nwfpe_extended, store_nwfpe_register): Delete. (fetch_fpregister, fetch_fpregs, store_fpregister, store_fpregs): Use gdb_byte buffers, NWFPE_FPSR_OFFSET, supply_nwfpe_register, and collect_nwfpe_register. (fill_gregset, supply_gregset, fill_fpregset, supply_fpregset): Use new regset functions. * arm-linux-tdep.c: Include "regset.h" and "arm-linux-tdep.h". (arm_apcs_32): New declaration. (ARM_LINUX_SIZEOF_GREGSET, arm_linux_supply_gregset) (arm_linux_collect_gregset, typeNone, typeSingle, typeDouble) (typeExtended, supply_nwfpe_register, collect_nwfpe_register) (arm_linux_supply_nwfpe, arm_linux_collect_nwfpe) (arm_linux_regset_from_core_section): New. (arm_linux_init_abi): Register arm_linux_regset_from_core_section. * arm-linux-tdep.h: New file. * arm-tdep.h (struct regset): Declare. (struct gdbarch_tdep): Add gregset, fpregset members. * config/arm/linux.mh (NATDEPFILES): Remove corelow.o and core-regset.o. * config/arm/linux.mt (TDEPFILES): Add corelow.o.
662 lines
21 KiB
C
662 lines
21 KiB
C
/* GNU/Linux on ARM target support.
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Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
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Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street, Fifth Floor,
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Boston, MA 02110-1301, USA. */
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#include "defs.h"
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#include "target.h"
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#include "value.h"
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#include "gdbtypes.h"
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#include "floatformat.h"
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#include "gdbcore.h"
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#include "frame.h"
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#include "regcache.h"
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#include "doublest.h"
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#include "solib-svr4.h"
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#include "osabi.h"
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#include "regset.h"
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#include "trad-frame.h"
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#include "tramp-frame.h"
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#include "arm-tdep.h"
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#include "arm-linux-tdep.h"
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#include "glibc-tdep.h"
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#include "gdb_string.h"
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extern int arm_apcs_32;
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/* Under ARM GNU/Linux the traditional way of performing a breakpoint
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is to execute a particular software interrupt, rather than use a
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particular undefined instruction to provoke a trap. Upon exection
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of the software interrupt the kernel stops the inferior with a
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SIGTRAP, and wakes the debugger. */
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static const char arm_linux_arm_le_breakpoint[] = { 0x01, 0x00, 0x9f, 0xef };
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static const char arm_linux_arm_be_breakpoint[] = { 0xef, 0x9f, 0x00, 0x01 };
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/* However, the EABI syscall interface (new in Nov. 2005) does not look at
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the operand of the swi if old-ABI compatibility is disabled. Therefore,
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use an undefined instruction instead. This is supported as of kernel
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version 2.5.70 (May 2003), so should be a safe assumption for EABI
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binaries. */
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static const char eabi_linux_arm_le_breakpoint[] = { 0xf0, 0x01, 0xf0, 0xe7 };
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static const char eabi_linux_arm_be_breakpoint[] = { 0xe7, 0xf0, 0x01, 0xf0 };
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/* All the kernels which support Thumb support using a specific undefined
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instruction for the Thumb breakpoint. */
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static const char arm_linux_thumb_be_breakpoint[] = {0xde, 0x01};
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static const char arm_linux_thumb_le_breakpoint[] = {0x01, 0xde};
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/* Description of the longjmp buffer. */
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#define ARM_LINUX_JB_ELEMENT_SIZE INT_REGISTER_SIZE
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#define ARM_LINUX_JB_PC 21
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/* Extract from an array REGBUF containing the (raw) register state
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a function return value of type TYPE, and copy that, in virtual format,
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into VALBUF. */
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/* FIXME rearnsha/2002-02-23: This function shouldn't be necessary.
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The ARM generic one should be able to handle the model used by
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linux and the low-level formatting of the registers should be
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hidden behind the regcache abstraction. */
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static void
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arm_linux_extract_return_value (struct type *type,
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gdb_byte regbuf[],
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gdb_byte *valbuf)
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{
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/* ScottB: This needs to be looked at to handle the different
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floating point emulators on ARM GNU/Linux. Right now the code
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assumes that fetch inferior registers does the right thing for
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GDB. I suspect this won't handle NWFPE registers correctly, nor
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will the default ARM version (arm_extract_return_value()). */
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int regnum = ((TYPE_CODE_FLT == TYPE_CODE (type))
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? ARM_F0_REGNUM : ARM_A1_REGNUM);
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memcpy (valbuf, ®buf[DEPRECATED_REGISTER_BYTE (regnum)], TYPE_LENGTH (type));
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}
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/*
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Dynamic Linking on ARM GNU/Linux
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--------------------------------
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Note: PLT = procedure linkage table
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GOT = global offset table
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As much as possible, ELF dynamic linking defers the resolution of
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jump/call addresses until the last minute. The technique used is
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inspired by the i386 ELF design, and is based on the following
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constraints.
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1) The calling technique should not force a change in the assembly
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code produced for apps; it MAY cause changes in the way assembly
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code is produced for position independent code (i.e. shared
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libraries).
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2) The technique must be such that all executable areas must not be
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modified; and any modified areas must not be executed.
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To do this, there are three steps involved in a typical jump:
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1) in the code
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2) through the PLT
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3) using a pointer from the GOT
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When the executable or library is first loaded, each GOT entry is
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initialized to point to the code which implements dynamic name
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resolution and code finding. This is normally a function in the
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program interpreter (on ARM GNU/Linux this is usually
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ld-linux.so.2, but it does not have to be). On the first
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invocation, the function is located and the GOT entry is replaced
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with the real function address. Subsequent calls go through steps
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1, 2 and 3 and end up calling the real code.
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1) In the code:
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b function_call
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bl function_call
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This is typical ARM code using the 26 bit relative branch or branch
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and link instructions. The target of the instruction
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(function_call is usually the address of the function to be called.
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In position independent code, the target of the instruction is
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actually an entry in the PLT when calling functions in a shared
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library. Note that this call is identical to a normal function
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call, only the target differs.
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2) In the PLT:
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The PLT is a synthetic area, created by the linker. It exists in
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both executables and libraries. It is an array of stubs, one per
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imported function call. It looks like this:
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PLT[0]:
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str lr, [sp, #-4]! @push the return address (lr)
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ldr lr, [pc, #16] @load from 6 words ahead
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add lr, pc, lr @form an address for GOT[0]
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ldr pc, [lr, #8]! @jump to the contents of that addr
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The return address (lr) is pushed on the stack and used for
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calculations. The load on the second line loads the lr with
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&GOT[3] - . - 20. The addition on the third leaves:
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lr = (&GOT[3] - . - 20) + (. + 8)
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lr = (&GOT[3] - 12)
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lr = &GOT[0]
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On the fourth line, the pc and lr are both updated, so that:
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pc = GOT[2]
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lr = &GOT[0] + 8
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= &GOT[2]
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NOTE: PLT[0] borrows an offset .word from PLT[1]. This is a little
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"tight", but allows us to keep all the PLT entries the same size.
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PLT[n+1]:
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ldr ip, [pc, #4] @load offset from gotoff
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add ip, pc, ip @add the offset to the pc
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ldr pc, [ip] @jump to that address
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gotoff: .word GOT[n+3] - .
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The load on the first line, gets an offset from the fourth word of
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the PLT entry. The add on the second line makes ip = &GOT[n+3],
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which contains either a pointer to PLT[0] (the fixup trampoline) or
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a pointer to the actual code.
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3) In the GOT:
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The GOT contains helper pointers for both code (PLT) fixups and
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data fixups. The first 3 entries of the GOT are special. The next
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M entries (where M is the number of entries in the PLT) belong to
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the PLT fixups. The next D (all remaining) entries belong to
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various data fixups. The actual size of the GOT is 3 + M + D.
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The GOT is also a synthetic area, created by the linker. It exists
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in both executables and libraries. When the GOT is first
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initialized , all the GOT entries relating to PLT fixups are
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pointing to code back at PLT[0].
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The special entries in the GOT are:
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GOT[0] = linked list pointer used by the dynamic loader
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GOT[1] = pointer to the reloc table for this module
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GOT[2] = pointer to the fixup/resolver code
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The first invocation of function call comes through and uses the
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fixup/resolver code. On the entry to the fixup/resolver code:
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ip = &GOT[n+3]
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lr = &GOT[2]
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stack[0] = return address (lr) of the function call
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[r0, r1, r2, r3] are still the arguments to the function call
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This is enough information for the fixup/resolver code to work
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with. Before the fixup/resolver code returns, it actually calls
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the requested function and repairs &GOT[n+3]. */
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/* The constants below were determined by examining the following files
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in the linux kernel sources:
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arch/arm/kernel/signal.c
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- see SWI_SYS_SIGRETURN and SWI_SYS_RT_SIGRETURN
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include/asm-arm/unistd.h
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- see __NR_sigreturn, __NR_rt_sigreturn, and __NR_SYSCALL_BASE */
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#define ARM_LINUX_SIGRETURN_INSTR 0xef900077
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#define ARM_LINUX_RT_SIGRETURN_INSTR 0xef9000ad
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/* For ARM EABI, the syscall number is not in the SWI instruction
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(instead it is loaded into r7). We recognize the pattern that
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glibc uses... alternatively, we could arrange to do this by
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function name, but they are not always exported. */
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#define ARM_SET_R7_SIGRETURN 0xe3a07077
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#define ARM_SET_R7_RT_SIGRETURN 0xe3a070ad
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#define ARM_EABI_SYSCALL 0xef000000
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static void
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arm_linux_sigtramp_cache (struct frame_info *next_frame,
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struct trad_frame_cache *this_cache,
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CORE_ADDR func, int regs_offset)
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{
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CORE_ADDR sp = frame_unwind_register_unsigned (next_frame, ARM_SP_REGNUM);
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CORE_ADDR base = sp + regs_offset;
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int i;
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for (i = 0; i < 16; i++)
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trad_frame_set_reg_addr (this_cache, i, base + i * 4);
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trad_frame_set_reg_addr (this_cache, ARM_PS_REGNUM, base + 16 * 4);
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/* The VFP or iWMMXt registers may be saved on the stack, but there's
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no reliable way to restore them (yet). */
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/* Save a frame ID. */
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trad_frame_set_id (this_cache, frame_id_build (sp, func));
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}
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/* There are a couple of different possible stack layouts that
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we need to support.
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Before version 2.6.18, the kernel used completely independent
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layouts for non-RT and RT signals. For non-RT signals the stack
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began directly with a struct sigcontext. For RT signals the stack
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began with two redundant pointers (to the siginfo and ucontext),
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and then the siginfo and ucontext.
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As of version 2.6.18, the non-RT signal frame layout starts with
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a ucontext and the RT signal frame starts with a siginfo and then
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a ucontext. Also, the ucontext now has a designated save area
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for coprocessor registers.
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For RT signals, it's easy to tell the difference: we look for
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pinfo, the pointer to the siginfo. If it has the expected
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value, we have an old layout. If it doesn't, we have the new
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layout.
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For non-RT signals, it's a bit harder. We need something in one
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layout or the other with a recognizable offset and value. We can't
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use the return trampoline, because ARM usually uses SA_RESTORER,
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in which case the stack return trampoline is not filled in.
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We can't use the saved stack pointer, because sigaltstack might
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be in use. So for now we guess the new layout... */
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/* There are three words (trap_no, error_code, oldmask) in
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struct sigcontext before r0. */
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#define ARM_SIGCONTEXT_R0 0xc
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/* There are five words (uc_flags, uc_link, and three for uc_stack)
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in the ucontext_t before the sigcontext. */
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#define ARM_UCONTEXT_SIGCONTEXT 0x14
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/* There are three elements in an rt_sigframe before the ucontext:
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pinfo, puc, and info. The first two are pointers and the third
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is a struct siginfo, with size 128 bytes. We could follow puc
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to the ucontext, but it's simpler to skip the whole thing. */
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#define ARM_OLD_RT_SIGFRAME_SIGINFO 0x8
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#define ARM_OLD_RT_SIGFRAME_UCONTEXT 0x88
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#define ARM_NEW_RT_SIGFRAME_UCONTEXT 0x80
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#define ARM_NEW_SIGFRAME_MAGIC 0x5ac3c35a
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static void
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arm_linux_sigreturn_init (const struct tramp_frame *self,
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struct frame_info *next_frame,
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struct trad_frame_cache *this_cache,
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CORE_ADDR func)
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{
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CORE_ADDR sp = frame_unwind_register_unsigned (next_frame, ARM_SP_REGNUM);
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ULONGEST uc_flags = read_memory_unsigned_integer (sp, 4);
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if (uc_flags == ARM_NEW_SIGFRAME_MAGIC)
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arm_linux_sigtramp_cache (next_frame, this_cache, func,
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ARM_UCONTEXT_SIGCONTEXT
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+ ARM_SIGCONTEXT_R0);
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else
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arm_linux_sigtramp_cache (next_frame, this_cache, func,
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ARM_SIGCONTEXT_R0);
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}
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static void
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arm_linux_rt_sigreturn_init (const struct tramp_frame *self,
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struct frame_info *next_frame,
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struct trad_frame_cache *this_cache,
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CORE_ADDR func)
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{
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CORE_ADDR sp = frame_unwind_register_unsigned (next_frame, ARM_SP_REGNUM);
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ULONGEST pinfo = read_memory_unsigned_integer (sp, 4);
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if (pinfo == sp + ARM_OLD_RT_SIGFRAME_SIGINFO)
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arm_linux_sigtramp_cache (next_frame, this_cache, func,
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ARM_OLD_RT_SIGFRAME_UCONTEXT
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+ ARM_UCONTEXT_SIGCONTEXT
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+ ARM_SIGCONTEXT_R0);
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else
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arm_linux_sigtramp_cache (next_frame, this_cache, func,
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ARM_NEW_RT_SIGFRAME_UCONTEXT
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+ ARM_UCONTEXT_SIGCONTEXT
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+ ARM_SIGCONTEXT_R0);
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}
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static struct tramp_frame arm_linux_sigreturn_tramp_frame = {
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SIGTRAMP_FRAME,
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4,
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{
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{ ARM_LINUX_SIGRETURN_INSTR, -1 },
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{ TRAMP_SENTINEL_INSN }
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},
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arm_linux_sigreturn_init
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};
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static struct tramp_frame arm_linux_rt_sigreturn_tramp_frame = {
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SIGTRAMP_FRAME,
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4,
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{
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{ ARM_LINUX_RT_SIGRETURN_INSTR, -1 },
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{ TRAMP_SENTINEL_INSN }
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},
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arm_linux_rt_sigreturn_init
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};
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static struct tramp_frame arm_eabi_linux_sigreturn_tramp_frame = {
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SIGTRAMP_FRAME,
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4,
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{
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{ ARM_SET_R7_SIGRETURN, -1 },
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{ ARM_EABI_SYSCALL, -1 },
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{ TRAMP_SENTINEL_INSN }
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},
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arm_linux_sigreturn_init
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};
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static struct tramp_frame arm_eabi_linux_rt_sigreturn_tramp_frame = {
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SIGTRAMP_FRAME,
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4,
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{
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{ ARM_SET_R7_RT_SIGRETURN, -1 },
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{ ARM_EABI_SYSCALL, -1 },
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{ TRAMP_SENTINEL_INSN }
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},
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arm_linux_rt_sigreturn_init
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};
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/* Core file and register set support. */
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#define ARM_LINUX_SIZEOF_GREGSET (18 * INT_REGISTER_SIZE)
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void
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arm_linux_supply_gregset (const struct regset *regset,
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struct regcache *regcache,
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int regnum, const void *gregs_buf, size_t len)
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{
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const gdb_byte *gregs = gregs_buf;
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int regno;
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CORE_ADDR reg_pc;
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gdb_byte pc_buf[INT_REGISTER_SIZE];
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for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++)
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if (regnum == -1 || regnum == regno)
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regcache_raw_supply (regcache, regno,
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gregs + INT_REGISTER_SIZE * regno);
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if (regnum == ARM_PS_REGNUM || regnum == -1)
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{
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if (arm_apcs_32)
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regcache_raw_supply (regcache, ARM_PS_REGNUM,
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gregs + INT_REGISTER_SIZE * ARM_CPSR_REGNUM);
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else
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regcache_raw_supply (regcache, ARM_PS_REGNUM,
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gregs + INT_REGISTER_SIZE * ARM_PC_REGNUM);
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}
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if (regnum == ARM_PC_REGNUM || regnum == -1)
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{
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reg_pc = extract_unsigned_integer (gregs
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+ INT_REGISTER_SIZE * ARM_PC_REGNUM,
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INT_REGISTER_SIZE);
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reg_pc = ADDR_BITS_REMOVE (reg_pc);
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store_unsigned_integer (pc_buf, INT_REGISTER_SIZE, reg_pc);
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regcache_raw_supply (regcache, ARM_PC_REGNUM, pc_buf);
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}
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}
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void
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arm_linux_collect_gregset (const struct regset *regset,
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const struct regcache *regcache,
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int regnum, void *gregs_buf, size_t len)
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{
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gdb_byte *gregs = gregs_buf;
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int regno;
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for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++)
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if (regnum == -1 || regnum == regno)
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regcache_raw_collect (regcache, regno,
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gregs + INT_REGISTER_SIZE * regno);
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if (regnum == ARM_PS_REGNUM || regnum == -1)
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{
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if (arm_apcs_32)
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regcache_raw_collect (regcache, ARM_PS_REGNUM,
|
|
gregs + INT_REGISTER_SIZE * ARM_CPSR_REGNUM);
|
|
else
|
|
regcache_raw_collect (regcache, ARM_PS_REGNUM,
|
|
gregs + INT_REGISTER_SIZE * ARM_PC_REGNUM);
|
|
}
|
|
|
|
if (regnum == ARM_PC_REGNUM || regnum == -1)
|
|
regcache_raw_collect (regcache, ARM_PC_REGNUM,
|
|
gregs + INT_REGISTER_SIZE * ARM_PC_REGNUM);
|
|
}
|
|
|
|
/* Support for register format used by the NWFPE FPA emulator. */
|
|
|
|
#define typeNone 0x00
|
|
#define typeSingle 0x01
|
|
#define typeDouble 0x02
|
|
#define typeExtended 0x03
|
|
|
|
void
|
|
supply_nwfpe_register (struct regcache *regcache, int regno,
|
|
const gdb_byte *regs)
|
|
{
|
|
const gdb_byte *reg_data;
|
|
gdb_byte reg_tag;
|
|
gdb_byte buf[FP_REGISTER_SIZE];
|
|
|
|
reg_data = regs + (regno - ARM_F0_REGNUM) * FP_REGISTER_SIZE;
|
|
reg_tag = regs[(regno - ARM_F0_REGNUM) + NWFPE_TAGS_OFFSET];
|
|
memset (buf, 0, FP_REGISTER_SIZE);
|
|
|
|
switch (reg_tag)
|
|
{
|
|
case typeSingle:
|
|
memcpy (buf, reg_data, 4);
|
|
break;
|
|
case typeDouble:
|
|
memcpy (buf, reg_data + 4, 4);
|
|
memcpy (buf + 4, reg_data, 4);
|
|
break;
|
|
case typeExtended:
|
|
/* We want sign and exponent, then least significant bits,
|
|
then most significant. NWFPE does sign, most, least. */
|
|
memcpy (buf, reg_data, 4);
|
|
memcpy (buf + 4, reg_data + 8, 4);
|
|
memcpy (buf + 8, reg_data + 4, 4);
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
|
|
regcache_raw_supply (regcache, regno, buf);
|
|
}
|
|
|
|
void
|
|
collect_nwfpe_register (const struct regcache *regcache, int regno,
|
|
gdb_byte *regs)
|
|
{
|
|
gdb_byte *reg_data;
|
|
gdb_byte reg_tag;
|
|
gdb_byte buf[FP_REGISTER_SIZE];
|
|
|
|
regcache_raw_collect (regcache, regno, buf);
|
|
|
|
/* NOTE drow/2006-06-07: This code uses the tag already in the
|
|
register buffer. I've preserved that when moving the code
|
|
from the native file to the target file. But this doesn't
|
|
always make sense. */
|
|
|
|
reg_data = regs + (regno - ARM_F0_REGNUM) * FP_REGISTER_SIZE;
|
|
reg_tag = regs[(regno - ARM_F0_REGNUM) + NWFPE_TAGS_OFFSET];
|
|
|
|
switch (reg_tag)
|
|
{
|
|
case typeSingle:
|
|
memcpy (reg_data, buf, 4);
|
|
break;
|
|
case typeDouble:
|
|
memcpy (reg_data, buf + 4, 4);
|
|
memcpy (reg_data + 4, buf, 4);
|
|
break;
|
|
case typeExtended:
|
|
memcpy (reg_data, buf, 4);
|
|
memcpy (reg_data + 4, buf + 8, 4);
|
|
memcpy (reg_data + 8, buf + 4, 4);
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
|
|
void
|
|
arm_linux_supply_nwfpe (const struct regset *regset,
|
|
struct regcache *regcache,
|
|
int regnum, const void *regs_buf, size_t len)
|
|
{
|
|
const gdb_byte *regs = regs_buf;
|
|
int regno;
|
|
|
|
if (regnum == ARM_FPS_REGNUM || regnum == -1)
|
|
regcache_raw_supply (regcache, ARM_FPS_REGNUM,
|
|
regs + NWFPE_FPSR_OFFSET);
|
|
|
|
for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
|
|
if (regnum == -1 || regnum == regno)
|
|
supply_nwfpe_register (regcache, regno, regs);
|
|
}
|
|
|
|
void
|
|
arm_linux_collect_nwfpe (const struct regset *regset,
|
|
const struct regcache *regcache,
|
|
int regnum, void *regs_buf, size_t len)
|
|
{
|
|
gdb_byte *regs = regs_buf;
|
|
int regno;
|
|
|
|
for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
|
|
if (regnum == -1 || regnum == regno)
|
|
collect_nwfpe_register (regcache, regno, regs);
|
|
|
|
if (regnum == ARM_FPS_REGNUM || regnum == -1)
|
|
regcache_raw_collect (regcache, ARM_FPS_REGNUM,
|
|
regs + INT_REGISTER_SIZE * ARM_FPS_REGNUM);
|
|
}
|
|
|
|
/* Return the appropriate register set for the core section identified
|
|
by SECT_NAME and SECT_SIZE. */
|
|
|
|
static const struct regset *
|
|
arm_linux_regset_from_core_section (struct gdbarch *gdbarch,
|
|
const char *sect_name, size_t sect_size)
|
|
{
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
|
|
|
if (strcmp (sect_name, ".reg") == 0
|
|
&& sect_size == ARM_LINUX_SIZEOF_GREGSET)
|
|
{
|
|
if (tdep->gregset == NULL)
|
|
tdep->gregset = regset_alloc (gdbarch, arm_linux_supply_gregset,
|
|
arm_linux_collect_gregset);
|
|
return tdep->gregset;
|
|
}
|
|
|
|
if (strcmp (sect_name, ".reg2") == 0
|
|
&& sect_size == ARM_LINUX_SIZEOF_NWFPE)
|
|
{
|
|
if (tdep->fpregset == NULL)
|
|
tdep->fpregset = regset_alloc (gdbarch, arm_linux_supply_nwfpe,
|
|
arm_linux_collect_nwfpe);
|
|
return tdep->fpregset;
|
|
}
|
|
|
|
return NULL;
|
|
}
|
|
|
|
static void
|
|
arm_linux_init_abi (struct gdbarch_info info,
|
|
struct gdbarch *gdbarch)
|
|
{
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
|
|
|
tdep->lowest_pc = 0x8000;
|
|
if (info.byte_order == BFD_ENDIAN_BIG)
|
|
{
|
|
if (tdep->arm_abi == ARM_ABI_AAPCS)
|
|
tdep->arm_breakpoint = eabi_linux_arm_be_breakpoint;
|
|
else
|
|
tdep->arm_breakpoint = arm_linux_arm_be_breakpoint;
|
|
tdep->thumb_breakpoint = arm_linux_thumb_be_breakpoint;
|
|
}
|
|
else
|
|
{
|
|
if (tdep->arm_abi == ARM_ABI_AAPCS)
|
|
tdep->arm_breakpoint = eabi_linux_arm_le_breakpoint;
|
|
else
|
|
tdep->arm_breakpoint = arm_linux_arm_le_breakpoint;
|
|
tdep->thumb_breakpoint = arm_linux_thumb_le_breakpoint;
|
|
}
|
|
tdep->arm_breakpoint_size = sizeof (arm_linux_arm_le_breakpoint);
|
|
tdep->thumb_breakpoint_size = sizeof (arm_linux_thumb_le_breakpoint);
|
|
|
|
if (tdep->fp_model == ARM_FLOAT_AUTO)
|
|
tdep->fp_model = ARM_FLOAT_FPA;
|
|
|
|
tdep->jb_pc = ARM_LINUX_JB_PC;
|
|
tdep->jb_elt_size = ARM_LINUX_JB_ELEMENT_SIZE;
|
|
|
|
set_solib_svr4_fetch_link_map_offsets
|
|
(gdbarch, svr4_ilp32_fetch_link_map_offsets);
|
|
|
|
/* The following override shouldn't be needed. */
|
|
set_gdbarch_deprecated_extract_return_value (gdbarch, arm_linux_extract_return_value);
|
|
|
|
/* Shared library handling. */
|
|
set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
|
|
set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver);
|
|
|
|
/* Enable TLS support. */
|
|
set_gdbarch_fetch_tls_load_module_address (gdbarch,
|
|
svr4_fetch_objfile_link_map);
|
|
|
|
tramp_frame_prepend_unwinder (gdbarch,
|
|
&arm_linux_sigreturn_tramp_frame);
|
|
tramp_frame_prepend_unwinder (gdbarch,
|
|
&arm_linux_rt_sigreturn_tramp_frame);
|
|
tramp_frame_prepend_unwinder (gdbarch,
|
|
&arm_eabi_linux_sigreturn_tramp_frame);
|
|
tramp_frame_prepend_unwinder (gdbarch,
|
|
&arm_eabi_linux_rt_sigreturn_tramp_frame);
|
|
|
|
/* Core file support. */
|
|
set_gdbarch_regset_from_core_section (gdbarch,
|
|
arm_linux_regset_from_core_section);
|
|
}
|
|
|
|
void
|
|
_initialize_arm_linux_tdep (void)
|
|
{
|
|
gdbarch_register_osabi (bfd_arch_arm, 0, GDB_OSABI_LINUX,
|
|
arm_linux_init_abi);
|
|
}
|