mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-12-15 04:31:49 +08:00
1300 lines
26 KiB
Plaintext
1300 lines
26 KiB
Plaintext
// Media Instructions
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// ------------------
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// Ref: http://www.sgi.com/MIPS/arch/ISA5/MDMXspec.pdf
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// Note: For OB instructions, the sel field is deduced by special
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// handling of the "vt" operand.
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// If vt is:
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// of the form $vt[0], then sel is 0000
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// of the form $vt[1], then sel is 0001
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// of the form $vt[2], then sel is 0010
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// of the form $vt[3], then sel is 0011
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// of the form $vt[4], then sel is 0100
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// of the form $vt[5], then sel is 0101
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// of the form $vt[6], then sel is 0110
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// of the form $vt[7], then sel is 0111
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// Normal register specifier, then sel is 1011
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// Constant, then sel is 1111
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//
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// VecAcc is the Vector Accumulator.
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// This accumulator is organized as 8X24 bit (192 bit) register.
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// This accumulator holds only signed values.
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// Verify that the instruction is valid for the curent Architecture
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// If valid, return the scale (log nr bits) of a vector element
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// as determined by SEL.
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:function:::int:get_scale:int sel
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{
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#if 0
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switch (my_index X STATE_ARCHITECTURE)
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{
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}
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#endif
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switch (sel & 0x7)
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{
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case 0:
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case 2:
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case 4:
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case 6:
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/* octal byte - ssss0 */
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return 0;
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case 1:
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case 5:
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/* quad halfword - sss01 */
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return 1;
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case 3:
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/* bi word - ss011 */
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semantic_illegal (sd, cia);
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return 2;
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case 7:
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/* long - ss111 */
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semantic_illegal (sd, cia);
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return 3;
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default:
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abort ();
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return -1;
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}
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}
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// Fetch/Store VALUE in ELEMENT of vector register FPR.
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// The the of the element determined by SCALE.
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:function:::signed:value_vr:int scale, int fpr, int el
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{
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switch (FPR_STATE[fpr])
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{
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case fmt_uninterpreted:
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FPR_STATE[fpr] = fmt_long;
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break;
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case fmt_long:
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case fmt_unknown:
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break;
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default:
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sim_io_eprintf(sd, "Vector %d format invalid (PC = 0x%08lx)\n",
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fpr, (long) cia);
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FPR_STATE[fpr] = fmt_unknown;
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}
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switch (scale)
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{
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case 0:
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{
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signed8 value = *A1_8 (&FGR[fpr], 7 - el);
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return value;
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}
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case 1:
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{
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signed16 value = *A2_8 (&FGR[fpr], 3 - el);
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return value;
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}
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default:
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abort;
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}
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return 0;
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}
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:function:::void:store_vr:int scale, int fpr, int element, signed value
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{
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switch (FPR_STATE[fpr])
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{
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case fmt_uninterpreted:
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FPR_STATE[fpr] = fmt_long;
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break;
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case fmt_long:
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case fmt_unknown:
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break;
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default:
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sim_io_eprintf(sd, "Vector %d format invalid (PC = 0x%08lx)\n",
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fpr, (long) cia);
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FPR_STATE[fpr] = fmt_unknown;
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}
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switch (scale)
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{
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case 0:
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{
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*A1_8 (&FGR[fpr], 7 - element) = value;
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break;
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}
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case 1:
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{
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*A2_8 (&FGR[fpr], 3 - element) = value;
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break;
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}
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default:
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abort ();
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}
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}
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// Select a value from onr of FGR[VT][ELEMENT], VT and GFR[VT][CONST]
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// according to SEL
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:function:::unsigned:select_vr:int sel, int vt, int element
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{
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switch (sel)
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{
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/* element select - 0xxxx */
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case 0x00: /* 0 xxx 0 */
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case 0x02:
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case 0x04:
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case 0x06:
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case 0x08:
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case 0x0a:
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case 0x0c:
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case 0x0e:
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return value_vr (SD_, 0, vt, sel >> 1);
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case 0x01: /* 0 xx 01 */
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case 0x05:
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case 0x09:
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case 0x0d:
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return value_vr (SD_, 1, vt, sel >> 2);
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case 0x03: /* 0 x 011 */
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case 0x0b:
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return value_vr (SD_, 2, vt, sel >> 3);
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case 0x07: /* 0 x 111 */
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case 0x0f:
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return value_vr (SD_, 3, vt, sel >> 4);
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/* select vector - 10xxx */
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case 0x16: /* 10 11 0 */
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return value_vr (SD_, 0, vt, element);
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case 0x15: /* 10 1 01 */
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return value_vr (SD_, 1, vt, element);
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case 0x13: /* 10 011 */
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return value_vr (SD_, 2, vt, element);
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case 0x17: /* 10 111 */
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return value_vr (SD_, 3, vt, element);
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/* select immediate - 11xxx */
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case 0x1e: /* 11 11 0 */
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case 0x1d: /* 11 1 01 */
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case 0x1b: /* 11 011 */
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case 0x1f: /* 11 111 */
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return vt;
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}
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return 0;
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}
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// Saturate (clamp) the signed value to (8 << SCALE) bits.
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:function:::signed:Clamp:int scale, signed value
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{
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switch (scale)
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{
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case 0:
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{
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if (value != (signed8) value)
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{
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if (value > 0)
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return 0x7f;
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else
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return 0x80;
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}
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return value & 0xff;
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}
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case 1:
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{
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if (value != (signed16) value)
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{
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if (value > 0)
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return 0x7fff;
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else
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return 0x8000;
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}
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return value & 0xffff;
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}
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default:
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abort ();
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return 0;
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}
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}
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// Access a single bit of the floating point CC register.
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:function:::void:store_cc:int i, int value
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{
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abort ();
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}
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:function:::int:fetch_cc:int i
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{
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abort ();
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return 0;
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}
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// Read/write the accumulator
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:function:::signed64:value_acc:int scale, int element
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{
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signed64 value = 0;
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switch (scale)
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{
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case 0:
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value |= (unsigned64) (unsigned8) CPU->acc [element * 3 + 0];
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value |= (unsigned64) (unsigned8) CPU->acc [element * 3 + 1] << 8;
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value |= (signed64) (signed8) CPU->acc [element * 3 + 2] << 16;
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break;
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case 1:
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value |= (unsigned64) (unsigned8) CPU->acc [element * 3 + 0];
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value |= (unsigned64) (unsigned8) CPU->acc [element * 3 + 1] << 8;
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value |= (unsigned64) (unsigned8) CPU->acc [element * 3 + 2] << 16;
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value |= (unsigned64) (unsigned8) CPU->acc [element * 3 + 3] << 24;
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value |= (unsigned64) (unsigned8) CPU->acc [element * 3 + 4] << 32;
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value |= (signed64) (signed8) CPU->acc [element * 3 + 5] << 40;
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break;
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}
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return value;
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}
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:function:::void:store_acc:int scale, int element, signed64 value
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{
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switch (scale)
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{
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case 0:
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CPU->acc [element * 3 + 0] = value >> 0;
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CPU->acc [element * 3 + 1] = value >> 8;
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CPU->acc [element * 3 + 2] = value >> 16;
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break;
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case 1:
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CPU->acc [element * 3 + 0] = value >> 0;
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CPU->acc [element * 3 + 1] = value >> 8;
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CPU->acc [element * 3 + 2] = value >> 16;
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CPU->acc [element * 3 + 3] = value >> 24;
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CPU->acc [element * 3 + 4] = value >> 32;
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CPU->acc [element * 3 + 5] = value >> 40;
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break;
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}
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}
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// Formatting
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:%s::::VT:int sel, int vt
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{
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static char buf[20];
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if (sel < 8)
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sprintf (buf, "v%d[%d]", vt, sel);
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else if (sel == 0x13)
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sprintf (buf, "v%d", vt);
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else if (sel == 0x1f)
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sprintf (buf, "%d", vt);
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else
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sprintf (buf, "(invalid)");
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return buf;
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}
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:%s::::SEL:int sel
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{
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switch (sel & 7)
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{
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case 0:
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case 2:
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case 4:
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case 6:
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return "ob";
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case 1:
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case 5:
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return "qh";
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case 3:
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return "bw";
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default:
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return "l";
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}
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}
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// Vector Add.
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010010,5.SEL,5.VT,5.VS,5.VD,001011::::ADD.fmt
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"add.%s<SEL> v<VD>, v<VS>, %s<VT#SEL,VT>"
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*mdmx:
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// start-sanitize-vr5400
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*vr5400:
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// end-sanitize-vr5400
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{
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int i;
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int scale = get_scale (SD_, SEL);
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for (i = 0; i < (8 >> scale); i++)
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store_vr (SD_, scale, VD, i,
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Clamp (SD_, scale,
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(value_vr (SD_, scale, VS, i)
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+ select_vr (SD_, SEL, VT, i))));
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}
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// Accumulate Vector Add
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010010,5.SEL,5.VT,5.VS,1,0000,110111::::ADDA.fmt
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"adda.%s<SEL> v<VD>, v<VS>"
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*mdmx:
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{
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int i;
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int scale = get_scale (SD_, SEL);
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for (i = 0; i < (8 >> scale); i++)
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store_acc (SD_, scale, i,
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(value_acc (SD_, scale, i)
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+ (signed64) value_vr (SD_, scale, VS, i)
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+ (signed64) select_vr (SD_, SEL, VT, i)));
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}
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// Load Vector Add
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010010,5.SEL,5.VT,5.VS,0,0000,110111::::ADDA.fmt
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"addl.%s<SEL> v<VD>, v<VS>"
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*mdmx:
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{
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int i;
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int scale = get_scale (SD_, SEL);
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for (i = 0; i < (8 >> scale); i++)
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store_acc (SD_, scale, i,
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((signed64) value_vr (SD_, scale, VS, i)
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+ (signed64) select_vr (SD_, SEL, VT, i)));
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}
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// Vector align, Constant Alignment
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:function:::void:ByteAlign:int vd, int imm, int vs, int vt
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{
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int s = imm * 8;
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unsigned64 rs = value_fpr (sd, cia, vs, fmt_long);
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unsigned64 rt = value_fpr (sd, cia, vt, fmt_long);
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unsigned64 rd;
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if (BigEndianCPU)
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{
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/* (vs || vt) [127 - S .. 64 - S] */
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if (s == 0)
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rd = rs;
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else
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rd = (MOVED64 (rs, 64 - s, 0, 63, s)
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| EXTRACTED64 (rt, 63, 64 - s));
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}
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else
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{
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/* (vs || vt) [63 + S .. S] */
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if (s == 0)
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rd = rt;
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else
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rd = (MOVED64 (rs, s, 0, 63, 64 - s)
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| EXTRACTED64 (rt, 63, s));
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}
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store_fpr (sd, cia, vd, rd, fmt_long);
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}
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010010,00,3.IMM,5.VT,5.VS,5.VD,0110,X,0::::ALNI.fmt
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"alni.%s<FMT#X> v<VD>, v<VS>, v<VT>, <IMM>"
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*mdmx:
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// start-sanitize-vr5400
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*vr5400:
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// end-sanitize-vr5400
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{
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ByteAlign (SD_, VD, IMM, VS, VT);
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}
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// Vector align, Variable Alignment
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010010,5.RS,5.VT,5.VS,5.VD,0110,X,1::::ALNV.fmt
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"alnv.%s<FMT#X> v<VD>, v<VS>, v<VT>, r<RS>"
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*mdmx:
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{
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ByteAlign (SD_, VD, GPR[RS], VS, VT);
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}
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// Vector And.
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010010,5.SEL,5.VT,5.VS,5.VD,001100::::AND.fmt
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"and.%s<SEL> v<VD>, v<VS>, %s<VT#SEL,VT>"
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*mdmx:
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// start-sanitize-vr5400
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*vr5400:
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// end-sanitize-vr5400
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{
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int i;
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int scale = get_scale (SD_, SEL);
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for (i = 0; i < (8 >> scale); i++)
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store_vr (SD_, scale, VD, i,
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(value_vr (SD_, scale, VS, i)
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& select_vr (SD_, SEL, VT, i)));
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}
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// Vector Compare Equal.
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010010,5.SEL,5.VT,5.VS,00000,000001::::C.EQ.fmt
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"c.EQ.%s<SEL> v<VS>, %s<VT#SEL,VT>"
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*mdmx:
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// start-sanitize-vr5400
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*vr5400:
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// end-sanitize-vr5400
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{
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int i;
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int scale = get_scale (SD_, SEL);
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for (i = 0; i < (8 >> scale); i++)
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store_cc (SD_, i,
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(value_vr (SD_, scale, VS, i)
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== select_vr (SD_, SEL, VT, i)));
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}
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// Vector Compare Less Than or Equal.
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010010,5.SEL,5.VT,5.VS,00000,000101::::C.LE.fmt
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"c.le.%s<SEL> v<VS>, %s<VT#SEL,VT>"
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*mdmx:
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// start-sanitize-vr5400
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*vr5400:
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// end-sanitize-vr5400
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{
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int i;
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int scale = get_scale (SD_, SEL);
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for (i = 0; i < (8 >> scale); i++)
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store_cc (SD_, i,
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(value_vr (SD_, scale, VS, i)
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<= select_vr (SD_, SEL, VT, i)));
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}
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// Vector Compare Less Than.
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010010,5.SEL,5.VT,5.VS,00000,000100::::C.LT.fmt
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"c.lt.%s<SEL> v<VS>, %s<VT#SEL,VT>"
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*mdmx:
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// start-sanitize-vr5400
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*vr5400:
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// end-sanitize-vr5400
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{
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int i;
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int scale = get_scale (SD_, SEL);
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for (i = 0; i < (8 >> scale); i++)
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store_cc (SD_, i,
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(value_vr (SD_, scale, VS, i)
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< select_vr (SD_, SEL, VT, i)));
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}
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// Vector Maximum.
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:function:::signed:Max:int scale, signed l, signed r
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{
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if (l < r)
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return r;
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else
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return l;
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}
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010010,5.SEL,5.VT,5.VS,5.VD,000111::::MAX.fmt
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"max.%s<SEL> v<VD>, v<VS>, %s<VT#SEL,VT>"
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*mdmx:
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// start-sanitize-vr5400
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*vr5400:
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// end-sanitize-vr5400
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{
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int i;
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int scale = get_scale (SD_, SEL);
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for (i = 0; i < (8 >> scale); i++)
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store_vr (SD_, scale, VD, i,
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Max (SD_, scale,
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value_vr (SD_, scale, VS, i),
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select_vr (SD_, SEL, VT, i)));
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}
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// Vector Minimum.
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:function:::signed:Min:int scale, signed l, signed r
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{
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if (l < r)
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return l;
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else
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return r;
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}
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010010,5.SEL,5.VT,5.VS,5.VD,000110::::MIN.fmt
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"min.%s<SEL> v<VD>, v<VS>, %s<VT#SEL,VT>"
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*mdmx:
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// start-sanitize-vr5400
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*vr5400:
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// end-sanitize-vr5400
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{
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int i;
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int scale = get_scale (SD_, SEL);
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for (i = 0; i < (8 >> scale); i++)
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store_vr (SD_, scale, VD, i,
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Min (SD_, scale,
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value_vr (SD_, scale, VS, i),
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select_vr (SD_, SEL, VT, i)));
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}
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|
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|
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// Vector Sign.
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|
|
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:function:::signed:Sign:int scale, signed l, signed r
|
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{
|
|
if (l >= 0)
|
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return r;
|
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else if (r >= 0)
|
|
return -r;
|
|
else
|
|
{
|
|
/* watch for overflow of MIN_INT */
|
|
switch (scale)
|
|
{
|
|
case 0:
|
|
if ((r & 0xff) == 0x80)
|
|
return 0x7ff;
|
|
else
|
|
return -r;
|
|
case 1:
|
|
if ((r & 0xffff) == 0x8000)
|
|
return 0x7ffff;
|
|
else
|
|
return -r;
|
|
default:
|
|
abort ();
|
|
}
|
|
return -r;
|
|
}
|
|
}
|
|
|
|
010010,5.SEL,5.VT,5.VS,5.VD,000110::::MSGN.fmt
|
|
"msgn.%s<SEL> v<VD>, v<VS>, %s<VT#SEL,VT>"
|
|
*mdmx:
|
|
{
|
|
int i;
|
|
int scale = get_scale (SD_, SEL);
|
|
if ((SEL & 1) != 1)
|
|
/* only QH allowed */
|
|
semantic_illegal (sd, cia);
|
|
for (i = 0; i < (8 >> scale); i++)
|
|
store_vr (SD_, scale, VD, i,
|
|
Sign (SD_, scale,
|
|
value_vr (SD_, scale, VS, i),
|
|
select_vr (SD_, SEL, VT, i)));
|
|
}
|
|
|
|
|
|
|
|
// Vector Multiply.
|
|
|
|
010010,5.SEL,5.VT,5.VS,5.VD,110000::::MUL.fmt
|
|
"mul.%s<SEL> v<VD>, v<VS>, %s<VT#SEL,VT>"
|
|
*mdmx:
|
|
// start-sanitize-vr5400
|
|
*vr5400:
|
|
// end-sanitize-vr5400
|
|
{
|
|
int i;
|
|
int scale = get_scale (SD_, SEL);
|
|
for (i = 0; i < (8 >> scale); i++)
|
|
store_vr (SD_, scale, VD, i,
|
|
Clamp (SD_, scale,
|
|
(value_vr (SD_, scale, VS, i)
|
|
* select_vr (SD_, SEL, VT, i))));
|
|
}
|
|
|
|
|
|
|
|
// Accumulate Vector Multiply
|
|
|
|
010010,5.SEL,5.VT,5.VS,00000,110011::::MULA.fmt
|
|
"mula.%s<SEL> v<VS>, %s<VT#SEL,VT>"
|
|
*mdmx:
|
|
// start-sanitize-vr5400
|
|
*vr5400:
|
|
// end-sanitize-vr5400
|
|
{
|
|
int i;
|
|
int scale = get_scale (SD_, SEL);
|
|
for (i = 0; i < (8 >> scale); i++)
|
|
store_acc (SD_, scale, i,
|
|
(value_acc (SD_, scale, i)
|
|
+ ((signed64) value_vr (SD_, scale, VS, i)
|
|
* (signed64) select_vr (SD_, SEL, VT, i))));
|
|
}
|
|
|
|
|
|
|
|
// Add Vector Multiply to Accumulator.
|
|
|
|
010010,5.SEL,5.VT,5.VS,10000,110011::::MULL.fmt
|
|
"mull.%s<SEL> v<VS>, %s<VT#SEL,VT>"
|
|
*mdmx:
|
|
// start-sanitize-vr5400
|
|
*vr5400:
|
|
// end-sanitize-vr5400
|
|
{
|
|
int i;
|
|
int scale = get_scale (SD_, SEL);
|
|
for (i = 0; i < (8 >> scale); i++)
|
|
store_acc (SD_, scale, i,
|
|
((signed64) value_vr (SD_, scale, VS, i)
|
|
* (signed64) select_vr (SD_, SEL, VT, i)));
|
|
}
|
|
|
|
|
|
|
|
// Subtract Vector Multiply from Accumulator
|
|
|
|
010010,5.SEL,5.VT,5.VS,00000,110010::::MULS.fmt
|
|
"muls.%s<SEL> v<VS>, %s<VT#SEL,VT>"
|
|
*mdmx:
|
|
// start-sanitize-vr5400
|
|
*vr5400:
|
|
// end-sanitize-vr5400
|
|
{
|
|
int i;
|
|
int scale = get_scale (SD_, SEL);
|
|
for (i = 0; i < (8 >> scale); i++)
|
|
store_acc (SD_, scale, i,
|
|
(value_acc (SD_, scale, i)
|
|
- ((signed64) value_vr (SD_, scale, VS, i)
|
|
* (signed64) select_vr (SD_, SEL, VT, i))));
|
|
}
|
|
|
|
|
|
|
|
// Load Negative Vector Multiply
|
|
|
|
010010,5.SEL,5.VT,5.VS,10000,110010::::MULSL.fmt
|
|
"mulsl.%s<SEL> v<VS>, %s<VT#SEL,VT>"
|
|
*mdmx:
|
|
// start-sanitize-vr5400
|
|
*vr5400:
|
|
// end-sanitize-vr5400
|
|
{
|
|
int i;
|
|
int scale = get_scale (SD_, SEL);
|
|
for (i = 0; i < (8 >> scale); i++)
|
|
store_acc (SD_, scale, i,
|
|
- ((signed64) value_vr (SD_, scale, VS, i)
|
|
* (signed64) select_vr (SD_, SEL, VT, i)));
|
|
}
|
|
|
|
|
|
|
|
// Vector Nor.
|
|
|
|
010010,5.SEL,5.VT,5.VS,5.VD,001111::::NOR.fmt
|
|
"nor.%s<SEL> v<VD>, v<VS>, %s<VT#SEL,VT>"
|
|
*mdmx:
|
|
// start-sanitize-vr5400
|
|
*vr5400:
|
|
// end-sanitize-vr5400
|
|
{
|
|
int i;
|
|
int scale = get_scale (SD_, SEL);
|
|
for (i = 0; i < (8 >> scale); i++)
|
|
store_vr (SD_, scale, VD, i,
|
|
~(value_vr (SD_, scale, VS, i)
|
|
| select_vr (SD_, SEL, VT, i)));
|
|
}
|
|
|
|
|
|
|
|
// Vector Or.
|
|
|
|
010010,5.SEL,5.VT,5.VS,5.VD,001110::::OR.fmt
|
|
"or.%s<SEL> v<VD>, v<VS>, %s<VT#SEL,VT>"
|
|
*mdmx:
|
|
// start-sanitize-vr5400
|
|
*vr5400:
|
|
// end-sanitize-vr5400
|
|
{
|
|
int i;
|
|
int scale = get_scale (SD_, SEL);
|
|
for (i = 0; i < (8 >> scale); i++)
|
|
store_vr (SD_, scale, VD, i,
|
|
(value_vr (SD_, scale, VS, i)
|
|
| select_vr (SD_, SEL, VT, i)));
|
|
}
|
|
|
|
|
|
|
|
// Select Vector Elements - False
|
|
|
|
010010,5.SEL,5.VT,5.VS,5.VD,000010::::PICKF.fmt
|
|
"pickf.%s<SEL> v<VD>, v<VS>, %s<VT#SEL,VT>"
|
|
*mdmx:
|
|
// start-sanitize-vr5400
|
|
*vr5400:
|
|
// end-sanitize-vr5400
|
|
{
|
|
int i;
|
|
int scale = get_scale (SD_, SEL);
|
|
for (i = 0; i < (8 >> scale); i++)
|
|
store_vr (SD_, scale, VD, i,
|
|
(fetch_cc (SD_, i) == 0
|
|
? value_vr (SD_, scale, VS, i)
|
|
: select_vr (SD_, SEL, VT, i)));
|
|
}
|
|
|
|
|
|
|
|
// Select Vector Elements - True
|
|
|
|
010010,5.SEL,5.VT,5.VS,5.VD,000011::::PICKT.fmt
|
|
"pickt.%s<SEL> v<VD>, v<VS>, %s<VT#SEL,VT>"
|
|
*mdmx:
|
|
// start-sanitize-vr5400
|
|
*vr5400:
|
|
// end-sanitize-vr5400
|
|
{
|
|
int i;
|
|
int scale = get_scale (SD_, SEL);
|
|
for (i = 0; i < (8 >> scale); i++)
|
|
store_vr (SD_, scale, VD, i,
|
|
(fetch_cc (SD_, i) != 0
|
|
? value_vr (SD_, scale, VS, i)
|
|
: select_vr (SD_, SEL, VT, i)));
|
|
}
|
|
|
|
|
|
|
|
// Scale, Round and Clamp Accumulator
|
|
|
|
:%s::::RND:int rnd
|
|
{
|
|
switch (rnd)
|
|
{
|
|
case 0:
|
|
return "zu";
|
|
case 1:
|
|
return "nau";
|
|
case 2:
|
|
return "neu";
|
|
case 4:
|
|
return "rzs";
|
|
case 5:
|
|
return "nas";
|
|
case 6:
|
|
return "nes";
|
|
default:
|
|
return "(invalid)";
|
|
}
|
|
}
|
|
|
|
:function:::signed:ScaleRoundClamp:int scale, int rnd, signed val, signed shift
|
|
{
|
|
int halfway = (1 << (shift - 1));
|
|
/* must be positive */
|
|
if (shift < 0)
|
|
return 0;
|
|
/* too much shift? */
|
|
switch (scale)
|
|
{
|
|
case 0:
|
|
if (shift >= 24)
|
|
return 0;
|
|
break;
|
|
case 1:
|
|
if (shift >= 48)
|
|
return 0;
|
|
break;
|
|
default:
|
|
abort ();
|
|
}
|
|
/* round */
|
|
switch (rnd & 3)
|
|
{
|
|
case 0: /* round towards zero */
|
|
break;
|
|
case 1: /* nearest, halfaway rounds away from zero */
|
|
if (val >= 0)
|
|
val += halfway;
|
|
else
|
|
val -= halfway;
|
|
break;
|
|
case 2: /* nearest, halfway rounds to even! */
|
|
if (val >= 0)
|
|
{
|
|
if (val & (halfway << 1))
|
|
val += halfway;
|
|
else
|
|
val += (halfway - 1);
|
|
}
|
|
else
|
|
{
|
|
if (val & (halfway << 1))
|
|
val -= halfway;
|
|
else
|
|
val -= (halfway - 1);
|
|
}
|
|
default:
|
|
abort ();
|
|
}
|
|
/* shift */
|
|
val >>= shift;
|
|
/* clamp */
|
|
switch (rnd & 4)
|
|
{
|
|
case 0:
|
|
/* unsigned clamp */
|
|
if (val < 0)
|
|
val = 0;
|
|
else
|
|
switch (scale)
|
|
{
|
|
case 0:
|
|
if (val > 0xff)
|
|
val = 0xff;
|
|
break;
|
|
case 1:
|
|
if (val > 0xffff)
|
|
val = 0xffff;
|
|
break;
|
|
}
|
|
break;
|
|
case 8:
|
|
/* normal signed clamp */
|
|
val = Clamp (_SD, scale, val);
|
|
break;
|
|
}
|
|
return val;
|
|
}
|
|
|
|
010010,5.SEL,5.VT,00000,5.VD,100,3.RND::::Rx.fmt
|
|
"r%s<RND>.%s<SEL> v<VD>, v<VT>"
|
|
*mdmx:
|
|
// start-sanitize-vr5400
|
|
*vr5400:
|
|
// end-sanitize-vr5400
|
|
{
|
|
int i;
|
|
int scale = get_scale (SD_, SEL);
|
|
for (i = 0; i < (8 >> scale); i++)
|
|
store_vr (SD_, scale, VD, i,
|
|
ScaleRoundClamp (SD_, scale, RND,
|
|
value_acc (SD_, scale, i),
|
|
select_vr (SD_, SEL, VT, i)));
|
|
}
|
|
|
|
|
|
|
|
// Vector Read Accumulator Low.
|
|
|
|
010010,0000,1.SEL,00000,00000,5.VD,111111::::RACL.fmt
|
|
"racl.%s<SEL> v<VD>"
|
|
*mdmx:
|
|
// start-sanitize-vr5400
|
|
*vr5400:
|
|
// end-sanitize-vr5400
|
|
{
|
|
int i;
|
|
int scale = get_scale (SD_, SEL);
|
|
for (i = 0; i < (8 >> scale); i++)
|
|
store_vr (SD_, scale, VD, i,
|
|
EXTRACTED (value_acc (SD_, scale, i),
|
|
(8 << scale) - 1,
|
|
0));
|
|
}
|
|
|
|
|
|
|
|
// Vector Read Accumulator Middle.
|
|
|
|
010010,0100,1.SEL,00000,00000,5.VD,111111::::RACM.fmt
|
|
"racm.%s<SEL> v<VD>"
|
|
*mdmx:
|
|
// start-sanitize-vr5400
|
|
*vr5400:
|
|
// end-sanitize-vr5400
|
|
{
|
|
int i;
|
|
int scale = get_scale (SD_, SEL);
|
|
for (i = 0; i < (8 >> scale); i++)
|
|
store_vr (SD_, scale, VD, i,
|
|
EXTRACTED (value_acc (SD_, scale, i),
|
|
(16 << scale) - 1,
|
|
(8 << scale) - 0));
|
|
}
|
|
|
|
|
|
|
|
// Vector Read Accumulator High.
|
|
|
|
010010,1000,1.SEL,00000,00000,5.VD,111111::::RACH.fmt
|
|
"rach.%s<SEL> v<VD>"
|
|
*mdmx:
|
|
// start-sanitize-vr5400
|
|
*vr5400:
|
|
// end-sanitize-vr5400
|
|
{
|
|
int i;
|
|
int scale = get_scale (SD_, SEL);
|
|
for (i = 0; i < (8 >> scale); i++)
|
|
store_vr (SD_, scale, VD, i,
|
|
EXTRACTED (value_acc (SD_, scale, i),
|
|
(24 << scale) - 1,
|
|
(16 << scale) - 0));
|
|
}
|
|
|
|
|
|
|
|
// Vector Element Shuffle.
|
|
|
|
010010,0000,0,5.VT,5.VS,5.VD,011111::::SHFL.UPUH.fmt
|
|
"shfl.upuh.%s<SEL> v<VD>, v<VS>, <VT>"
|
|
*mdmx:
|
|
{
|
|
int i;
|
|
int scale = get_scale (SD_, SEL);
|
|
for (i = 0; i < 4; i++)
|
|
{
|
|
store_vr (SD_, 1, VD, i,
|
|
value_vr (SD_, 0, VS, i + 4) & 0xff);
|
|
}
|
|
}
|
|
|
|
010010,0001,0,5.VT,5.VS,5.VD,011111::::SHFL.UPUL.fmt
|
|
"shfl.upul.%s<SEL> v<VD>, v<VS>, <VT>"
|
|
*mdmx:
|
|
{
|
|
int i;
|
|
for (i = 0; i < 4; i++)
|
|
{
|
|
store_vr (SD_, 1, VD, i,
|
|
value_vr (SD_, 0, VS, i) & 0xff);
|
|
}
|
|
}
|
|
|
|
010010,0000,0,5.VT,5.VS,5.VD,011111::::SHFL.UPSH.fmt
|
|
"shfl.upsh.%s<SEL> v<VD>, v<VS>, <VT>"
|
|
*mdmx:
|
|
{
|
|
int i;
|
|
int scale = get_scale (SD_, SEL);
|
|
for (i = 0; i < 4; i++)
|
|
{
|
|
store_vr (SD_, 1, VD, i,
|
|
value_vr (SD_, 0, VS, i + 4));
|
|
}
|
|
}
|
|
|
|
010010,0001,0,5.VT,5.VS,5.VD,011111::::SHFL.UPSL.fmt
|
|
"shfl.upsl.%s<SEL> v<VD>, v<VS>, <VT>"
|
|
*mdmx:
|
|
{
|
|
int i;
|
|
for (i = 0; i < 4; i++)
|
|
{
|
|
store_vr (SD_, 1, VD, i,
|
|
value_vr (SD_, 0, VS, i));
|
|
}
|
|
}
|
|
|
|
010010,0100,1.SEL,5.VT,5.VS,5.VD,011111::::SHFL.PACH.fmt
|
|
"shfl.pach.%s<SEL> v<VD>, v<VS>, <VT>"
|
|
*mdmx:
|
|
// start-sanitize-vr5400
|
|
*vr5400:
|
|
// end-sanitize-vr5400
|
|
{
|
|
int i;
|
|
int scale = get_scale (SD_, SEL);
|
|
for (i = 0; i < (4 >> scale); i++)
|
|
{
|
|
store_vr (SD_, scale, VD, i,
|
|
value_vr (SD_, scale, VT, i * 2 + 1));
|
|
store_vr (SD_, scale, VD, 1 + (4 >> scale),
|
|
value_vr (SD_, scale, VS, i * 2 + 1));
|
|
}
|
|
}
|
|
|
|
010010,0101,1.SEL,5.VT,5.VS,5.VD,011111::::SHFL.PACL.fmt
|
|
"shfl.pacl.%s<SEL> v<VD>, v<VS>, <VT>"
|
|
*mdmx:
|
|
// start-sanitize-vr5400
|
|
*vr5400:
|
|
// end-sanitize-vr5400
|
|
{
|
|
int i;
|
|
int scale = get_scale (SD_, SEL);
|
|
for (i = 0; i < (4 >> scale); i++)
|
|
{
|
|
store_vr (SD_, scale, VD, i,
|
|
value_vr (SD_, scale, VT, i * 2));
|
|
store_vr (SD_, scale, VD, 1 + (4 >> scale),
|
|
value_vr (SD_, scale, VS, i * 2));
|
|
}
|
|
}
|
|
|
|
010010,0110,1.SEL,5.VT,5.VS,5.VD,011111::::SHFL.MIXH.fmt
|
|
"shfl.mixh.%s<SEL> v<VD>, v<VS>, <VT>"
|
|
*mdmx:
|
|
// start-sanitize-vr5400
|
|
*vr5400:
|
|
// end-sanitize-vr5400
|
|
{
|
|
int i;
|
|
int scale = get_scale (SD_, SEL);
|
|
for (i = 0; i < (4 >> scale); i++)
|
|
{
|
|
store_vr (SD_, scale, VD, i * 2,
|
|
value_vr (SD_, scale, VT, i + (4 >> scale)));
|
|
store_vr (SD_, scale, VD, i * 2 + 1,
|
|
value_vr (SD_, scale, VS, i + (4 >> scale)));
|
|
}
|
|
}
|
|
|
|
010010,0111,1.SEL,5.VT,5.VS,5.VD,011111::::SHFL.MIXL.fmt
|
|
"shfl.mixl.%s<SEL> v<VD>, v<VS>, <VT>"
|
|
*mdmx:
|
|
// start-sanitize-vr5400
|
|
*vr5400:
|
|
// end-sanitize-vr5400
|
|
{
|
|
int i;
|
|
int scale = get_scale (SD_, SEL);
|
|
for (i = 0; i < (4 >> scale); i++)
|
|
{
|
|
store_vr (SD_, scale, VD, i * 2,
|
|
value_vr (SD_, scale, VT, i));
|
|
store_vr (SD_, scale, VD, i * 2 + 1,
|
|
value_vr (SD_, scale, VS, i));
|
|
}
|
|
}
|
|
|
|
010010,100,01,5.VT,5.VS,5.VD,011111::::SHFL.BFLA.fmt
|
|
"shfl.bfla.qh v<VD>, v<VS>, <VT>"
|
|
*mdmx:
|
|
{
|
|
store_vr (SD_, 1, VD, 0,
|
|
value_vr (SD_, 1, VT, 1));
|
|
store_vr (SD_, 1, VD, 1,
|
|
value_vr (SD_, 1, VS, 0));
|
|
store_vr (SD_, 1, VD, 2,
|
|
value_vr (SD_, 1, VT, 3));
|
|
store_vr (SD_, 1, VD, 3,
|
|
value_vr (SD_, 1, VS, 2));
|
|
}
|
|
|
|
010010,101,01,5.VT,5.VS,5.VD,011111::::SHFL.BFLB.fmt
|
|
"shfl.bflb.qh v<VD>, v<VS>, <VT>"
|
|
*mdmx:
|
|
{
|
|
store_vr (SD_, 1, VD, 0,
|
|
value_vr (SD_, 1, VT, 3));
|
|
store_vr (SD_, 1, VD, 1,
|
|
value_vr (SD_, 1, VS, 2));
|
|
store_vr (SD_, 1, VD, 2,
|
|
value_vr (SD_, 1, VT, 1));
|
|
store_vr (SD_, 1, VD, 3,
|
|
value_vr (SD_, 1, VS, 0));
|
|
}
|
|
|
|
010010,101,01,5.VT,5.VS,5.VD,011111::::SHFL.REPA.fmt
|
|
"shfl.repa.qh v<VD>, v<VS>, <VT>"
|
|
*mdmx:
|
|
{
|
|
store_vr (SD_, 1, VD, 0,
|
|
value_vr (SD_, 1, VT, 2));
|
|
store_vr (SD_, 1, VD, 1,
|
|
value_vr (SD_, 1, VT, 3));
|
|
store_vr (SD_, 1, VD, 2,
|
|
value_vr (SD_, 1, VS, 2));
|
|
store_vr (SD_, 1, VD, 3,
|
|
value_vr (SD_, 1, VS, 3));
|
|
}
|
|
|
|
010010,101,01,5.VT,5.VS,5.VD,011111::::SHFL.REPB.fmt
|
|
"shfl.repb.qh v<VD>, v<VS>, <VT>"
|
|
*mdmx:
|
|
{
|
|
store_vr (SD_, 1, VD, 0,
|
|
value_vr (SD_, 1, VT, 0));
|
|
store_vr (SD_, 1, VD, 1,
|
|
value_vr (SD_, 1, VT, 1));
|
|
store_vr (SD_, 1, VD, 2,
|
|
value_vr (SD_, 1, VS, 0));
|
|
store_vr (SD_, 1, VD, 3,
|
|
value_vr (SD_, 1, VS, 1));
|
|
}
|
|
|
|
|
|
|
|
// Vector Shift Left Logical
|
|
|
|
010010,5.SEL,5.VT,5.VS,5.VD,010000::::SLL.fmt
|
|
"sll.%s<SEL> v<VD>, v<VS>, %s<VT#SEL,VT>"
|
|
*mdmx:
|
|
// start-sanitize-vr5400
|
|
*vr5400:
|
|
// end-sanitize-vr5400
|
|
{
|
|
int i;
|
|
int scale = get_scale (SD_, SEL);
|
|
int mask = (4 << scale) - 1;
|
|
for (i = 0; i < (8 >> scale); i++)
|
|
store_vr (SD_, scale, VD, i,
|
|
(value_vr (SD_, scale, VS, i)
|
|
<< (select_vr (SD_, SEL, VT, i) & mask)));
|
|
}
|
|
|
|
|
|
|
|
// Vector Shift Right Arithmetic
|
|
|
|
010010,5.SEL,5.VT,5.VS,5.VD,010011::::SRA.fmt
|
|
"sra.%s<SEL> v<VD>, v<VS>, %s<VT#SEL,VT>"
|
|
*mdmx:
|
|
{
|
|
int i;
|
|
int mask = (4 << scale) - 1;
|
|
int scale = get_scale (SD_, SEL);
|
|
for (i = 0; i < (8 >> scale); i++)
|
|
store_vr (SD_, scale, VD, i,
|
|
(value_vr (SD_, scale, VS, i)
|
|
>> (select_vr (SD_, SEL, VT, i) & mask)));
|
|
}
|
|
|
|
|
|
|
|
// Vector Shift Right Logical.
|
|
|
|
010010,5.SEL,5.VT,5.VS,5.VD,010010::::SRL.fmt
|
|
"srl.%s<SEL> v<VD>, v<VS>, %s<VT#SEL,VT>"
|
|
*mdmx:
|
|
// start-sanitize-vr5400
|
|
*vr5400:
|
|
// end-sanitize-vr5400
|
|
{
|
|
int i;
|
|
int scale = get_scale (SD_, SEL);
|
|
int mask = (4 << scale) - 1;
|
|
int zeros = (1 << (8 << scale)) - 1;
|
|
for (i = 0; i < (8 >> scale); i++)
|
|
store_vr (SD_, scale, VD, i,
|
|
((value_vr (SD_, scale, VS, i) & zeros)
|
|
>> (select_vr (SD_, SEL, VT, i) & mask)));
|
|
}
|
|
|
|
|
|
|
|
// Vector Subtract.
|
|
|
|
010010,5.SEL,5.VT,5.VS,5.VD,001010::::SUB.fmt
|
|
"sub.%s<SEL> v<VD>, v<VS>, %s<VT#SEL,VT>"
|
|
*mdmx:
|
|
// start-sanitize-vr5400
|
|
*vr5400:
|
|
// end-sanitize-vr5400
|
|
{
|
|
int i;
|
|
int scale = get_scale (SD_, SEL);
|
|
for (i = 0; i < (8 >> scale); i++)
|
|
store_vr (SD_, scale, VD, i,
|
|
(value_vr (SD_, scale, VS, i)
|
|
- select_vr (SD_, SEL, VT, i)));
|
|
}
|
|
|
|
|
|
|
|
// Accumulate Vector Difference
|
|
|
|
010010,5.SEL,5.VT,5.VS,0,0000,110110::::SUBA.fmt
|
|
"suba.%s<SEL> v<VD>, v<VS>, %s<VT#SEL,VT>"
|
|
*mdmx:
|
|
{
|
|
int i;
|
|
int scale = get_scale (SD_, SEL);
|
|
for (i = 0; i < (8 >> scale); i++)
|
|
store_acc (SD_, scale, VD, i,
|
|
(value_acc (SD, scale, i)
|
|
+ (signed64) value_vr (SD_, scale, VS, i)
|
|
- (signed64) select_vr (SD_, SEL, VT, i)));
|
|
}
|
|
|
|
|
|
|
|
// Load Vector Difference
|
|
|
|
010010,5.SEL,5.VT,5.VS,1,0000,110110::::SUBL.fmt
|
|
"subl.%s<SEL> v<VD>, v<VS>, %s<VT#SEL,VT>"
|
|
*mdmx:
|
|
{
|
|
int i;
|
|
int scale = get_scale (SD_, SEL);
|
|
for (i = 0; i < (8 >> scale); i++)
|
|
store_acc (SD_, scale, VD, i,
|
|
((signed64) value_vr (SD_, scale, VS, i)
|
|
- (signed64) select_vr (SD_, SEL, VT, i)));
|
|
}
|
|
|
|
|
|
|
|
// Write Accumulator High.
|
|
|
|
010010,1000,1.SEL,00000,5.VS,00000,111110::::WACH.fmt
|
|
"wach.%s<SEL> v<VS>"
|
|
*mdmx:
|
|
// start-sanitize-vr5400
|
|
*vr5400:
|
|
// end-sanitize-vr5400
|
|
{
|
|
int i;
|
|
int scale = get_scale (SD_, SEL);
|
|
for (i = 0; i < (8 >> scale); i++)
|
|
store_acc (SD_, scale, i,
|
|
(((signed64) value_vr (SD_, scale, VS, i) << (16 << scale))
|
|
| MASKED (value_acc (SD_, scale, i), (16 << scale) - 1, 0)));
|
|
}
|
|
|
|
|
|
|
|
// Vector Write Accumulator Low.
|
|
|
|
010010,0000,1.SEL,5.VT,5.VS,00000,111110::::WACL.fmt
|
|
"wacl.%s<SEL> v<VS>, <VT>"
|
|
*mdmx:
|
|
// start-sanitize-vr5400
|
|
*vr5400:
|
|
// end-sanitize-vr5400
|
|
{
|
|
int i;
|
|
int scale = get_scale (SD_, SEL);
|
|
for (i = 0; i < (8 >> scale); i++)
|
|
store_acc (SD_, scale, i,
|
|
(((signed64) value_vr (SD_, scale, VS, i) << (16 << scale))
|
|
| MASKED (value_vr (SD_, scale, VT, i),
|
|
(16 << scale) - 1, 0)));
|
|
}
|
|
|
|
|
|
|
|
// Vector Xor.
|
|
|
|
010010,5.SEL,5.VT,5.VS,5.VD,001101::::XOR.fmt
|
|
"xor.%s<SEL> v<VD>, v<VS>, %s<VT#SEL,VT>"
|
|
*mdmx:
|
|
// start-sanitize-vr5400
|
|
*vr5400:
|
|
// end-sanitize-vr5400
|
|
{
|
|
int i;
|
|
int scale = get_scale (SD_, SEL);
|
|
for (i = 0; i < (8 >> scale); i++)
|
|
store_vr (SD_, scale, VD, i,
|
|
(value_vr (SD_, scale, VS, i)
|
|
^ select_vr (SD_, SEL, VT, i)));
|
|
}
|