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565 lines
8.5 KiB
C
565 lines
8.5 KiB
C
/* Misc. support for CPU family sh64.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright 1996-2017 Free Software Foundation, Inc.
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This file is part of the GNU simulators.
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This file is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License along
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with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#define WANT_CPU sh64
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#define WANT_CPU_SH64
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#include "sim-main.h"
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#include "cgen-ops.h"
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/* Get the value of h-pc. */
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UDI
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sh64_h_pc_get (SIM_CPU *current_cpu)
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{
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return GET_H_PC ();
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}
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/* Set a value for h-pc. */
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void
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sh64_h_pc_set (SIM_CPU *current_cpu, UDI newval)
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{
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SET_H_PC (newval);
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}
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/* Get the value of h-gr. */
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DI
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sh64_h_gr_get (SIM_CPU *current_cpu, UINT regno)
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{
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return GET_H_GR (regno);
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}
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/* Set a value for h-gr. */
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void
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sh64_h_gr_set (SIM_CPU *current_cpu, UINT regno, DI newval)
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{
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SET_H_GR (regno, newval);
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}
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/* Get the value of h-grc. */
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SI
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sh64_h_grc_get (SIM_CPU *current_cpu, UINT regno)
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{
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return GET_H_GRC (regno);
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}
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/* Set a value for h-grc. */
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void
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sh64_h_grc_set (SIM_CPU *current_cpu, UINT regno, SI newval)
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{
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SET_H_GRC (regno, newval);
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}
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/* Get the value of h-cr. */
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DI
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sh64_h_cr_get (SIM_CPU *current_cpu, UINT regno)
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{
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return GET_H_CR (regno);
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}
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/* Set a value for h-cr. */
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void
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sh64_h_cr_set (SIM_CPU *current_cpu, UINT regno, DI newval)
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{
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SET_H_CR (regno, newval);
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}
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/* Get the value of h-sr. */
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SI
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sh64_h_sr_get (SIM_CPU *current_cpu)
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{
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return CPU (h_sr);
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}
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/* Set a value for h-sr. */
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void
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sh64_h_sr_set (SIM_CPU *current_cpu, SI newval)
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{
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CPU (h_sr) = newval;
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}
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/* Get the value of h-fpscr. */
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SI
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sh64_h_fpscr_get (SIM_CPU *current_cpu)
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{
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return CPU (h_fpscr);
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}
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/* Set a value for h-fpscr. */
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void
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sh64_h_fpscr_set (SIM_CPU *current_cpu, SI newval)
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{
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CPU (h_fpscr) = newval;
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}
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/* Get the value of h-frbit. */
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BI
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sh64_h_frbit_get (SIM_CPU *current_cpu)
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{
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return GET_H_FRBIT ();
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}
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/* Set a value for h-frbit. */
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void
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sh64_h_frbit_set (SIM_CPU *current_cpu, BI newval)
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{
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SET_H_FRBIT (newval);
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}
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/* Get the value of h-szbit. */
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BI
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sh64_h_szbit_get (SIM_CPU *current_cpu)
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{
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return GET_H_SZBIT ();
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}
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/* Set a value for h-szbit. */
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void
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sh64_h_szbit_set (SIM_CPU *current_cpu, BI newval)
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{
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SET_H_SZBIT (newval);
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}
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/* Get the value of h-prbit. */
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BI
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sh64_h_prbit_get (SIM_CPU *current_cpu)
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{
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return GET_H_PRBIT ();
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}
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/* Set a value for h-prbit. */
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void
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sh64_h_prbit_set (SIM_CPU *current_cpu, BI newval)
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{
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SET_H_PRBIT (newval);
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}
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/* Get the value of h-sbit. */
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BI
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sh64_h_sbit_get (SIM_CPU *current_cpu)
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{
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return GET_H_SBIT ();
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}
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/* Set a value for h-sbit. */
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void
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sh64_h_sbit_set (SIM_CPU *current_cpu, BI newval)
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{
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SET_H_SBIT (newval);
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}
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/* Get the value of h-mbit. */
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BI
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sh64_h_mbit_get (SIM_CPU *current_cpu)
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{
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return GET_H_MBIT ();
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}
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/* Set a value for h-mbit. */
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void
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sh64_h_mbit_set (SIM_CPU *current_cpu, BI newval)
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{
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SET_H_MBIT (newval);
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}
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/* Get the value of h-qbit. */
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BI
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sh64_h_qbit_get (SIM_CPU *current_cpu)
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{
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return GET_H_QBIT ();
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}
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/* Set a value for h-qbit. */
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void
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sh64_h_qbit_set (SIM_CPU *current_cpu, BI newval)
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{
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SET_H_QBIT (newval);
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}
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/* Get the value of h-fr. */
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SF
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sh64_h_fr_get (SIM_CPU *current_cpu, UINT regno)
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{
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return CPU (h_fr[regno]);
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}
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/* Set a value for h-fr. */
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void
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sh64_h_fr_set (SIM_CPU *current_cpu, UINT regno, SF newval)
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{
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CPU (h_fr[regno]) = newval;
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}
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/* Get the value of h-fp. */
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SF
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sh64_h_fp_get (SIM_CPU *current_cpu, UINT regno)
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{
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return GET_H_FP (regno);
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}
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/* Set a value for h-fp. */
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void
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sh64_h_fp_set (SIM_CPU *current_cpu, UINT regno, SF newval)
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{
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SET_H_FP (regno, newval);
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}
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/* Get the value of h-fv. */
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SF
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sh64_h_fv_get (SIM_CPU *current_cpu, UINT regno)
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{
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return GET_H_FV (regno);
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}
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/* Set a value for h-fv. */
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void
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sh64_h_fv_set (SIM_CPU *current_cpu, UINT regno, SF newval)
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{
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SET_H_FV (regno, newval);
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}
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/* Get the value of h-fmtx. */
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SF
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sh64_h_fmtx_get (SIM_CPU *current_cpu, UINT regno)
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{
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return GET_H_FMTX (regno);
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}
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/* Set a value for h-fmtx. */
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void
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sh64_h_fmtx_set (SIM_CPU *current_cpu, UINT regno, SF newval)
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{
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SET_H_FMTX (regno, newval);
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}
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/* Get the value of h-dr. */
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DF
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sh64_h_dr_get (SIM_CPU *current_cpu, UINT regno)
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{
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return GET_H_DR (regno);
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}
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/* Set a value for h-dr. */
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void
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sh64_h_dr_set (SIM_CPU *current_cpu, UINT regno, DF newval)
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{
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SET_H_DR (regno, newval);
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}
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/* Get the value of h-fsd. */
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DF
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sh64_h_fsd_get (SIM_CPU *current_cpu, UINT regno)
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{
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return GET_H_FSD (regno);
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}
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/* Set a value for h-fsd. */
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void
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sh64_h_fsd_set (SIM_CPU *current_cpu, UINT regno, DF newval)
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{
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SET_H_FSD (regno, newval);
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}
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/* Get the value of h-fmov. */
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DF
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sh64_h_fmov_get (SIM_CPU *current_cpu, UINT regno)
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{
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return GET_H_FMOV (regno);
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}
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/* Set a value for h-fmov. */
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void
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sh64_h_fmov_set (SIM_CPU *current_cpu, UINT regno, DF newval)
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{
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SET_H_FMOV (regno, newval);
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}
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/* Get the value of h-tr. */
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DI
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sh64_h_tr_get (SIM_CPU *current_cpu, UINT regno)
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{
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return CPU (h_tr[regno]);
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}
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/* Set a value for h-tr. */
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void
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sh64_h_tr_set (SIM_CPU *current_cpu, UINT regno, DI newval)
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{
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CPU (h_tr[regno]) = newval;
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}
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/* Get the value of h-endian. */
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BI
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sh64_h_endian_get (SIM_CPU *current_cpu)
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{
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return GET_H_ENDIAN ();
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}
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/* Set a value for h-endian. */
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void
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sh64_h_endian_set (SIM_CPU *current_cpu, BI newval)
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{
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SET_H_ENDIAN (newval);
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}
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/* Get the value of h-ism. */
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BI
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sh64_h_ism_get (SIM_CPU *current_cpu)
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{
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return GET_H_ISM ();
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}
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/* Set a value for h-ism. */
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void
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sh64_h_ism_set (SIM_CPU *current_cpu, BI newval)
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{
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SET_H_ISM (newval);
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}
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/* Get the value of h-frc. */
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SF
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sh64_h_frc_get (SIM_CPU *current_cpu, UINT regno)
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{
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return GET_H_FRC (regno);
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}
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/* Set a value for h-frc. */
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void
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sh64_h_frc_set (SIM_CPU *current_cpu, UINT regno, SF newval)
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{
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SET_H_FRC (regno, newval);
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}
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/* Get the value of h-drc. */
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DF
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sh64_h_drc_get (SIM_CPU *current_cpu, UINT regno)
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{
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return GET_H_DRC (regno);
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}
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/* Set a value for h-drc. */
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void
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sh64_h_drc_set (SIM_CPU *current_cpu, UINT regno, DF newval)
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{
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SET_H_DRC (regno, newval);
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}
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/* Get the value of h-xf. */
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SF
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sh64_h_xf_get (SIM_CPU *current_cpu, UINT regno)
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{
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return GET_H_XF (regno);
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}
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/* Set a value for h-xf. */
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void
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sh64_h_xf_set (SIM_CPU *current_cpu, UINT regno, SF newval)
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{
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SET_H_XF (regno, newval);
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}
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/* Get the value of h-xd. */
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DF
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sh64_h_xd_get (SIM_CPU *current_cpu, UINT regno)
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{
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return GET_H_XD (regno);
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}
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/* Set a value for h-xd. */
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void
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sh64_h_xd_set (SIM_CPU *current_cpu, UINT regno, DF newval)
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{
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SET_H_XD (regno, newval);
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}
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/* Get the value of h-fvc. */
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SF
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sh64_h_fvc_get (SIM_CPU *current_cpu, UINT regno)
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{
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return GET_H_FVC (regno);
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}
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/* Set a value for h-fvc. */
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void
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sh64_h_fvc_set (SIM_CPU *current_cpu, UINT regno, SF newval)
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{
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SET_H_FVC (regno, newval);
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}
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/* Get the value of h-gbr. */
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SI
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sh64_h_gbr_get (SIM_CPU *current_cpu)
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{
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return GET_H_GBR ();
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}
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/* Set a value for h-gbr. */
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void
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sh64_h_gbr_set (SIM_CPU *current_cpu, SI newval)
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{
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SET_H_GBR (newval);
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}
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/* Get the value of h-vbr. */
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SI
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sh64_h_vbr_get (SIM_CPU *current_cpu)
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{
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return GET_H_VBR ();
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}
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/* Set a value for h-vbr. */
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void
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sh64_h_vbr_set (SIM_CPU *current_cpu, SI newval)
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{
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SET_H_VBR (newval);
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}
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/* Get the value of h-pr. */
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SI
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sh64_h_pr_get (SIM_CPU *current_cpu)
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{
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return GET_H_PR ();
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}
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/* Set a value for h-pr. */
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void
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sh64_h_pr_set (SIM_CPU *current_cpu, SI newval)
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{
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SET_H_PR (newval);
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}
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/* Get the value of h-macl. */
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SI
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sh64_h_macl_get (SIM_CPU *current_cpu)
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{
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return GET_H_MACL ();
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}
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/* Set a value for h-macl. */
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void
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sh64_h_macl_set (SIM_CPU *current_cpu, SI newval)
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{
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SET_H_MACL (newval);
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}
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/* Get the value of h-mach. */
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SI
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sh64_h_mach_get (SIM_CPU *current_cpu)
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{
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return GET_H_MACH ();
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}
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/* Set a value for h-mach. */
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void
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sh64_h_mach_set (SIM_CPU *current_cpu, SI newval)
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{
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SET_H_MACH (newval);
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}
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/* Get the value of h-tbit. */
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BI
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sh64_h_tbit_get (SIM_CPU *current_cpu)
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{
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return GET_H_TBIT ();
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}
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/* Set a value for h-tbit. */
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void
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sh64_h_tbit_set (SIM_CPU *current_cpu, BI newval)
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{
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SET_H_TBIT (newval);
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}
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/* Record trace results for INSN. */
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void
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sh64_record_trace_results (SIM_CPU *current_cpu, CGEN_INSN *insn,
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int *indices, TRACE_RECORD *tr)
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{
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}
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