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Include "features/rs6000/powerpc-vsx64.c". (ppc_supply_vsxregset): New function. (ppc_collect_vsxregset): New function. (IS_VSX_PSEUDOREG): New macro. (IS_EFP_PSEUDOREG): New macro. (vsx_register_p): New function. (ppc_vsx_support_p): New function. (rs6000_builtin_type_vec128): New function. (rs6000_register_name): Hide upper halves of vs0~vs31. Return correct names for VSX registers and EFPR registers. (rs6000_pseudo_register_type): Return correct types for VSX and EFPR registers. (rs6000_pseudo_register_reggroup_p): Return correct group for VSX and EFPR registers. (ppc_pseudo_register_read): Rename to dfp_pseudo_register_read. (ppc_pseudo_register_write): Rename to dfp_pseudo_register_write. (vsx_pseudo_register_read): New function. (vsx_pseudo_register_write): New function. (efpr_pseudo_register_read): New function. (efpr_pseudo_register_write): New function. (rs6000_pseudo_register_read): Call new VSX and EFPR read functions. (rs6000_pseudo_register_write): Call new VSX and EFPR write functions. (rs6000_gdbarch_init): Declare have_vsx. Initialize new upper half VSX registers. Initialize VSX-related and EFPR-related pseudo-registers variables. Adjust the number of pseudo registers accordingly. * ppc-linux-nat.c: Define PTRACE_GETVSXREGS, PTRACE_SETVSXREGS and SIZEOF_VSRREGS. (gdb_vsxregset_t): New type. (have_ptrace_getsetvsxregs): New variable. (fetch_vsx_register): New function. (fetch_register): Handle VSX registers. (fetch_vsx_registers): New function. (fetch_ppc_registers): Handle VSX registers. (store_ppc_registers): Handle VSX registers. (store_vsx_register): New function. (store_register): Handle VSX registers. (store_vsx_registers): New function. (ppc_linux_read_description): Handle VSX-enabled inferiors. (gdb_vsxregset_t): New type. (supply_vsxregset): New function. (fill_vsxregset): New function. * ppc-tdep.h (vsx_register_p): New prototype. (vsx_support_p): New prototype. (ppc_vsr0_regnum): New variable. (ppc_vsr0_upper_regnum): Likewise. (ppc_efpr0_regnum): Likewise. (ppc_builtin_type_vec128): New type. (ppc_num_vsrs): New constant. (ppc_num_vshrs): New constant. (ppc_num_efprs): Likewise. Define POWERPC_VEC_VSX PPC_VSR0_UPPER_REGNUM and PPC_VSR31_UPPER_REGNUM. (ppc_supply_vsxregset): New prototype. (ppc_collect_vsxregset): New prototype. * ppc-linux-tdep.c: Include "features/rs6000/powerpc-vsx32l.c" Include "features/rs6000/powerpc-vsx64l.c". (_initialize_ppc_linux_tdep): Initialize VSX-enabled targets. (ppc_linux_regset_sections): Add new ".reg-ppc-vsx" field. (ppc32_linux_vsxregset): New 32-bit VSX-enabled regset. (ppc_linux_regset_from_core_section): Handle VSX core section. (ppc_linux_core_read_description): Support VSX-enabled core files. * ppc-linux-tdep.h: Declare *tdesc_powerpc_vsx32l Declare tdesc_powerpc_vsx64l * corelow.c (get_core_register_section): Support VSX-enabled core files. * features/rs6000/power-vsx.xml: New VSX descriptions. * features/rs6000/powerpc-vsx32.xml: New file. * features/rs6000/powerpc-vsx32l.xml: New file. * features/rs6000/powerpc-vsx64.xml: New file. * features/rs6000/powerpc-vsx64l.xml: New file. * features/rs6000/powerpc-vsx32.c: New file (generated). * features/rs6000/powerpc-vsx32l.c: New file (generated). * features/rs6000/powerpc-vsx64.c: New file (generated). * features/rs6000/powerpc-vsx64l.c: New file (generated). * features/Makefile: Updated with new descriptions. * regformats/rs6000/powerpc-vsx32l.dat: New file (generated). * regformats/rs6000/powerpc-vsx64l.dat: New file (generated). * testsuite/gdb.arch/vsx-regs.c: New source file. * testsuite/gdb.arch/vsx-regs.exp: New testcase. * testsuite/lib/gdb.exp (skip_vsx_tests): New function.
144 lines
1.2 KiB
Plaintext
144 lines
1.2 KiB
Plaintext
# DO NOT EDIT: generated from rs6000/powerpc-vsx64l.xml
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name:powerpc_vsx64l
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xmltarget:powerpc-vsx64l.xml
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expedite:r1,pc
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64:r0
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64:r1
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64:r2
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64:r3
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64:r4
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64:r5
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64:r6
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64:r7
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64:r8
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64:r9
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64:r10
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64:r20
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64:r21
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64:r22
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64:r23
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64:r24
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64:r25
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64:r26
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64:r27
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64:r28
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64:r29
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64:r30
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64:r31
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64:f0
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64:f1
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64:f31
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64:pc
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64:msr
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32:cr
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64:lr
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64:ctr
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32:xer
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32:fpscr
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64:orig_r3
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64:trap
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128:vr0
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128:vr1
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128:vr2
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128:vr3
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128:vr4
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128:vr5
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32:vscr
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32:vrsave
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64:vs0h
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64:vs1h
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64:vs2h
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64:vs3h
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64:vs4h
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64:vs5h
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64:vs6h
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64:vs7h
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64:vs8h
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64:vs9h
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64:vs10h
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64:vs11h
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64:vs12h
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64:vs13h
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64:vs14h
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64:vs22h
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64:vs23h
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64:vs24h
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64:vs25h
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64:vs26h
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64:vs27h
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64:vs28h
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64:vs29h
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64:vs30h
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64:vs31h
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