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fd67aa1129
Adds two new external authors to etc/update-copyright.py to cover bfd/ax_tls.m4, and adds gprofng to dirs handled automatically, then updates copyright messages as follows: 1) Update cgen/utils.scm emitted copyrights. 2) Run "etc/update-copyright.py --this-year" with an extra external author I haven't committed, 'Kalray SA.', to cover gas testsuite files (which should have their copyright message removed). 3) Build with --enable-maintainer-mode --enable-cgen-maint=yes. 4) Check out */po/*.pot which we don't update frequently.
194 lines
7.4 KiB
C
194 lines
7.4 KiB
C
/* BFD library support routines for the Renesas / SuperH SH architecture.
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Copyright (C) 1993-2024 Free Software Foundation, Inc.
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Hacked by Steve Chamberlain of Cygnus Support.
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This file is part of BFD, the Binary File Descriptor library.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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#include "sysdep.h"
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#include "bfd.h"
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#include "libbfd.h"
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#include "../opcodes/sh-opc.h"
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#define N(NUMBER, PRINT, DEFAULT, NEXT) \
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{ \
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32, /* Bits in a word. */ \
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32, /* Bits in an address. */ \
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8, /* Bits in a byte. */ \
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bfd_arch_sh, \
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NUMBER, \
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"sh", \
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PRINT, \
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1, /* Section alignment power. */ \
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DEFAULT, \
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bfd_default_compatible, \
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bfd_default_scan, \
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bfd_arch_default_fill, \
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NEXT, \
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0 /* Maximum offset of a reloc from the start of an insn. */ \
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}
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static const bfd_arch_info_type arch_info_struct[] =
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{
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N (bfd_mach_sh2, "sh2", false, arch_info_struct + 1),
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N (bfd_mach_sh2e, "sh2e", false, arch_info_struct + 2),
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N (bfd_mach_sh_dsp, "sh-dsp", false, arch_info_struct + 3),
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N (bfd_mach_sh3, "sh3", false, arch_info_struct + 4),
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N (bfd_mach_sh3_nommu, "sh3-nommu", false, arch_info_struct + 5),
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N (bfd_mach_sh3_dsp, "sh3-dsp", false, arch_info_struct + 6),
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N (bfd_mach_sh3e, "sh3e", false, arch_info_struct + 7),
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N (bfd_mach_sh4, "sh4", false, arch_info_struct + 8),
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N (bfd_mach_sh4a, "sh4a", false, arch_info_struct + 9),
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N (bfd_mach_sh4al_dsp, "sh4al-dsp", false, arch_info_struct + 10),
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N (bfd_mach_sh4_nofpu, "sh4-nofpu", false, arch_info_struct + 11),
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N (bfd_mach_sh4_nommu_nofpu, "sh4-nommu-nofpu", false, arch_info_struct + 12),
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N (bfd_mach_sh4a_nofpu, "sh4a-nofpu", false, arch_info_struct + 13),
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N (bfd_mach_sh2a, "sh2a", false, arch_info_struct + 14),
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N (bfd_mach_sh2a_nofpu, "sh2a-nofpu", false, arch_info_struct + 15),
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N (bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu, "sh2a-nofpu-or-sh4-nommu-nofpu", false, arch_info_struct + 16),
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N (bfd_mach_sh2a_nofpu_or_sh3_nommu, "sh2a-nofpu-or-sh3-nommu", false, arch_info_struct + 17),
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N (bfd_mach_sh2a_or_sh4, "sh2a-or-sh4", false, arch_info_struct + 18),
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N (bfd_mach_sh2a_or_sh3e, "sh2a-or-sh3e", false, NULL)
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};
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const bfd_arch_info_type bfd_sh_arch =
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N (bfd_mach_sh, "sh", true, arch_info_struct + 0);
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/* This table defines the mappings from the BFD internal numbering
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system to the opcodes internal flags system.
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It is used by the functions defined below.
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The prototypes for these SH specific functions are found in
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sh-opc.h . */
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static struct { unsigned long bfd_mach, arch, arch_up; } bfd_to_arch_table[] =
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{
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{ bfd_mach_sh, arch_sh1, arch_sh_up },
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{ bfd_mach_sh2, arch_sh2, arch_sh2_up },
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{ bfd_mach_sh2e, arch_sh2e, arch_sh2e_up },
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{ bfd_mach_sh_dsp, arch_sh_dsp, arch_sh_dsp_up },
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{ bfd_mach_sh2a, arch_sh2a, arch_sh2a_up },
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{ bfd_mach_sh2a_nofpu, arch_sh2a_nofpu, arch_sh2a_nofpu_up },
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{ bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu, arch_sh2a_nofpu_or_sh4_nommu_nofpu, arch_sh2a_nofpu_or_sh4_nommu_nofpu_up },
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{ bfd_mach_sh2a_nofpu_or_sh3_nommu, arch_sh2a_nofpu_or_sh3_nommu, arch_sh2a_nofpu_or_sh3_nommu_up },
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{ bfd_mach_sh2a_or_sh4, arch_sh2a_or_sh4, arch_sh2a_or_sh4_up },
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{ bfd_mach_sh2a_or_sh3e, arch_sh2a_or_sh3e, arch_sh2a_or_sh3e_up },
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{ bfd_mach_sh3, arch_sh3, arch_sh3_up },
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{ bfd_mach_sh3_nommu, arch_sh3_nommu, arch_sh3_nommu_up },
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{ bfd_mach_sh3_dsp, arch_sh3_dsp, arch_sh3_dsp_up },
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{ bfd_mach_sh3e, arch_sh3e, arch_sh3e_up },
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{ bfd_mach_sh4, arch_sh4, arch_sh4_up },
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{ bfd_mach_sh4a, arch_sh4a, arch_sh4a_up },
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{ bfd_mach_sh4al_dsp, arch_sh4al_dsp, arch_sh4al_dsp_up },
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{ bfd_mach_sh4_nofpu, arch_sh4_nofpu, arch_sh4_nofpu_up },
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{ bfd_mach_sh4_nommu_nofpu, arch_sh4_nommu_nofpu, arch_sh4_nommu_nofpu_up },
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{ bfd_mach_sh4a_nofpu, arch_sh4a_nofpu, arch_sh4a_nofpu_up },
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{ 0, 0, 0 } /* Terminator. */
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};
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/* Convert a BFD mach number into the right opcodes arch flags
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using the table above. */
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unsigned int
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sh_get_arch_from_bfd_mach (unsigned long mach)
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{
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int i = 0;
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while (bfd_to_arch_table[i].bfd_mach != 0)
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if (bfd_to_arch_table[i].bfd_mach == mach)
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return bfd_to_arch_table[i].arch;
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else
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i++;
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return SH_ARCH_UNKNOWN_ARCH;
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}
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/* Convert a BFD mach number into a set of opcodes arch flags
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describing all the compatible architectures (i.e. arch_up)
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using the table above. */
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unsigned int
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sh_get_arch_up_from_bfd_mach (unsigned long mach)
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{
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int i = 0;
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while (bfd_to_arch_table[i].bfd_mach != 0)
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if (bfd_to_arch_table[i].bfd_mach == mach)
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return bfd_to_arch_table[i].arch_up;
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else
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i++;
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return SH_ARCH_UNKNOWN_ARCH;
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}
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/* Convert an arbitary arch_set - not necessarily corresponding
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directly to anything in the table above - to the most generic
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architecture which supports all the required features, and
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return the corresponding BFD mach. */
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unsigned long
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sh_get_bfd_mach_from_arch_set (unsigned int arch_set)
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{
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unsigned long result = 0;
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unsigned int best = ~arch_set;
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unsigned int co_mask = ~0;
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int i = 0;
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/* If arch_set permits variants with no coprocessor then do not allow
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the other irrelevant co-processor bits to influence the choice:
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e.g. if dsp is disallowed by arch_set, then the algorithm would
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prefer fpu variants over nofpu variants because they also disallow
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dsp - even though the nofpu would be the most correct choice.
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This assumes that EVERY fpu/dsp variant has a no-coprocessor
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counter-part, or their non-fpu/dsp instructions do not have the
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no co-processor bit set. */
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if (arch_set & arch_sh_no_co)
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co_mask = ~(arch_sh_sp_fpu | arch_sh_dp_fpu | arch_sh_has_dsp);
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while (bfd_to_arch_table[i].bfd_mach != 0)
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{
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unsigned int try = bfd_to_arch_table[i].arch_up & co_mask;
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/* Conceptually: Find the architecture with the least number
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of extra features or, if they have the same number, then
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the greatest number of required features. Disregard
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architectures where the required features alone do
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not describe a valid architecture. */
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if (((try & ~arch_set) < (best & ~arch_set)
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|| ((try & ~arch_set) == (best & ~arch_set)
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&& (~try & arch_set) < (~best & arch_set)))
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&& SH_MERGE_ARCH_SET_VALID (try, arch_set))
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{
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result = bfd_to_arch_table[i].bfd_mach;
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best = try;
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}
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i++;
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}
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/* This might happen if a new variant is added to sh-opc.h
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but no corresponding entry is added to the table above. */
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BFD_ASSERT (result != 0);
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return result;
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}
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