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a27e685fa0
This change, with prerequisite 0e5fabeb, provides a toc base aligned
to 256 bytes rather than 8 bytes. This is necessary for a minor gcc
optimisation, allowing use of d-form instructions to correctly access
toc-relative items larger than 8 bytes.
bfd/
* elf64-ppc.c (TOC_BASE_ALIGN): Define.
(ppc64_elf_next_toc_section): Align multi-got toc base.
(ppc64_elf_set_toc): Likewise initial toc base and .TOC. symbol.
ld/
* emulparams/elf64ppc.sh (GOT): Align.
ld/testsuite/
* ld-powerpc/ambiguousv1b.d: Update for aligned .got.
* ld-powerpc/defsym.d: Likewise.
* ld-powerpc/elfv2-2exe.d: Likewise.
* ld-powerpc/elfv2exe.d: Likewise.
* ld-powerpc/elfv2so.d: Likewise.
* ld-powerpc/relbrlt.d: Likewise.
* ld-powerpc/tls.g: Likewise.
* ld-powerpc/tlsexe.d: Likewise.
* ld-powerpc/tlsexe.g: Likewise.
* ld-powerpc/tlsexe.r: Likewise.
* ld-powerpc/tlsexetoc.d: Likewise.
* ld-powerpc/tlsexetoc.g: Likewise.
* ld-powerpc/tlsexetoc.r: Likewise.
* ld-powerpc/tlsso.d: Likewise.
* ld-powerpc/tlsso.g: Likewise.
* ld-powerpc/tlsso.r: Likewise.
* ld-powerpc/tlstoc.g: Likewise.
* ld-powerpc/tlstocso.d: Likewise.
* ld-powerpc/tlstocso.g: Likewise.
* ld-powerpc/tlstocso.r: Likewise.
* ld-powerpc/tocopt.d: Likewise.
* ld-powerpc/tocopt2.d: Likewise.
* ld-powerpc/tocopt3.d: Likewise.
* ld-powerpc/tocopt4.d: Likewise.
* ld-powerpc/tocopt5.d: Likewise.
64 lines
2.5 KiB
Makefile
64 lines
2.5 KiB
Makefile
#source: tlstoc.s
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#as: -a64
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#ld: -shared
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#objdump: -dr
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#target: powerpc64*-*-*
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.*
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Disassembly of section \.text:
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.* <.*plt_call\.__tls_get_addr(|_opt)>:
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.* (f8 41 00 28|28 00 41 f8) std r2,40\(r1\)
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.* (e9 82 80 70|70 80 82 e9) ld r12,-32656\(r2\)
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.* (7d 89 03 a6|a6 03 89 7d) mtctr r12
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.* (e8 42 80 78|78 80 42 e8) ld r2,-32648\(r2\)
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.* (28 22 00 00|00 00 22 28) cmpldi r2,0
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.* (4c e2 04 20|20 04 e2 4c) bnectr\+ *
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.* (48 00 00 ..|.. 00 00 48) b .* <__tls_get_addr@plt>
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.* <\._start>:
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.* (38 62 80 08|08 80 62 38) addi r3,r2,-32760
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.* (4b ff ff ..|.. ff ff 4b) bl .*plt_call.__tls_get_addr.*
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.* (e8 41 00 28|28 00 41 e8) ld r2,40\(r1\)
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.* (38 62 80 18|18 80 62 38) addi r3,r2,-32744
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.* (4b ff ff ..|.. ff ff 4b) bl .*plt_call.__tls_get_addr.*
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.* (e8 41 00 28|28 00 41 e8) ld r2,40\(r1\)
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.* (38 62 80 28|28 80 62 38) addi r3,r2,-32728
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.* (4b ff ff ..|.. ff ff 4b) bl .*plt_call.__tls_get_addr.*
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.* (e8 41 00 28|28 00 41 e8) ld r2,40\(r1\)
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.* (38 62 80 38|38 80 62 38) addi r3,r2,-32712
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.* (4b ff ff ..|.. ff ff 4b) bl .*plt_call.__tls_get_addr.*
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.* (e8 41 00 28|28 00 41 e8) ld r2,40\(r1\)
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.* (39 23 80 40|40 80 23 39) addi r9,r3,-32704
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.* (3d 23 00 00|00 00 23 3d) addis r9,r3,0
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.* (81 49 80 48|48 80 49 81) lwz r10,-32696\(r9\)
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.* (e9 22 80 48|48 80 22 e9) ld r9,-32696\(r2\)
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.* (7d 49 18 2a|2a 18 49 7d) ldx r10,r9,r3
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.* (e9 22 80 50|50 80 22 e9) ld r9,-32688\(r2\)
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.* (7d 49 6a 2e|2e 6a 49 7d) lhzx r10,r9,r13
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.* (89 4d 00 00|00 00 4d 89) lbz r10,0\(r13\)
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.* (3d 2d 00 00|00 00 2d 3d) addis r9,r13,0
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.* (99 49 00 00|00 00 49 99) stb r10,0\(r9\)
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.* (60 00 00 00|00 00 00 60) nop
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.* (00 00 00 00|10 03 01 00) .*
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.* (00 01 03 10|00 00 00 00) .*
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.* <__glink_PLTresolve>:
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.* (7d 88 02 a6|a6 02 88 7d) mflr r12
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.* (42 9f 00 05|05 00 9f 42) bcl 20,4\*cr7\+so,.*
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.* (7d 68 02 a6|a6 02 68 7d) mflr r11
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.* (e8 4b ff f0|f0 ff 4b e8) ld r2,-16\(r11\)
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.* (7d 88 03 a6|a6 03 88 7d) mtlr r12
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.* (7d 62 5a 14|14 5a 62 7d) add r11,r2,r11
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.* (e9 8b 00 00|00 00 8b e9) ld r12,0\(r11\)
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.* (e8 4b 00 08|08 00 4b e8) ld r2,8\(r11\)
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.* (7d 89 03 a6|a6 03 89 7d) mtctr r12
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.* (e9 6b 00 10|10 00 6b e9) ld r11,16\(r11\)
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.* (4e 80 04 20|20 04 80 4e) bctr
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.* (60 00 00 00|00 00 00 60) nop
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.* (60 00 00 00|00 00 00 60) nop
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.* (60 00 00 00|00 00 00 60) nop
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.* <__tls_get_addr@plt>:
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.* (38 00 00 00|00 00 00 38) li r0,0
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.* (4b ff ff c4|c4 ff ff 4b) b .*
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