Shahab Vahedi 5d9cff510e opcodes: Fix the auxiliary register numbers for ARC HS ... The numbers for the auxiliary registers "tlbindex" and "tlbcommand" of ARCv2HS are incorrect. This patch makes the following changes to correct that error. ,------------.-----------------.---------------. | aux. reg. | old (incorrect) | new (correct) | |------------+-----------------+---------------| | tlbindex | 0x463 | 0x464 | | tlbcommand | 0x464 | 0x465 | `------------^-----------------^---------------' opcodes/ 2021-08-17 Shahab Vahedi <shahab@synopsys.com> * arc-regs.h (DEF): Fix the register numbers.		2021-08-17 18:33:05 +02:00
..
po	Deprecate a.out support for NetBSD targets.	2021-08-11 13:17:54 +01:00
.gitignore
aarch64-asm-2.c	Use bool in opcodes	2021-03-31 10:49:23 +10:30
aarch64-asm.c	arm64: add two initializers	2021-04-19 15:41:35 +02:00
aarch64-asm.h	Use bool in opcodes	2021-03-31 10:49:23 +10:30
aarch64-dis-2.c	Use bool in opcodes	2021-03-31 10:49:23 +10:30
aarch64-dis.c	Use bool in opcodes	2021-03-31 10:49:23 +10:30
aarch64-dis.h	Use bool in opcodes	2021-03-31 10:49:23 +10:30
aarch64-gen.c	opcodes: constify aarch64_opcode_tables	2021-07-01 17:51:00 -04:00
aarch64-opc-2.c
aarch64-opc.c	aarch64: New instructions for maintenance of GPT entries cached in a TLB	2021-04-19 15:01:56 +01:00
aarch64-opc.h	Use bool in opcodes	2021-03-31 10:49:23 +10:30
aarch64-tbl.h	opcodes: constify aarch64_opcode_tables	2021-07-01 17:51:00 -04:00
aclocal.m4
alpha-dis.c
alpha-opc.c
arc-dis.c	arc: Construct disassembler options dynamically	2021-06-02 15:32:58 +03:00
arc-dis.h	Use bool in opcodes	2021-03-31 10:49:23 +10:30
arc-ext-tbl.h
arc-ext.c
arc-ext.h
arc-fxi.h	Use bool in opcodes	2021-03-31 10:49:23 +10:30
arc-nps400-tbl.h
arc-opc.c	Use bool in opcodes	2021-03-31 10:49:23 +10:30
arc-regs.h	opcodes: Fix the auxiliary register numbers for ARC HS	2021-08-17 18:33:05 +02:00
arc-tbl.h
arm-dis.c	PATCH [9/10] arm: add 'pacg' instruction for Armv8.1-M pacbti extension	2021-07-26 14:18:24 +02:00
avr-dis.c	Remove bfd_stdint.h	2021-03-31 10:49:23 +10:30
bfin-dis.c	Use bool in opcodes	2021-03-31 10:49:23 +10:30
bpf-asm.c
bpf-desc.c
bpf-desc.h
bpf-dis.c
bpf-ibld.c
bpf-opc.c
bpf-opc.h
cgen-asm.c
cgen-asm.in
cgen-bitset.c
cgen-dis.c	opcodes: make use of __builtin_popcount when available	2021-06-22 09:53:13 +01:00
cgen-dis.in
cgen-ibld.in
cgen-opc.c	C99 opcodes configury	2021-04-05 15:28:04 +09:30
cgen.sh	opcodes: cris: move desc & opc files from sim/	2021-05-24 18:42:34 -04:00
ChangeLog	opcodes: Fix the auxiliary register numbers for ARC HS	2021-08-17 18:33:05 +02:00
ChangeLog-0001
ChangeLog-0203
ChangeLog-2004
ChangeLog-2005
ChangeLog-2006
ChangeLog-2007
ChangeLog-2008
ChangeLog-2009
ChangeLog-2010
ChangeLog-2011
ChangeLog-2012
ChangeLog-2013
ChangeLog-2014
ChangeLog-2015
ChangeLog-2016
ChangeLog-2017
ChangeLog-2018
ChangeLog-2019
ChangeLog-2020
ChangeLog-9297
ChangeLog-9899
config.in	ENABLE_CHECKING in bfd, opcodes, binutils, ld	2021-04-13 00:35:44 +09:30
configure	Update version number and regenerate files	2021-07-03 15:16:48 +01:00
configure.ac	opcodes: cris: move desc & opc files from sim/	2021-05-24 18:42:34 -04:00
configure.com
cr16-dis.c	Remove strneq macro and use startswith.	2021-04-01 15:00:56 +02:00
cr16-opc.c
cris-desc.c	Regen cris files	2021-05-25 17:17:04 +09:30
cris-desc.h	Regen cris files	2021-05-25 17:17:04 +09:30
cris-dis.c	Use bool in opcodes	2021-03-31 10:49:23 +10:30
cris-opc.c
cris-opc.h	Regen cris files	2021-05-25 17:17:04 +09:30
crx-dis.c
crx-opc.c
csky-dis.c	PR28168: [CSKY] Fix stack overflow in disassembler	2021-08-13 14:13:58 +08:00
csky-opc.h	Use bool in opcodes	2021-03-31 10:49:23 +10:30
d10v-dis.c
d10v-opc.c
d30v-dis.c
d30v-opc.c
dep-in.sed
dis-buf.c	Return symbol from symbol_at_address_func	2021-04-06 23:25:09 +09:30
dis-init.c
disassemble.c	Use bool in opcodes	2021-03-31 10:49:23 +10:30
disassemble.h
dlx-dis.c
epiphany-asm.c
epiphany-desc.c
epiphany-desc.h
epiphany-dis.c
epiphany-ibld.c
epiphany-opc.c
epiphany-opc.h
fr30-asm.c
fr30-desc.c
fr30-desc.h
fr30-dis.c
fr30-ibld.c
fr30-opc.c
fr30-opc.h
frv-asm.c
frv-desc.c
frv-desc.h
frv-dis.c
frv-ibld.c
frv-opc.c	Use bool in opcodes	2021-03-31 10:49:23 +10:30
frv-opc.h	Use bool in opcodes	2021-03-31 10:49:23 +10:30
ft32-dis.c
ft32-opc.c
h8300-dis.c	Use bool in opcodes	2021-03-31 10:49:23 +10:30
hppa-dis.c
i386-dis-evex-len.h	x86/Intel: correct AVX512 S/G disassembly	2021-03-10 08:20:29 +01:00
i386-dis-evex-mod.h	x86: drop xmm_m{b,w,d,q}_mode	2021-07-22 13:08:39 +02:00
i386-dis-evex-prefix.h	[PATCH 1/2] Enable Intel AVX512_FP16 instructions	2021-08-05 21:03:41 +08:00
i386-dis-evex-reg.h	x86/Intel: correct AVX512 S/G disassembly	2021-03-10 08:20:29 +01:00
i386-dis-evex-w.h	[PATCH 1/2] Enable Intel AVX512_FP16 instructions	2021-08-05 21:03:41 +08:00
i386-dis-evex.h	[PATCH 1/2] Enable Intel AVX512_FP16 instructions	2021-08-05 21:03:41 +08:00
i386-dis.c	[PATCH 1/2] Enable Intel AVX512_FP16 instructions	2021-08-05 21:03:41 +08:00
i386-gen.c	[PATCH 1/2] Enable Intel AVX512_FP16 instructions	2021-08-05 21:03:41 +08:00
i386-init.h	[PATCH 1/2] Enable Intel AVX512_FP16 instructions	2021-08-05 21:03:41 +08:00
i386-opc.c	x86: drop seg_entry	2021-03-30 14:09:41 +02:00
i386-opc.h	[PATCH 1/2] Enable Intel AVX512_FP16 instructions	2021-08-05 21:03:41 +08:00
i386-opc.tbl	[PATCH 1/2] Enable Intel AVX512_FP16 instructions	2021-08-05 21:03:41 +08:00
i386-reg.tbl	x86: adjust st(<N>) parsing	2021-03-30 14:08:11 +02:00
i386-tbl.h	[PATCH 1/2] Enable Intel AVX512_FP16 instructions	2021-08-05 21:03:41 +08:00
ia64-asmtab.c
ia64-asmtab.h
ia64-dis.c
ia64-gen.c	Add startswith function and use it instead of CONST_STRNEQ.	2021-03-22 11:01:43 +01:00
ia64-ic.tbl
ia64-opc-a.c
ia64-opc-b.c
ia64-opc-d.c
ia64-opc-f.c
ia64-opc-i.c
ia64-opc-m.c
ia64-opc-x.c
ia64-opc.c
ia64-opc.h
ia64-raw.tbl
ia64-war.tbl
ia64-waw.tbl
ip2k-asm.c
ip2k-desc.c
ip2k-desc.h
ip2k-dis.c
ip2k-ibld.c
ip2k-opc.c
ip2k-opc.h
iq2000-asm.c
iq2000-desc.c
iq2000-desc.h
iq2000-dis.c
iq2000-ibld.c
iq2000-opc.c
iq2000-opc.h
lm32-asm.c
lm32-desc.c
lm32-desc.h
lm32-dis.c
lm32-ibld.c
lm32-opc.c
lm32-opc.h
lm32-opinst.c
m32c-asm.c
m32c-desc.c
m32c-desc.h
m32c-dis.c
m32c-ibld.c
m32c-opc.c
m32c-opc.h
m32r-asm.c
m32r-desc.c
m32r-desc.h
m32r-dis.c
m32r-ibld.c
m32r-opc.c
m32r-opc.h
m32r-opinst.c
m68hc11-dis.c
m68hc11-opc.c
m68k-dis.c	Use bool in opcodes	2021-03-31 10:49:23 +10:30
m68k-opc.c
m10200-dis.c
m10200-opc.c
m10300-dis.c
m10300-opc.c
MAINTAINERS
Makefile.am	cgen: split GUILE setting out	2021-07-01 18:05:40 -04:00
Makefile.in	cgen: split GUILE setting out	2021-07-01 18:05:40 -04:00
makefile.vms
mcore-dis.c	PR1202, mcore disassembler: wrong address loopt	2021-06-03 13:05:57 +09:30
mcore-opc.h
mep-asm.c	opcodes: constify & local meps macros	2021-07-01 18:04:16 -04:00
mep-desc.c
mep-desc.h
mep-dis.c
mep-ibld.c
mep-opc.c
mep-opc.h
metag-dis.c	Use bool in opcodes	2021-03-31 10:49:23 +10:30
microblaze-dis.c	opcodes: constify & scope microblaze opcodes	2021-07-01 17:55:26 -04:00
microblaze-dis.h	Use bool in opcodes	2021-03-31 10:49:23 +10:30
microblaze-opc.h	opcodes: constify & scope microblaze opcodes	2021-07-01 17:55:26 -04:00
microblaze-opcm.h
micromips-opc.c	MIPS/opcodes: Do not use CP0 register names for control registers	2021-05-29 03:26:32 +02:00
mips16-opc.c	Use bool in opcodes	2021-03-31 10:49:23 +10:30
mips-dis.c	Correct gs264e bfd_mach in mips_arch_choices.	2021-07-27 09:18:27 +08:00
mips-formats.h	Use bool in opcodes	2021-03-31 10:49:23 +10:30
mips-opc.c	MIPS/opcodes: Reorder legacy COP0, COP2, COP3 opcode instructions	2021-05-29 03:26:33 +02:00
mmix-dis.c	Use bool in opcodes	2021-03-31 10:49:23 +10:30
mmix-opc.c
moxie-dis.c
moxie-opc.c
msp430-decode.c
msp430-decode.opc
msp430-dis.c	Use bool in opcodes	2021-03-31 10:49:23 +10:30
mt-asm.c
mt-desc.c
mt-desc.h
mt-dis.c
mt-ibld.c
mt-opc.c
mt-opc.h
nds32-asm.c	opcodes: cleanup nds32 variables	2021-07-01 18:03:02 -04:00
nds32-asm.h	Re: Fix minor NDS32 renaming snafu	2021-07-02 20:48:55 +09:30
nds32-dis.c	Re: Fix minor NDS32 renaming snafu	2021-07-02 20:48:55 +09:30
nds32-opc.h
nfp-dis.c	Use bool in opcodes	2021-03-31 10:49:23 +10:30
nios2-dis.c	Use bool in opcodes	2021-03-31 10:49:23 +10:30
nios2-opc.c
ns32k-dis.c
opc2c.c
opintl.h
or1k-asm.c	or1k: Implement relocation R_OR1K_GOT_AHI16 for gotha()	2021-05-06 20:51:24 +09:00
or1k-desc.c
or1k-desc.h
or1k-dis.c
or1k-ibld.c
or1k-opc.c
or1k-opc.h
or1k-opinst.c
pdp11-dis.c
pdp11-opc.c
pj-dis.c	picojava assembler and disassembler fixes	2021-06-22 17:44:45 +09:30
pj-opc.c
ppc-dis.c	PowerPC table driven -Mraw disassembly	2021-05-29 21:06:06 +09:30
ppc-opc.c	powerpc: move cell "or rx,rx,rx" hints	2021-06-17 15:38:09 +09:30
pru-dis.c
pru-opc.c
riscv-dis.c	RISC-V: PR27814, Objdump crashes when disassembling a non-ELF RISC-V binary.	2021-05-18 09:26:39 +08:00
riscv-opc.c	RISC-V: compress "addi d,CV,z" to "c.mv d,CV"	2021-04-16 11:25:15 +08:00
rl78-decode.c
rl78-decode.opc
rl78-dis.c
rx-decode.c
rx-decode.opc
rx-dis.c
s12z-dis.c	Return symbol from symbol_at_address_func	2021-04-06 23:25:09 +09:30
s12z-opc.c
s12z-opc.h
s390-dis.c	Add startswith function and use it instead of CONST_STRNEQ.	2021-03-22 11:01:43 +01:00
s390-mkopc.c
s390-opc.c	IBM Z: Remove lpswey parameter	2021-08-04 16:51:50 +02:00
s390-opc.txt	IBM Z: Remove lpswey parameter	2021-08-04 16:51:50 +02:00
score7-dis.c	Remove strneq macro and use startswith.	2021-04-01 15:00:56 +02:00
score-dis.c	Remove strneq macro and use startswith.	2021-04-01 15:00:56 +02:00
score-opc.h
sh-dis.c
sh-opc.h
sparc-dis.c
sparc-opc.c
spu-dis.c
spu-opc.c
stamp-h.in
sysdep.h	C99 opcodes configury	2021-04-05 15:28:04 +09:30
tic4x-dis.c
tic6x-dis.c	Use bool in opcodes	2021-03-31 10:49:23 +10:30
tic30-dis.c	Fix another strncpy warning	2021-06-19 11:08:55 +09:30
tic54x-dis.c
tic54x-opc.c
tilegx-dis.c
tilegx-opc.c
tilepro-dis.c
tilepro-opc.c
v850-dis.c	Use bool in opcodes	2021-03-31 10:49:23 +10:30
v850-opc.c
vax-dis.c	ubsan: vax: pointer overflow	2021-06-19 11:08:56 +09:30
visium-dis.c
visium-opc.c
wasm32-dis.c	C99 opcodes configury	2021-04-05 15:28:04 +09:30
xc16x-asm.c
xc16x-desc.c
xc16x-desc.h
xc16x-dis.c
xc16x-ibld.c
xc16x-opc.c
xc16x-opc.h
xgate-dis.c
xgate-opc.c
xstormy16-asm.c
xstormy16-desc.c
xstormy16-desc.h
xstormy16-dis.c
xstormy16-ibld.c
xstormy16-opc.c
xstormy16-opc.h
xtensa-dis.c	opcodes: xtensa: support branch visualization	2021-05-01 02:47:30 -07:00
z8k-dis.c
z8k-opc.h
z8kgen.c
z80-dis.c	opcodes: constify & localize z80 opcodes	2021-07-01 17:56:24 -04:00