binutils-gdb/ld/testsuite/ld-aarch64
Yury Norov c1fc2d7ee5 ld: aarch64: fix TLS relaxation where TCB_SIZE is used
TCB_SIZE is 2*sizeof(void *), which is 0x10 for lp64, and 0x8 for
ilp32. During relaxation, ld goes to do a replace:
bl   __tls_get_addr => add R0, R0, TCB_SIZE

But actual implementation is:
bfd_putl32 (0x91004000, contents + rel->r_offset + 4);

Which is equivalent of add x0, x0, 0x10. This is wrong for ilp32.

The possible fix for it is:
bfd_putl32 (0x91000000 | (TCB_SIZE<<10), contents + rel->r_offset + 4);

But ilp32 also needs w-registers, so it's simpler to put proper
instruction in #if/#else condition.

There are 2 such relaxations in elfNN_aarch64_tls_relax(), and so 2 new
tests added for ilp32 mode to test it.

Yury

	* bfd/elfnn-aarch64.c: fix TLS relaxations for ilp32 where
	TCB_SIZE is used.
	* ld/testsuite/ld-aarch64/aarch64-elf.exp: Add tests for the case.
	* ld/testsuite/ld-aarch64/tls-relax-ld-le-small-ilp32.d: New file.
	* ld/testsuite/ld-aarch64/tls-relax-ld-le-tiny-ilp32.d: New file.

Signed-off-by: Yury Norov <ynorov@caviumnetworks.com>
2016-12-14 12:00:59 +05:30
..
aarch64-elf.exp ld: aarch64: fix TLS relaxation where TCB_SIZE is used 2016-12-14 12:00:59 +05:30
aarch64.ld
copy-reloc-exe.s
copy-reloc-so.s
copy-reloc.d
dt_textrel.d
dt_textrel.s
eh-frame-bar.s
eh-frame-foo.s
eh-frame.d
emit-relocs1.s
emit-relocs-28.d
emit-relocs-28.s
emit-relocs-86-overflow.d
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emit-relocs-86.d
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emit-relocs-313.d
emit-relocs-313.s
emit-relocs-515-be.d Enhance objdump so that it will use .got, .plt and .plt.got section symbols when disassembling, and it will use dynamic relocs to interpret entries in the PLT and GOT. 2016-10-11 13:50:10 +01:00
emit-relocs-515.d Enhance objdump so that it will use .got, .plt and .plt.got section symbols when disassembling, and it will use dynamic relocs to interpret entries in the PLT and GOT. 2016-10-11 13:50:10 +01:00
emit-relocs-515.s
emit-relocs-516-be.d Enhance objdump so that it will use .got, .plt and .plt.got section symbols when disassembling, and it will use dynamic relocs to interpret entries in the PLT and GOT. 2016-10-11 13:50:10 +01:00
emit-relocs-516.d Enhance objdump so that it will use .got, .plt and .plt.got section symbols when disassembling, and it will use dynamic relocs to interpret entries in the PLT and GOT. 2016-10-11 13:50:10 +01:00
emit-relocs-516.s
emit-relocs-523.d
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emit-relocs-538.d
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emit-relocs-local-addend-bar.s
emit-relocs-local-addend-foo.s
emit-relocs-local-addend.d
erratum835769.d
erratum835769.s
erratum843419.d [AArch64] Make LD testcases support ILP32 mode 2016-12-13 12:50:17 +00:00
erratum843419.s
farcall-b-defsym.d [AArch64] Make LD testcases support ILP32 mode 2016-12-13 12:50:17 +00:00
farcall-b-defsym.s
farcall-b-gsym.d
farcall-b-gsym.s
farcall-b-none-function.d
farcall-b-none-function.s
farcall-b-plt.d [AArch64] Make LD testcases support ILP32 mode 2016-12-13 12:50:17 +00:00
farcall-b-plt.s
farcall-b-section.d
farcall-b-section.s
farcall-b.d [AArch64] Make LD testcases support ILP32 mode 2016-12-13 12:50:17 +00:00
farcall-b.s
farcall-back-be.d
farcall-back.d
farcall-back.s
farcall-bl-defsym.d [AArch64] Make LD testcases support ILP32 mode 2016-12-13 12:50:17 +00:00
farcall-bl-defsym.s
farcall-bl-none-function.d
farcall-bl-none-function.s
farcall-bl-plt.d [AArch64] Make LD testcases support ILP32 mode 2016-12-13 12:50:17 +00:00
farcall-bl-plt.s
farcall-bl-section.d
farcall-bl-section.s
farcall-bl.d [AArch64] Make LD testcases support ILP32 mode 2016-12-13 12:50:17 +00:00
farcall-bl.s
gc-got-relocs.d
gc-plt1.s
gc-plt2.s
gc-plt-hidden.s
gc-plt-main.s
gc-plt-relocs.d Enhance objdump so that it will use .got, .plt and .plt.got section symbols when disassembling, and it will use dynamic relocs to interpret entries in the PLT and GOT. 2016-10-11 13:50:10 +01:00
gc-relocs-257-dyn.d
gc-relocs-257.d
gc-relocs-257.s
gc-relocs-309.s
gc-relocs-311.s
gc-relocs-312.s
gc-relocs-tlsdesc.s
gc-relocs-tlsgd.s
gc-relocs-tlsie.s
gc-relocs-tlsle.s
gc-start.s
gc-tls-relocs.d
ifunc-1-local.d
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ifunc-1.d
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ifunc-5-local.s
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ifunc-5a-local.d [AArch64] Make LD testcases support ILP32 mode 2016-12-13 12:50:17 +00:00
ifunc-5a.d [AArch64] Make LD testcases support ILP32 mode 2016-12-13 12:50:17 +00:00
ifunc-5b-local.d [AArch64] Make LD testcases support ILP32 mode 2016-12-13 12:50:17 +00:00
ifunc-5b.d [AArch64] Make LD testcases support ILP32 mode 2016-12-13 12:50:17 +00:00
ifunc-5r-local.d [AArch64] Make LD testcases support ILP32 mode 2016-12-13 12:50:17 +00:00
ifunc-6.s
ifunc-6a.d [AArch64] Make LD testcases support ILP32 mode 2016-12-13 12:50:17 +00:00
ifunc-6b.d [AArch64] Make LD testcases support ILP32 mode 2016-12-13 12:50:17 +00:00
ifunc-7.s
ifunc-7a.d [AArch64] Make LD testcases support ILP32 mode 2016-12-13 12:50:17 +00:00
ifunc-7b.d [AArch64] Make LD testcases support ILP32 mode 2016-12-13 12:50:17 +00:00
ifunc-7c.d
ifunc-8.d [AArch64] Make LD testcases support ILP32 mode 2016-12-13 12:50:17 +00:00
ifunc-8a.s
ifunc-8b.s
ifunc-9.d
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ifunc-10.d
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ifunc-14e.d
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ifunc-15.d [AArch64] Make LD testcases support ILP32 mode 2016-12-13 12:50:17 +00:00
ifunc-15.s
ifunc-16.d [AArch64] Make LD testcases support ILP32 mode 2016-12-13 12:50:17 +00:00
ifunc-16.s
ifunc-17a.d
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ifunc-20.d
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ifunc-21.d
ifunc-21.s
ifunc-22.d
ifunc-22.s
implicit_got_section_1.d
implicit_got_section_1.s
limit-b.d [AArch64] Make LD testcases support ILP32 mode 2016-12-13 12:50:17 +00:00
limit-b.s
limit-bl.d [AArch64] Make LD testcases support ILP32 mode 2016-12-13 12:50:17 +00:00
limit-bl.s
local-addend-r.d
pcrel_pic_defined_local.d
pcrel_pic_undefined.d
pcrel.s
pie-bind-locally-a.s [AArch64] Bind defined symbol locally in PIE 2016-11-10 09:25:17 +00:00
pie-bind-locally-b.s [AArch64] Bind defined symbol locally in PIE 2016-11-10 09:25:17 +00:00
pie-bind-locally.d [AArch64] Bind defined symbol locally in PIE 2016-11-10 09:25:17 +00:00
plt_mapping_symbol.d
plt_mapping_symbol.s
pr17415.d
pr17415.s
protected-data.d
protected-data.s
rela-abs-relative-be.d
rela-abs-relative-opt.d
rela-abs-relative.d
rela-abs-relative.s
relasz.d
relasz.s
reloc-overflow-1.s
reloc-overflow-2.s
reloc-overflow-bad.d
relocs-1027-symbolic-func.d
relocs-1027-symbolic-func.s
relocs-ilp32.ld Fix accesses to the GOT for AARCH64 operating in 32-bit mode. 2016-12-01 12:31:51 +00:00
relocs.ld
tls-desc-ie.d Enhance objdump so that it will use .got, .plt and .plt.got section symbols when disassembling, and it will use dynamic relocs to interpret entries in the PLT and GOT. 2016-10-11 13:50:10 +01:00
tls-desc-ie.s
tls-large-desc-be.d
tls-large-desc.d
tls-large-desc.s
tls-large-ie-be.d
tls-large-ie.d
tls-large-ie.s
tls-relax-all.d
tls-relax-all.s
tls-relax-gd-ie-ilp32.d Fix accesses to the GOT for AARCH64 operating in 32-bit mode. 2016-12-01 12:31:51 +00:00
tls-relax-gd-ie.d
tls-relax-gd-ie.s
tls-relax-gd-le.d
tls-relax-gd-le.s
tls-relax-gdesc-ie-2.d
tls-relax-gdesc-ie-2.s
tls-relax-gdesc-ie.d
tls-relax-gdesc-ie.s
tls-relax-gdesc-le-2.d
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tls-relax-gdesc-le.d
tls-relax-gdesc-le.s
tls-relax-ie-le-2.d
tls-relax-ie-le-2.s
tls-relax-ie-le-3.d
tls-relax-ie-le-3.s
tls-relax-ie-le.d
tls-relax-ie-le.s
tls-relax-large-desc-ie-be.d
tls-relax-large-desc-ie.d
tls-relax-large-desc-ie.s
tls-relax-large-desc-le-be.d
tls-relax-large-desc-le.d
tls-relax-large-desc-le.s
tls-relax-large-gd-ie-be.d
tls-relax-large-gd-ie.d
tls-relax-large-gd-ie.s
tls-relax-large-gd-le-be.d
tls-relax-large-gd-le.d
tls-relax-large-gd-le.s
tls-relax-ld-le-small-ilp32.d ld: aarch64: fix TLS relaxation where TCB_SIZE is used 2016-12-14 12:00:59 +05:30
tls-relax-ld-le-small.d
tls-relax-ld-le-small.s
tls-relax-ld-le-tiny-ilp32.d ld: aarch64: fix TLS relaxation where TCB_SIZE is used 2016-12-14 12:00:59 +05:30
tls-relax-ld-le-tiny.d
tls-relax-ld-le-tiny.s
tls-small-ld.d
tls-small-ld.s
tls-tiny-desc-ie.d
tls-tiny-desc-ie.s
tls-tiny-desc-le.d
tls-tiny-desc-le.s
tls-tiny-desc.d Enhance objdump so that it will use .got, .plt and .plt.got section symbols when disassembling, and it will use dynamic relocs to interpret entries in the PLT and GOT. 2016-10-11 13:50:10 +01:00
tls-tiny-desc.s
tls-tiny-gd-ie.d
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tls-tiny-gd-le.d
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tls-tiny-gd.d Enhance objdump so that it will use .got, .plt and .plt.got section symbols when disassembling, and it will use dynamic relocs to interpret entries in the PLT and GOT. 2016-10-11 13:50:10 +01:00
tls-tiny-gd.s
tls-tiny-ie.d Enhance objdump so that it will use .got, .plt and .plt.got section symbols when disassembling, and it will use dynamic relocs to interpret entries in the PLT and GOT. 2016-10-11 13:50:10 +01:00
tls-tiny-ie.s
tls-tiny-ld.d
tls-tiny-ld.s
tlsle-symbol-offset.d
tlsle-symbol-offset.s
tlsle.d
tlsle.s
tprel_add_lo12_overflow.d
tprel_add_lo12_overflow.s
tprel_g2_overflow.d
tprel_g2_overflow.s
weak-undefined.d
weak-undefined.s