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739b5c9c77
The Cortex-A53 erratum currently has two ways it can resolve the erratum when
using the flag --fix-cortex-a53-843419:
1) If the address is within the range of an ADR instruction it rewrites the ADRP
into an ADR, and those doesn't need the use of a veneer.
2) If the address is not within range, it adds a branch to a veneer which will
execute the final bit of the erratum workaround and branch back to the call
site.
When we do this we always generate the veneers and we always align the size of
the text section to 4KB. This is because we only know which workaround we can
use after all linking has finished and all addresses are known. This means even
though the veneers are not used, we still generate the section and we still
change the size of the input section.
This is problematic for small memory devices as this would require the user to
take about a ~4KB hit in memory even though it's not even used.
Since there's no real way to restart the linking process from the final write
phase this patch solves the issue by allowing the user more control over which
erratum workaround gets used.
Concretely this changes the option --fix-cortex-a53-843419 to take optional
arguments --fix-cortex-a53-843419[=full|adr|adrp]
- full (default): Use both ADRP and ADR workaround. This is equivalent to not
specifying any options and is the default behavior before this
patch.
- adr: Only use the ADR workaround, this will not cause any increase in binary
size but linking will fail if the referenced address is out of range of
an ADR instruction.
- adrp: Use only the ADRP workaround, this will never rewrite your ADRP.
In the cases where the user knows how big their binaries are the `adr` option
would prevent the unneeded overhead.
bfd/ChangeLog:
PR ld/24373
* bfd-in.h (enum erratum_84319_opts): New
(bfd_elf64_aarch64_set_options, bfd_elf32_aarch64_set_options): Change
int to enum erratum_84319_opts.
* bfd-in2.h: Regenerate.
* elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Change
fix_erratum_843419 to use new enum, remove fix_erratum_843419_adr.
(_bfd_aarch64_add_stub_entry_after): Conditionally create erratum stub.
(aarch64_size_one_stub): Conditionally size erratum 843419 stubs.
(_bfd_aarch64_resize_stubs): Amend comment.
(elfNN_aarch64_size_stubs): Don't generate stubs when no workaround
requested.
(bfd_elfNN_aarch64_set_options): Use new fix_erratum_843419 enum.
(_bfd_aarch64_erratum_843419_branch_to_stub): Implement selection of
erratum workaround.
(clear_erratum_843419_entry): Update erratum conditional.
ld/ChangeLog:
PR ld/24373
* emultempl/aarch64elf.em (PARSE_AND_LIST_LONGOPTS): Add optional args
to flags.
* NEWS: Add changes to flag.
(PARSE_AND_LIST_OPTIONS): Update help descriptions.
(PARSE_AND_LIST_ARGS_CASES): Add new options to parser.
* testsuite/ld-aarch64/aarch64-elf.exp: Add new run_dump_tests.
* testsuite/ld-aarch64/erratum843419-adr.d: New test.
* testsuite/ld-aarch64/erratum843419-adrp.d: New test.
* testsuite/ld-aarch64/erratum843419-far-adr.d: New test.
* testsuite/ld-aarch64/erratum843419-far-full.d: New test.
* testsuite/ld-aarch64/erratum843419-far.s: New test.
* testsuite/ld-aarch64/erratum843419-full.d: New test.
* testsuite/ld-aarch64/erratum843419-near.s: New test.
* testsuite/ld-aarch64/erratum843419-no-args.d: New test.
23 lines
629 B
Makefile
23 lines
629 B
Makefile
#source: erratum843419-near.s
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#as:
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#ld: -Ttext=0x400000 --fix-cortex-a53-843419=adrp
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#objdump: -dr
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#...
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Disassembly of section \.text:
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0*400000 <_start>:
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...
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400ffc: 90000040 adrp x0, 408000 <e843419@0002_00000010_1008\+0x6fe8>
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401000: f9000042 str x2, \[x2\]
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401004: d2800002 mov x2, #0x0 // #0
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401008: 14000004 b 401018 <e843419@0002_00000010_1008>
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40100c: d503201f nop
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401010: 14000400 b 402010 <e843419@0002_00000010_1008\+0xff8>
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401014: d503201f nop
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0*401018 <e843419@0002_00000010_1008>:
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401018: f9402001 ldr x1, \[x0, #64\]
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40101c: 17fffffc b 40100c <_start\+0x100c>
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...
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