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bf6ae4641c
* gdbarch.sh (ADDR_BITS_REMOVE): Replace by gdbarch_addr_bits_remove. * value.c (value_as_address): Likewise (comment). * remote-mips.c (common_breakpoint): Likewise. * regcache.c (read_pc_pid): Likewise. * printcmd.c (do_one_display): Likewise. * monitor.c (monitor_write_memory, monitor_read_memory) (monitor_insert_breakpoint): Likewise. * mips-tdep.c (heuristic_proc_start): Likewise. * infrun.c (insert_step_resume_breakpoint_at_frame) (insert_step_resume_breakpoint_at_caller): Likewise. * buildsym.c (record_line): Likewise. * arm-tdep.c (arm_scan_prologue, thumb_get_next_pc) (arm_get_next_pc): Likewise. * armnbsd-nat.c (arm_supply_gregset, fetch_register, store_register) (store_regs): Likewise. * arm-linux-tdep.c (arm_linux_supply_gregset): Likewise. * arm-linux-nat.c (fetch_register, fetch_regs): Likewise. * gdbarch.c, gdbarch.h: Regenerate.
504 lines
12 KiB
C
504 lines
12 KiB
C
/* Native-dependent code for BSD Unix running on ARM's, for GDB.
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Copyright (C) 1988, 1989, 1991, 1992, 1994, 1996, 1999, 2002, 2004, 2007
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Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street, Fifth Floor,
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Boston, MA 02110-1301, USA. */
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#include "defs.h"
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#include "gdbcore.h"
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#include "inferior.h"
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#include "regcache.h"
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#include "target.h"
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#include "gdb_string.h"
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#include <sys/types.h>
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#include <sys/ptrace.h>
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#include <machine/reg.h>
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#include <machine/frame.h>
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#include "arm-tdep.h"
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#include "inf-ptrace.h"
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extern int arm_apcs_32;
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static void
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arm_supply_gregset (struct regcache *regcache, struct reg *gregset)
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{
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int regno;
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CORE_ADDR r_pc;
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/* Integer registers. */
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for (regno = ARM_A1_REGNUM; regno < ARM_SP_REGNUM; regno++)
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regcache_raw_supply (regcache, regno, (char *) &gregset->r[regno]);
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regcache_raw_supply (regcache, ARM_SP_REGNUM,
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(char *) &gregset->r_sp);
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regcache_raw_supply (regcache, ARM_LR_REGNUM,
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(char *) &gregset->r_lr);
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/* This is ok: we're running native... */
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r_pc = gdbarch_addr_bits_remove (current_gdbarch, gregset->r_pc);
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regcache_raw_supply (regcache, ARM_PC_REGNUM, (char *) &r_pc);
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if (arm_apcs_32)
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regcache_raw_supply (regcache, ARM_PS_REGNUM,
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(char *) &gregset->r_cpsr);
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else
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regcache_raw_supply (regcache, ARM_PS_REGNUM,
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(char *) &gregset->r_pc);
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}
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static void
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arm_supply_fparegset (struct regcache *regcache, struct fpreg *fparegset)
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{
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int regno;
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for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
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regcache_raw_supply (regcache, regno,
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(char *) &fparegset->fpr[regno - ARM_F0_REGNUM]);
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regcache_raw_supply (regcache, ARM_FPS_REGNUM,
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(char *) &fparegset->fpr_fpsr);
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}
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static void
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fetch_register (struct regcache *regcache, int regno)
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{
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struct reg inferior_registers;
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int ret;
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ret = ptrace (PT_GETREGS, PIDGET (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_registers, 0);
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if (ret < 0)
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{
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warning (_("unable to fetch general register"));
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return;
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}
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switch (regno)
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{
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case ARM_SP_REGNUM:
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regcache_raw_supply (regcache, ARM_SP_REGNUM,
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(char *) &inferior_registers.r_sp);
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break;
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case ARM_LR_REGNUM:
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regcache_raw_supply (regcache, ARM_LR_REGNUM,
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(char *) &inferior_registers.r_lr);
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break;
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case ARM_PC_REGNUM:
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/* This is ok: we're running native... */
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inferior_registers.r_pc = gdbarch_addr_bits_remove
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(current_gdbarch, inferior_registers.r_pc);
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regcache_raw_supply (regcache, ARM_PC_REGNUM,
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(char *) &inferior_registers.r_pc);
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break;
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case ARM_PS_REGNUM:
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if (arm_apcs_32)
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regcache_raw_supply (regcache, ARM_PS_REGNUM,
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(char *) &inferior_registers.r_cpsr);
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else
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regcache_raw_supply (regcache, ARM_PS_REGNUM,
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(char *) &inferior_registers.r_pc);
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break;
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default:
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regcache_raw_supply (regcache, regno,
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(char *) &inferior_registers.r[regno]);
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break;
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}
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}
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static void
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fetch_regs (struct regcache *regcache)
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{
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struct reg inferior_registers;
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int ret;
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int regno;
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ret = ptrace (PT_GETREGS, PIDGET (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_registers, 0);
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if (ret < 0)
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{
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warning (_("unable to fetch general registers"));
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return;
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}
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arm_supply_gregset (regcache, &inferior_registers);
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}
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static void
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fetch_fp_register (struct regcache *regcache, int regno)
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{
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struct fpreg inferior_fp_registers;
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int ret;
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ret = ptrace (PT_GETFPREGS, PIDGET (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_fp_registers, 0);
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if (ret < 0)
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{
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warning (_("unable to fetch floating-point register"));
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return;
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}
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switch (regno)
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{
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case ARM_FPS_REGNUM:
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regcache_raw_supply (regcache, ARM_FPS_REGNUM,
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(char *) &inferior_fp_registers.fpr_fpsr);
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break;
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default:
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regcache_raw_supply (regcache, regno,
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(char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]);
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break;
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}
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}
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static void
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fetch_fp_regs (struct regcache *regcache)
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{
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struct fpreg inferior_fp_registers;
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int ret;
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int regno;
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ret = ptrace (PT_GETFPREGS, PIDGET (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_fp_registers, 0);
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if (ret < 0)
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{
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warning (_("unable to fetch general registers"));
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return;
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}
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arm_supply_fparegset (regcache, &inferior_fp_registers);
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}
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static void
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armnbsd_fetch_registers (struct regcache *regcache, int regno)
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{
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if (regno >= 0)
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{
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if (regno < ARM_F0_REGNUM || regno > ARM_FPS_REGNUM)
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fetch_register (regcache, regno);
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else
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fetch_fp_register (regcache, regno);
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}
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else
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{
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fetch_regs (regcache);
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fetch_fp_regs (regcache);
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}
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}
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static void
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store_register (const struct regcache *regcache, int regno)
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{
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struct reg inferior_registers;
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int ret;
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ret = ptrace (PT_GETREGS, PIDGET (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_registers, 0);
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if (ret < 0)
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{
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warning (_("unable to fetch general registers"));
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return;
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}
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switch (regno)
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{
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case ARM_SP_REGNUM:
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regcache_raw_collect (regcache, ARM_SP_REGNUM,
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(char *) &inferior_registers.r_sp);
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break;
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case ARM_LR_REGNUM:
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regcache_raw_collect (regcache, ARM_LR_REGNUM,
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(char *) &inferior_registers.r_lr);
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break;
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case ARM_PC_REGNUM:
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if (arm_apcs_32)
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regcache_raw_collect (regcache, ARM_PC_REGNUM,
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(char *) &inferior_registers.r_pc);
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else
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{
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unsigned pc_val;
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regcache_raw_collect (regcache, ARM_PC_REGNUM,
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(char *) &pc_val);
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pc_val = gdbarch_addr_bits_remove (current_gdbarch, pc_val);
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inferior_registers.r_pc ^= gdbarch_addr_bits_remove
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(current_gdbarch,
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inferior_registers.r_pc);
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inferior_registers.r_pc |= pc_val;
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}
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break;
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case ARM_PS_REGNUM:
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if (arm_apcs_32)
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regcache_raw_collect (regcache, ARM_PS_REGNUM,
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(char *) &inferior_registers.r_cpsr);
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else
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{
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unsigned psr_val;
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regcache_raw_collect (regcache, ARM_PS_REGNUM,
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(char *) &psr_val);
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psr_val ^= gdbarch_addr_bits_remove (current_gdbarch, psr_val);
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inferior_registers.r_pc = gdbarch_addr_bits_remove
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(current_gdbarch,
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inferior_registers.r_pc);
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inferior_registers.r_pc |= psr_val;
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}
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break;
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default:
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regcache_raw_collect (regcache, regno,
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(char *) &inferior_registers.r[regno]);
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break;
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}
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ret = ptrace (PT_SETREGS, PIDGET (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_registers, 0);
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if (ret < 0)
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warning (_("unable to write register %d to inferior"), regno);
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}
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static void
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store_regs (const struct regcache *regcache)
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{
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struct reg inferior_registers;
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int ret;
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int regno;
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for (regno = ARM_A1_REGNUM; regno < ARM_SP_REGNUM; regno++)
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regcache_raw_collect (regcache, regno,
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(char *) &inferior_registers.r[regno]);
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regcache_raw_collect (regcache, ARM_SP_REGNUM,
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(char *) &inferior_registers.r_sp);
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regcache_raw_collect (regcache, ARM_LR_REGNUM,
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(char *) &inferior_registers.r_lr);
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if (arm_apcs_32)
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{
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regcache_raw_collect (regcache, ARM_PC_REGNUM,
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(char *) &inferior_registers.r_pc);
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regcache_raw_collect (regcache, ARM_PS_REGNUM,
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(char *) &inferior_registers.r_cpsr);
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}
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else
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{
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unsigned pc_val;
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unsigned psr_val;
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regcache_raw_collect (regcache, ARM_PC_REGNUM,
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(char *) &pc_val);
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regcache_raw_collect (regcache, ARM_PS_REGNUM,
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(char *) &psr_val);
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pc_val = gdbarch_addr_bits_remove (current_gdbarch, pc_val);
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psr_val ^= gdbarch_addr_bits_remove (current_gdbarch, psr_val);
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inferior_registers.r_pc = pc_val | psr_val;
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}
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ret = ptrace (PT_SETREGS, PIDGET (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_registers, 0);
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if (ret < 0)
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warning (_("unable to store general registers"));
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}
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static void
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store_fp_register (const struct regcache *regcache, int regno)
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{
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struct fpreg inferior_fp_registers;
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int ret;
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ret = ptrace (PT_GETFPREGS, PIDGET (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_fp_registers, 0);
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if (ret < 0)
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{
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warning (_("unable to fetch floating-point registers"));
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return;
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}
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switch (regno)
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{
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case ARM_FPS_REGNUM:
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regcache_raw_collect (regcache, ARM_FPS_REGNUM,
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(char *) &inferior_fp_registers.fpr_fpsr);
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break;
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default:
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regcache_raw_collect (regcache, regno,
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(char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]);
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break;
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}
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ret = ptrace (PT_SETFPREGS, PIDGET (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_fp_registers, 0);
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if (ret < 0)
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warning (_("unable to write register %d to inferior"), regno);
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}
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static void
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store_fp_regs (const struct regcache *regcache)
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{
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struct fpreg inferior_fp_registers;
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int ret;
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int regno;
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for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
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regcache_raw_collect (regcache, regno,
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(char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]);
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regcache_raw_collect (regcache, ARM_FPS_REGNUM,
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(char *) &inferior_fp_registers.fpr_fpsr);
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ret = ptrace (PT_SETFPREGS, PIDGET (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_fp_registers, 0);
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if (ret < 0)
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warning (_("unable to store floating-point registers"));
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}
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static void
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armnbsd_store_registers (struct regcache *regcache, int regno)
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{
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if (regno >= 0)
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{
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if (regno < ARM_F0_REGNUM || regno > ARM_FPS_REGNUM)
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store_register (regcache, regno);
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else
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store_fp_register (regcache, regno);
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}
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else
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{
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store_regs (regcache);
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store_fp_regs (regcache);
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}
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}
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struct md_core
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{
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struct reg intreg;
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struct fpreg freg;
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};
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static void
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fetch_core_registers (struct regcache *regcache,
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char *core_reg_sect, unsigned core_reg_size,
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int which, CORE_ADDR ignore)
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{
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struct md_core *core_reg = (struct md_core *) core_reg_sect;
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int regno;
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CORE_ADDR r_pc;
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arm_supply_gregset (regcache, &core_reg->intreg);
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arm_supply_fparegset (regcache, &core_reg->freg);
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}
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static void
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fetch_elfcore_registers (struct regcache *regcache,
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char *core_reg_sect, unsigned core_reg_size,
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int which, CORE_ADDR ignore)
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{
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struct reg gregset;
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struct fpreg fparegset;
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switch (which)
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{
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case 0: /* Integer registers. */
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if (core_reg_size != sizeof (struct reg))
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warning (_("wrong size of register set in core file"));
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else
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{
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/* The memcpy may be unnecessary, but we can't really be sure
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of the alignment of the data in the core file. */
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memcpy (&gregset, core_reg_sect, sizeof (gregset));
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arm_supply_gregset (regcache, &gregset);
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}
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break;
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case 2:
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if (core_reg_size != sizeof (struct fpreg))
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warning (_("wrong size of FPA register set in core file"));
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else
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{
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/* The memcpy may be unnecessary, but we can't really be sure
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of the alignment of the data in the core file. */
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memcpy (&fparegset, core_reg_sect, sizeof (fparegset));
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arm_supply_fparegset (regcache, &fparegset);
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}
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break;
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default:
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/* Don't know what kind of register request this is; just ignore it. */
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break;
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}
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}
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static struct core_fns arm_netbsd_core_fns =
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{
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bfd_target_unknown_flavour, /* core_flovour. */
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default_check_format, /* check_format. */
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default_core_sniffer, /* core_sniffer. */
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fetch_core_registers, /* core_read_registers. */
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NULL
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};
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static struct core_fns arm_netbsd_elfcore_fns =
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{
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bfd_target_elf_flavour, /* core_flovour. */
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default_check_format, /* check_format. */
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default_core_sniffer, /* core_sniffer. */
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fetch_elfcore_registers, /* core_read_registers. */
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NULL
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};
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void
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_initialize_arm_netbsd_nat (void)
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{
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struct target_ops *t;
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t = inf_ptrace_target ();
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t->to_fetch_registers = armnbsd_fetch_registers;
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t->to_store_registers = armnbsd_store_registers;
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add_target (t);
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deprecated_add_core_fns (&arm_netbsd_core_fns);
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deprecated_add_core_fns (&arm_netbsd_elfcore_fns);
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}
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