mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-12-21 04:42:53 +08:00
63fc64a8d0
commit b70a487d59
Author: Cui, Lili <lili.cui@intel.com>
Date: Wed Dec 13 06:07:36 2023 +0000
Make const_1_mode print $1 in AT&T syntax
changes disassembler output from
d1 f8 sar %eax
to
d1 f8 sar $1,%eax
Adjust pe-x86-64-6.od accordingly.
* testsuite/ld-x86-64/pe-x86-64-6.od: Adjusted.
92 lines
4.2 KiB
Plaintext
92 lines
4.2 KiB
Plaintext
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.*: +file format .*
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SYMBOL TABLE:
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0+4010a8 g .text\$mn 0000000000000000 xfunc
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0+402000 g .rdata 0000000000000000 \?\?_C@_02LDKJOMJN@AB@
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0+400000 g .text\$mn 0000000000000000 __executable_start
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0+403058 g .data 0000000000000000 __bss_start
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0+401000 g .text\$mn 0000000000000000 main
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0+403038 g .data 0000000000000000 deadloopvar
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0+4010ac g .text\$mn 0000000000000000 xstring
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0+403058 g .data 0000000000000000 _edata
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0+403058 g .data 0000000000000000 _end
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Disassembly of section .text\$mn:
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0+401000 <main>:
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+[a-f0-9]+: 48 89 5c 24 08 mov %rbx,0x8\(%rsp\)
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+[a-f0-9]+: 48 89 6c 24 10 mov %rbp,0x10\(%rsp\)
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+[a-f0-9]+: 48 89 74 24 20 mov %rsi,0x20\(%rsp\)
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+[a-f0-9]+: 57 push %rdi
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+[a-f0-9]+: 48 83 ec 20 sub \$0x20,%rsp
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+[a-f0-9]+: cc int3
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+[a-f0-9]+: 8b 05 1d 20 00 00 mov 0x201d\(%rip\),%eax # 403038 <deadloopvar>
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+[a-f0-9]+: 83 f8 01 cmp \$0x1,%eax
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+[a-f0-9]+: 74 f5 je 401015 <main\+0x15>
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+[a-f0-9]+: 0f 31 rdtsc
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+[a-f0-9]+: 48 c1 e2 20 shl \$0x20,%rdx
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+[a-f0-9]+: 48 0b c2 or %rdx,%rax
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+[a-f0-9]+: 74 5d je 401088 <main\+0x88>
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+[a-f0-9]+: 33 ff xor %edi,%edi
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+[a-f0-9]+: 48 8d 2d cc ef ff ff lea -0x1034\(%rip\),%rbp # 400000 <__executable_start>
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+[a-f0-9]+: 33 db xor %ebx,%ebx
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+[a-f0-9]+: 48 8d 35 ff 1f 00 00 lea 0x1fff\(%rip\),%rsi # 40303c <deadloopvar\+0x4>
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+[a-f0-9]+: 48 8b 8c 2b 50 30 00 00 mov 0x3050\(%rbx,%rbp,1\),%rcx
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+[a-f0-9]+: 44 8a 01 mov \(%rcx\),%r8b
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+[a-f0-9]+: 45 84 c0 test %r8b,%r8b
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+[a-f0-9]+: 74 28 je 401075 <main\+0x75>
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+[a-f0-9]+: b8 05 00 00 00 mov \$0x5,%eax
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+[a-f0-9]+: 2b 84 2b 48 30 00 00 sub 0x3048\(%rbx,%rbp,1\),%eax
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+[a-f0-9]+: 99 cltd
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+[a-f0-9]+: 2b c2 sub %edx,%eax
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+[a-f0-9]+: d1 f8 sar \$1,%eax
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+[a-f0-9]+: 48 63 d0 movslq %eax,%rdx
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+[a-f0-9]+: 48 03 d6 add %rsi,%rdx
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+[a-f0-9]+: 48 ff c1 inc %rcx
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+[a-f0-9]+: 44 88 02 mov %r8b,\(%rdx\)
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+[a-f0-9]+: 48 ff c2 inc %rdx
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+[a-f0-9]+: 44 8a 01 mov \(%rcx\),%r8b
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+[a-f0-9]+: 45 84 c0 test %r8b,%r8b
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+[a-f0-9]+: 75 ef jne 401064 <main\+0x64>
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+[a-f0-9]+: 48 8b ce mov %rsi,%rcx
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+[a-f0-9]+: e8 2f 00 00 00 call 4010ac <xstring>
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+[a-f0-9]+: ff c7 inc %edi
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+[a-f0-9]+: 48 83 c3 08 add \$0x8,%rbx
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+[a-f0-9]+: 83 ff 01 cmp \$0x1,%edi
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+[a-f0-9]+: 72 b5 jb 40103d <main\+0x3d>
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+[a-f0-9]+: b1 aa mov \$0xaa,%cl
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+[a-f0-9]+: e8 19 00 00 00 call 4010a8 <xfunc>
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+[a-f0-9]+: 48 8b 5c 24 30 mov 0x30\(%rsp\),%rbx
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+[a-f0-9]+: 33 c0 xor %eax,%eax
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+[a-f0-9]+: 48 8b 6c 24 38 mov 0x38\(%rsp\),%rbp
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+[a-f0-9]+: 48 8b 74 24 48 mov 0x48\(%rsp\),%rsi
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+[a-f0-9]+: 48 83 c4 20 add \$0x20,%rsp
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+[a-f0-9]+: 5f pop %rdi
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+[a-f0-9]+: c3 ret
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+[a-f0-9]+: 66 90 xchg %ax,%ax
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0+4010a8 <xfunc>:
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+[a-f0-9]+: 66 90 xchg %ax,%ax
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+[a-f0-9]+: cc int3
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+[a-f0-9]+: c3 ret
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0+4010ac <xstring>:
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+[a-f0-9]+: 40 53 rex push %rbx
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+[a-f0-9]+: 48 83 ec 20 sub \$0x20,%rsp
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+[a-f0-9]+: 8a 01 mov \(%rcx\),%al
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+[a-f0-9]+: 48 8b d9 mov %rcx,%rbx
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+[a-f0-9]+: eb 0c jmp 4010c5 <xstring\+0x19>
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+[a-f0-9]+: 8a c8 mov %al,%cl
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+[a-f0-9]+: e8 e8 ff ff ff call 4010a8 <xfunc>
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+[a-f0-9]+: 48 ff c3 inc %rbx
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+[a-f0-9]+: 8a 03 mov \(%rbx\),%al
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+[a-f0-9]+: 84 c0 test %al,%al
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+[a-f0-9]+: 75 f0 jne 4010b9 <xstring\+0xd>
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+[a-f0-9]+: 48 83 c4 20 add \$0x20,%rsp
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+[a-f0-9]+: 5b pop %rbx
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+[a-f0-9]+: c3 ret
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#pass
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