mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-12-21 04:42:53 +08:00
2c4ad78125
* features/Makefile (rs6000/powerpc-isa205-32l-expedite, rs6000/powerpc-isa205-altivec32l-expedite, powerpc-isa205-vsx32l-expedite, rs6000/powerpc-isa205-64l-expedite, rs6000/powerpc-isa205-altivec64l-expedite, powerpc-isa205-vsx64l-expedite): New variables. * regformats/rs6000/powerpc-isa205-32l.dat: Generate. * regformats/rs6000/powerpc-isa205-altivec32l.dat: Generate. * regformats/rs6000/powerpc-isa205-vsx32l.dat: Generate. * regformats/rs6000/powerpc-isa205-64l.dat: Generate. * regformats/rs6000/powerpc-isa205-altivec64l.dat: Generate. * regformats/rs6000/powerpc-isa205-vsx64l.dat: Generate. gdbserver/ * Makefile.in (powerpc-isa205-32l.o, powerpc-isa205-32l.c, powerpc-isa205-altivec32l.o, powerpc-isa205-altivec32l.c, powerpc-isa205-vsx32l.o, powerpc-isa205-vsx32l.c, powerpc-isa205-64l.o, powerpc-isa205-64l.c, powerpc-isa205-altivec64l.o, powerpc-isa205-altivec64l.c, powerpc-isa205-vsx64l.o, powerpc-isa205-vsx64l.c): New targets. * configure.srv (powerpc*-*-linux*): Add ISA 2.05 object files and XML target descriptions. * linux-ppc-low.c (ppc_arch_setup): Init registers with 64-bit FPSCR when inferior is running on an ISA 2.05 or later processor. Add special case to return offset for full 64-bit slot of FPSCR when in 32-bits.
144 lines
1.2 KiB
Plaintext
144 lines
1.2 KiB
Plaintext
# DO NOT EDIT: generated from rs6000/powerpc-isa205-vsx32l.xml
|
|
name:powerpc_isa205_vsx32l
|
|
xmltarget:powerpc-isa205-vsx32l.xml
|
|
expedite:r1,pc
|
|
32:r0
|
|
32:r1
|
|
32:r2
|
|
32:r3
|
|
32:r4
|
|
32:r5
|
|
32:r6
|
|
32:r7
|
|
32:r8
|
|
32:r9
|
|
32:r10
|
|
32:r11
|
|
32:r12
|
|
32:r13
|
|
32:r14
|
|
32:r15
|
|
32:r16
|
|
32:r17
|
|
32:r18
|
|
32:r19
|
|
32:r20
|
|
32:r21
|
|
32:r22
|
|
32:r23
|
|
32:r24
|
|
32:r25
|
|
32:r26
|
|
32:r27
|
|
32:r28
|
|
32:r29
|
|
32:r30
|
|
32:r31
|
|
64:f0
|
|
64:f1
|
|
64:f2
|
|
64:f3
|
|
64:f4
|
|
64:f5
|
|
64:f6
|
|
64:f7
|
|
64:f8
|
|
64:f9
|
|
64:f10
|
|
64:f11
|
|
64:f12
|
|
64:f13
|
|
64:f14
|
|
64:f15
|
|
64:f16
|
|
64:f17
|
|
64:f18
|
|
64:f19
|
|
64:f20
|
|
64:f21
|
|
64:f22
|
|
64:f23
|
|
64:f24
|
|
64:f25
|
|
64:f26
|
|
64:f27
|
|
64:f28
|
|
64:f29
|
|
64:f30
|
|
64:f31
|
|
32:pc
|
|
32:msr
|
|
32:cr
|
|
32:lr
|
|
32:ctr
|
|
32:xer
|
|
64:fpscr
|
|
32:orig_r3
|
|
32:trap
|
|
128:vr0
|
|
128:vr1
|
|
128:vr2
|
|
128:vr3
|
|
128:vr4
|
|
128:vr5
|
|
128:vr6
|
|
128:vr7
|
|
128:vr8
|
|
128:vr9
|
|
128:vr10
|
|
128:vr11
|
|
128:vr12
|
|
128:vr13
|
|
128:vr14
|
|
128:vr15
|
|
128:vr16
|
|
128:vr17
|
|
128:vr18
|
|
128:vr19
|
|
128:vr20
|
|
128:vr21
|
|
128:vr22
|
|
128:vr23
|
|
128:vr24
|
|
128:vr25
|
|
128:vr26
|
|
128:vr27
|
|
128:vr28
|
|
128:vr29
|
|
128:vr30
|
|
128:vr31
|
|
32:vscr
|
|
32:vrsave
|
|
64:vs0h
|
|
64:vs1h
|
|
64:vs2h
|
|
64:vs3h
|
|
64:vs4h
|
|
64:vs5h
|
|
64:vs6h
|
|
64:vs7h
|
|
64:vs8h
|
|
64:vs9h
|
|
64:vs10h
|
|
64:vs11h
|
|
64:vs12h
|
|
64:vs13h
|
|
64:vs14h
|
|
64:vs15h
|
|
64:vs16h
|
|
64:vs17h
|
|
64:vs18h
|
|
64:vs19h
|
|
64:vs20h
|
|
64:vs21h
|
|
64:vs22h
|
|
64:vs23h
|
|
64:vs24h
|
|
64:vs25h
|
|
64:vs26h
|
|
64:vs27h
|
|
64:vs28h
|
|
64:vs29h
|
|
64:vs30h
|
|
64:vs31h
|