mirror of
https://sourceware.org/git/binutils-gdb.git
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1079403cc0
Also update the 32-bit tls testcases to be secure plt. bfd/ * elf32-ppc.c (ppc_elf_get_synthetic_symtab): Examine stubs in reverse order. Account for larger size of __tls_get_addr_opt stub. ld/testsuite/ * ld-powerpc/tls32.s: Add GOT pointer setup. * ld-powerpc/tls32.d: Update. * ld-powerpc/tls32.g: Update. * ld-powerpc/tls32.t: Update. * ld-powerpc/tlsexe.d: Update. * ld-powerpc/tlsexe32.d: Update. * ld-powerpc/tlsexe32.g: Update. * ld-powerpc/tlsexe32.r: Update. * ld-powerpc/tlsexetoc.d: Update. * ld-powerpc/tlsso32.d: Update. * ld-powerpc/tlsso32.g: Update. * ld-powerpc/tlsso32.r: Update.
48 lines
1.8 KiB
Makefile
48 lines
1.8 KiB
Makefile
#source: tls32.s
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#source: tlslib32.s
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#as: -a32
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#ld:
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#objdump: -dr
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#target: powerpc*-*-*
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.*
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Disassembly of section \.text:
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0+18000a0 <_start>:
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.*: (42 9f 00 05|05 00 9f 42) bcl 20,4\*cr7\+so,.* <_start\+0x4>
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.*: (7f c8 02 a6|a6 02 c8 7f) mflr r30
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.*: (3f de 00 02|02 00 de 3f) addis r30,r30,2
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.*: (3b de 80 a0|a0 80 de 3b) addi r30,r30,-32608
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.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0
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.*: (38 63 90 3c|3c 90 63 38) addi r3,r3,-28612
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.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0
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.*: (38 63 10 00|00 10 63 38) addi r3,r3,4096
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.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0
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.*: (38 63 90 20|20 90 63 38) addi r3,r3,-28640
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.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0
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.*: (38 63 10 00|00 10 63 38) addi r3,r3,4096
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.*: (39 23 80 24|24 80 23 39) addi r9,r3,-32732
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.*: (3d 23 00 00|00 00 23 3d) addis r9,r3,0
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.*: (81 49 80 28|28 80 49 81) lwz r10,-32728\(r9\)
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.*: (3d 22 00 00|00 00 22 3d) addis r9,r2,0
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.*: (a1 49 90 30|30 90 49 a1) lhz r10,-28624\(r9\)
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.*: (89 42 90 34|34 90 42 89) lbz r10,-28620\(r2\)
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.*: (3d 22 00 00|00 00 22 3d) addis r9,r2,0
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.*: (99 49 90 38|38 90 49 99) stb r10,-28616\(r9\)
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.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0
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.*: (38 63 90 00|00 90 63 38) addi r3,r3,-28672
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.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0
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.*: (38 63 10 00|00 10 63 38) addi r3,r3,4096
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.*: (91 43 80 04|04 80 43 91) stw r10,-32764\(r3\)
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.*: (3d 23 00 00|00 00 23 3d) addis r9,r3,0
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.*: (91 49 80 08|08 80 49 91) stw r10,-32760\(r9\)
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.*: (3d 22 00 00|00 00 22 3d) addis r9,r2,0
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.*: (b1 49 90 30|30 90 49 b1) sth r10,-28624\(r9\)
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.*: (a1 42 90 14|14 90 42 a1) lhz r10,-28652\(r2\)
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.*: (3d 22 00 00|00 00 22 3d) addis r9,r2,0
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.*: (a9 49 90 18|18 90 49 a9) lha r10,-28648\(r9\)
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0+1800120 <__tls_get_addr>:
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.*: (4e 80 00 20|20 00 80 4e) blr
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