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PR 24907 binutils* objdump.c (null_print): New function. (disassemble_bytes): Delete previous_octets local and replace with a test of the max_reloc_offset_into_insn field of the bfd_arch_info structure. If a reloc is a potential match for the next insn, then perform a dummy disassembly in order to calculate its real length. bfd * archures.c (bfd_arch_info_type): Add max_reloc_offset_into_insn field. (bfd_default_arch_struct): Initialise the new field. * bfd-in2.h: Regenerate. * cpu-aarch64.c: Initialise the new field. * cpu-alpha.c: Likewise. * cpu-arc.c: Likewise. * cpu-arm.c: Likewise. * cpu-avr.c: Likewise. * cpu-bfin.c: Likewise. * cpu-bpf.c: Likewise. * cpu-cr16.c: Likewise. * cpu-cr16c.c: Likewise. * cpu-cris.c: Likewise. * cpu-crx.c: Likewise. * cpu-csky.c: Likewise. * cpu-d10v.c: Likewise. * cpu-d30v.c: Likewise. * cpu-dlx.c: Likewise. * cpu-epiphany.c: Likewise. * cpu-fr30.c: Likewise. * cpu-frv.c: Likewise. * cpu-ft32.c: Likewise. * cpu-h8300.c: Likewise. * cpu-hppa.c: Likewise. * cpu-i386.c: Likewise. * cpu-ia64.c: Likewise. * cpu-iamcu.c: Likewise. * cpu-ip2k.c: Likewise. * cpu-iq2000.c: Likewise. * cpu-k1om.c: Likewise. * cpu-l1om.c: Likewise. * cpu-lm32.c: Likewise. * cpu-m10200.c: Likewise. * cpu-m10300.c: Likewise. * cpu-m32c.c: Likewise. * cpu-m32r.c: Likewise. * cpu-m68hc11.c: Likewise. * cpu-m68hc12.c: Likewise. * cpu-m68k.c: Likewise. * cpu-m9s12x.c: Likewise. * cpu-m9s12xg.c: Likewise. * cpu-mcore.c: Likewise. * cpu-mep.c: Likewise. * cpu-metag.c: Likewise. * cpu-microblaze.c: Likewise. * cpu-mips.c: Likewise. * cpu-mmix.c: Likewise. * cpu-moxie.c: Likewise. * cpu-msp430.c: Likewise. * cpu-mt.c: Likewise. * cpu-nds32.c: Likewise. * cpu-nfp.c: Likewise. * cpu-nios2.c: Likewise. * cpu-ns32k.c: Likewise. * cpu-or1k.c: Likewise. * cpu-pdp11.c: Likewise. * cpu-pj.c: Likewise. * cpu-plugin.c: Likewise. * cpu-powerpc.c: Likewise. * cpu-pru.c: Likewise. * cpu-riscv.c: Likewise. * cpu-rl78.c: Likewise. * cpu-rs6000.c: Likewise. * cpu-rx.c: Likewise. * cpu-s12z.c: Likewise. * cpu-s390.c: Likewise. * cpu-score.c: Likewise. * cpu-sh.c: Likewise. * cpu-sparc.c: Likewise. * cpu-spu.c: Likewise. * cpu-tic30.c: Likewise. * cpu-tic4x.c: Likewise. * cpu-tic54x.c: Likewise. * cpu-tic6x.c: Likewise. * cpu-tic80.c: Likewise. * cpu-tilegx.c: Likewise. * cpu-tilepro.c: Likewise. * cpu-v850.c: Likewise. * cpu-v850_rh850.c: Likewise. * cpu-vax.c: Likewise. * cpu-visium.c: Likewise. * cpu-wasm32.c: Likewise. * cpu-xc16x.c: Likewise. * cpu-xgate.c: Likewise. * cpu-xstormy16.c: Likewise. * cpu-xtensa.c: Likewise. * cpu-z80.c: Likewise. * cpu-z8k.c: Likewise. gas * testsuite/gas/arm/pr24907.s: New test. * testsuite/gas/arm/pr24907.d: Expected disassembly.
165 lines
5.2 KiB
C
165 lines
5.2 KiB
C
/* BFD library support routines for the AVR architecture.
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Copyright (C) 1999-2019 Free Software Foundation, Inc.
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Contributed by Denis Chertykov <denisc@overta.ru>
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This file is part of BFD, the Binary File Descriptor library.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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#include "sysdep.h"
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#include "bfd.h"
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#include "libbfd.h"
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/* This routine is provided two arch_infos and works out which AVR
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machine which would be compatible with both and returns a pointer
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to its info structure. */
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static const bfd_arch_info_type *
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compatible (const bfd_arch_info_type * a,
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const bfd_arch_info_type * b)
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{
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/* If a & b are for different architectures we can do nothing. */
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if (a->arch != b->arch)
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return NULL;
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if (a->mach == b->mach)
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return a;
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/* avr-6 is compatible only with itself as its call convention is not
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compatible with other avr (the mcu saves the return address on 3 bytes
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instead of 2). */
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if (a->mach == bfd_mach_avr6 || b->mach == bfd_mach_avr6)
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return NULL;
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if (a->mach < bfd_mach_avr6 && b->mach < bfd_mach_avr6)
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{
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/* Special case for ATmega[16]03 (avr:3) and ATmega83 (avr:4). */
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if ((a->mach == bfd_mach_avr3 && b->mach == bfd_mach_avr4)
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|| (a->mach == bfd_mach_avr4 && b->mach == bfd_mach_avr3))
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return NULL;
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if (a->mach <= b->mach)
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return b;
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if (a->mach >= b->mach)
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return a;
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}
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if (a->mach == bfd_mach_avr2 && b->mach == bfd_mach_avr25)
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return a;
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if (a->mach == bfd_mach_avr25 && b->mach == bfd_mach_avr2)
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return b;
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if (a->mach == bfd_mach_avr3 && b->mach == bfd_mach_avr31)
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return a;
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if (a->mach == bfd_mach_avr31 && b->mach == bfd_mach_avr3)
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return b;
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if (a->mach == bfd_mach_avr3 && b->mach == bfd_mach_avr35)
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return a;
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if (a->mach == bfd_mach_avr35 && b->mach == bfd_mach_avr3)
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return b;
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if (a->mach == bfd_mach_avr5 && b->mach == bfd_mach_avr51)
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return a;
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if (a->mach == bfd_mach_avr51 && b->mach == bfd_mach_avr5)
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return b;
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return NULL;
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}
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#define N(addr_bits, machine, print, default, next) \
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{ \
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8, /* Bits in a word. */ \
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addr_bits, /* Bits in an address. */ \
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8, /* Bits in a byte. */ \
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bfd_arch_avr, \
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machine, /* Machine number. */ \
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"avr", /* Architecture name. */ \
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print, /* Printable name. */ \
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1, /* Section align power. */ \
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default, /* Is this the default ? */ \
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compatible, \
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bfd_default_scan, \
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bfd_arch_default_fill, \
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next, \
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0 /* Maximum offset of a reloc from the start of an insn. */ \
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}
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static const bfd_arch_info_type arch_info_struct[] =
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{
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/* Assembler only. */
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N (16, bfd_mach_avr1, "avr:1", FALSE, & arch_info_struct[1]),
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/* Classic, <= 8K. */
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N (16, bfd_mach_avr2, "avr:2", FALSE, & arch_info_struct[2]),
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/* Classic + MOVW, <= 8K. */
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N (16, bfd_mach_avr25, "avr:25", FALSE, & arch_info_struct[3]),
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/* Classic, > 8K, <= 64K. */
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/* TODO: addr_bits should be 16, but set to 22 for some following
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version of GCC (from 4.3) for backward compatibility. */
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N (22, bfd_mach_avr3, "avr:3", FALSE, & arch_info_struct[4]),
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/* Classic, == 128K. */
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N (22, bfd_mach_avr31, "avr:31", FALSE, & arch_info_struct[5]),
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/* Classic + MOVW + JMP/CALL, > 8K, <= 64K. */
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N (16, bfd_mach_avr35, "avr:35", FALSE, & arch_info_struct[6]),
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/* Enhanced, <= 8K. */
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N (16, bfd_mach_avr4, "avr:4", FALSE, & arch_info_struct[7]),
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/* Enhanced, > 8K, <= 64K. */
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/* TODO: addr_bits should be 16, but set to 22 for some following
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version of GCC (from 4.3) for backward compatibility. */
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N (22, bfd_mach_avr5, "avr:5", FALSE, & arch_info_struct[8]),
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/* Enhanced, == 128K. */
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N (22, bfd_mach_avr51, "avr:51", FALSE, & arch_info_struct[9]),
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/* 3-Byte PC. */
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N (22, bfd_mach_avr6, "avr:6", FALSE, & arch_info_struct[10]),
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/* Tiny core (AVR Tiny). */
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N (16, bfd_mach_avrtiny, "avr:100", FALSE, & arch_info_struct[11]),
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/* Xmega 1. */
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N (24, bfd_mach_avrxmega1, "avr:101", FALSE, & arch_info_struct[12]),
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/* Xmega 2. */
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N (24, bfd_mach_avrxmega2, "avr:102", FALSE, & arch_info_struct[13]),
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/* Xmega 3. */
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N (24, bfd_mach_avrxmega3, "avr:103", FALSE, & arch_info_struct[14]),
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/* Xmega 4. */
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N (24, bfd_mach_avrxmega4, "avr:104", FALSE, & arch_info_struct[15]),
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/* Xmega 5. */
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N (24, bfd_mach_avrxmega5, "avr:105", FALSE, & arch_info_struct[16]),
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/* Xmega 6. */
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N (24, bfd_mach_avrxmega6, "avr:106", FALSE, & arch_info_struct[17]),
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/* Xmega 7. */
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N (24, bfd_mach_avrxmega7, "avr:107", FALSE, NULL)
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};
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const bfd_arch_info_type bfd_avr_arch =
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N (16, bfd_mach_avr2, "avr", TRUE, & arch_info_struct[0]);
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