Mike Frysinger d0b2f561a1 sim: testsuite: cleanup the istarget * logic ... Now that the multitarget testing has settled, clean up the cases where istarget * is used. This ends up being mostly style unindenting.		2022-02-16 00:36:47 -05:00
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abs.ms
addc.ms
addcpc.ms
addcv32c.ms
addcv32m.ms
addcv32r.ms
addi.ms
addiv32.ms
addm.ms
addoc.ms
addom.ms
addoq.ms
addq.ms
addqpc.ms
addr.ms
addswpc.ms
addxc.ms
addxm.ms
addxr.ms
andc.ms
andm.ms
andq.ms
andr.ms
asm.exp	sim: testsuite: cleanup the istarget * logic	2022-02-16 00:36:47 -05:00
asr.ms
ba.ms
badarch1.ms
bare1.ms
bare2.ms
bare3.ms
bas.ms
bccb.ms
bdapc.ms
bdapm.ms
bdapq.ms
bdapqpc.ms
biap.ms
boundc.ms
boundm.ms
boundmv32.ms
boundr.ms
break.ms
btst.ms
ccr-v10.ms
ccs-v32.ms
clearfv10.ms
clearfv32.ms
clrjmp1.ms
cmpc.ms
cmpm.ms
cmpq.ms
cmpr.ms
cmpxc.ms
cmpxm.ms
dflags.ms
dip.ms
dstep.ms
endmem1.ms	sim/testsuite/cris: Assembler testcase for PRIx32 usage bug	2022-02-14 23:50:24 +01:00
fidxd.ms
fidxi.ms
ftagd.ms
ftagi.ms
halt.ms
io1.ms	sim/testsuite/cris: As applicable, require simoption --cris-900000xx	2022-02-14 23:50:55 +01:00
io2.ms	sim/testsuite/cris: As applicable, require simoption --cris-900000xx	2022-02-14 23:50:55 +01:00
io3.ms	sim/testsuite/cris: As applicable, require simoption --cris-900000xx	2022-02-14 23:50:55 +01:00
io4.ms
io5.ms
io6.ms	sim/testsuite/cris: As applicable, require simoption --cris-900000xx	2022-02-14 23:50:55 +01:00
io7.ms	sim/testsuite/cris: As applicable, require simoption --cris-900000xx	2022-02-14 23:50:55 +01:00
io8.ms
io9.ms
jsr.ms
jsrmv10.ms
jumpmp.ms
jumppv32.ms
lapc.ms
lsl.ms
lsr.ms
lz.ms
mcp.ms
movdelsr1.ms
movecpc.ms
movecr.ms
movecrt10.ms
movecrt32.ms
movect10.ms
movei.ms
movempc.ms
movemr.ms
movemrv10.ms
movemrv32.ms
movepcb.ms
movepcd.ms
movepcw.ms
moveq.ms
moveqpc.ms
mover.ms
moverbpc.ms
moverdpc.ms
moverm.ms
moverpcb.ms
moverpcd.ms
moverpcw.ms
moverwpc.ms
movesmp.ms
movmp8.ms
movmp.ms
movpmv10.ms
movpmv32.ms
movppc.ms
movpr.ms
movprv10.ms
movprv32.ms
movrss.ms
movscpc.ms
movscr.ms
movsm.ms
movsmpc.ms
movsr.ms
movsrpc.ms
movssr.ms
movucpc.ms
movucr.ms
movum.ms
movumpc.ms
movur.ms
movurpc.ms
mstep.ms
msteppc1.ms
msteppc2.ms
msteppc3.ms
mulv10.ms
mulv32.ms
mulx.ms
neg.ms
nonvcv32.ms
nopv10t.ms
nopv32t2.ms
nopv32t3.ms
nopv32t4.ms
nopv32t.ms
not.ms
op3.ms
opterr1.ms
opterr2.ms
opterr3.ms
opterr4.ms
opterr5.ms
option1.ms
option2.ms
option3.ms
option4.ms
orc.ms
orm.ms
orq.ms
orr.ms
pcplus.ms
pid1.ms
raw1.ms
raw2.ms
raw3.ms
raw4.ms
raw5.ms
raw6.ms
raw7.ms
raw8.ms
raw9.ms
raw10.ms
raw11.ms
raw12.ms
raw13.ms
raw14.ms
raw15.ms
raw16.ms
raw17.ms
ret.ms
rfe.ms
rfg.ms
rfn.ms
sbfs.ms
scc.ms
sfe.ms
subc.ms
subm.ms
subq.ms
subqpc.ms
subr.ms
subxc.ms
subxm.ms
subxr.ms
swap.ms
tb.ms
test.ms
testutils.inc
tjmpsrv32-2.ms
tjmpsrv32.ms
tjsrcv10.ms
tjsrcv32.ms
tmemv10.ms
tmemv32.ms
tmulv10.ms
tmulv32.ms
tmvm1.ms
tmvm2.ms
tmvmrv10.ms
tmvmrv32.ms
tmvrmv10.ms
tmvrmv32.ms
user.ms
x0-v10.ms
x0-v32.ms
x1-v10.ms
x1-v32.ms
x2-v10.ms
x2-v32.ms
x3-v10.ms
x3-v32.ms
x4-v32.ms
x5-v10.ms
x5-v32.ms
x6-v10.ms
x6-v32.ms
x7-v10.ms
x7-v32.ms
x8-v10.ms
x9-v10.ms
x10-v10.ms
xor.ms