mirror of
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260cd341da
gas/ * doc/c-i386.texi: Document amx_int8, amx_bf16 and amx_tile. * config/tc-i386.c (i386_error): Add invalid_sib_address. (cpu_arch): Add .amx_int8, .amx_bf16 and .amx_tile. (cpu_noarch): Add noamx_int8, noamx_bf16 and noamx_tile. (match_simd_size): Add tmmword check. (operand_type_match): Add tmmword. (type_names): Add rTMM. (i386_error): Add invalid_tmm_register_set. (check_VecOperands): Handle invalid_sib_address and invalid_tmm_register_set. (match_template): Handle invalid_sib_address. (build_modrm_byte): Handle non-vector SIB and zmmword. (i386_index_check): Disallow RegIP for non-vector SIB. (check_register): Handle zmmword. * testsuite/gas/i386/i386.exp: Add AMX new tests. * testsuite/gas/i386/intel-regs.d: Add tmm. * testsuite/gas/i386/intel-regs.s: Add tmm. * testsuite/gas/i386/x86-64-amx-intel.d: New. * testsuite/gas/i386/x86-64-amx-inval.l: New. * testsuite/gas/i386/x86-64-amx-inval.s: New. * testsuite/gas/i386/x86-64-amx.d: New. * testsuite/gas/i386/x86-64-amx.s: New. * testsuite/gas/i386/x86-64-amx-bad.d: New. * testsuite/gas/i386/x86-64-amx-bad.s: New. opcodes/ * i386-dis.c (TMM): New. (EXtmm): Likewise. (VexTmm): Likewise. (MVexSIBMEM): Likewise. (tmm_mode): Likewise. (vex_sibmem_mode): Likewise. (REG_VEX_0F3849_X86_64_P_0_W_0_M_1): Likewise. (MOD_VEX_0F3849_X86_64_P_0_W_0): Likewise. (MOD_VEX_0F3849_X86_64_P_2_W_0): Likewise. (MOD_VEX_0F3849_X86_64_P_3_W_0): Likewise. (MOD_VEX_0F384B_X86_64_P_1_W_0): Likewise. (MOD_VEX_0F384B_X86_64_P_2_W_0): Likewise. (MOD_VEX_0F384B_X86_64_P_3_W_0): Likewise. (MOD_VEX_0F385C_X86_64_P_1_W_0): Likewise. (MOD_VEX_0F385E_X86_64_P_0_W_0): Likewise. (MOD_VEX_0F385E_X86_64_P_1_W_0): Likewise. (MOD_VEX_0F385E_X86_64_P_2_W_0): Likewise. (MOD_VEX_0F385E_X86_64_P_3_W_0): Likewise. (RM_VEX_0F3849_X86_64_P_0_W_0_M_1_R_0): Likewise. (PREFIX_VEX_0F3849_X86_64): Likewise. (PREFIX_VEX_0F384B_X86_64): Likewise. (PREFIX_VEX_0F385C_X86_64): Likewise. (PREFIX_VEX_0F385E_X86_64): Likewise. (X86_64_VEX_0F3849): Likewise. (X86_64_VEX_0F384B): Likewise. (X86_64_VEX_0F385C): Likewise. (X86_64_VEX_0F385E): Likewise. (VEX_LEN_0F3849_X86_64_P_0_W_0_M_0): Likewise. (VEX_LEN_0F3849_X86_64_P_0_W_0_M_1_REG_0_RM_0): Likewise. (VEX_LEN_0F3849_X86_64_P_2_W_0_M_0): Likewise. (VEX_LEN_0F3849_X86_64_P_3_W_0_M_0): Likewise. (VEX_LEN_0F384B_X86_64_P_1_W_0_M_0): Likewise. (VEX_LEN_0F384B_X86_64_P_2_W_0_M_0): Likewise. (VEX_LEN_0F384B_X86_64_P_3_W_0_M_0): Likewise. (VEX_LEN_0F385C_X86_64_P_1_W_0_M_0): Likewise. (VEX_LEN_0F385E_X86_64_P_0_W_0_M_0): Likewise. (VEX_LEN_0F385E_X86_64_P_1_W_0_M_0): Likewise. (VEX_LEN_0F385E_X86_64_P_2_W_0_M_0): Likewise. (VEX_LEN_0F385E_X86_64_P_3_W_0_M_0): Likewise. (VEX_W_0F3849_X86_64_P_0): Likewise. (VEX_W_0F3849_X86_64_P_2): Likewise. (VEX_W_0F3849_X86_64_P_3): Likewise. (VEX_W_0F384B_X86_64_P_1): Likewise. (VEX_W_0F384B_X86_64_P_2): Likewise. (VEX_W_0F384B_X86_64_P_3): Likewise. (VEX_W_0F385C_X86_64_P_1): Likewise. (VEX_W_0F385E_X86_64_P_0): Likewise. (VEX_W_0F385E_X86_64_P_1): Likewise. (VEX_W_0F385E_X86_64_P_2): Likewise. (VEX_W_0F385E_X86_64_P_3): Likewise. (names_tmm): Likewise. (att_names_tmm): Likewise. (intel_operand_size): Handle void_mode. (OP_XMM): Handle tmm_mode. (OP_EX): Likewise. (OP_VEX): Likewise. * i386-gen.c (cpu_flag_init): Add entries for CpuAMX_INT8, CpuAMX_BF16 and CpuAMX_TILE. (operand_type_shorthands): Add RegTMM. (operand_type_init): Likewise. (operand_types): Add Tmmword. (cpu_flag_init): Add CPU_AMX_INT8, CpuAMX_BF16 and CpuAMX_TILE. (cpu_flags): Add CpuAMX_INT8, CpuAMX_BF16 and CpuAMX_TILE. * i386-opc.h (CpuAMX_INT8): New. (CpuAMX_BF16): Likewise. (CpuAMX_TILE): Likewise. (SIBMEM): Likewise. (Tmmword): Likewise. (i386_cpu_flags): Add cpuamx_int8, cpuamx_bf16 and cpuamx_tile. (i386_opcode_modifier): Extend width of fields vexvvvv and sib. (i386_operand_type): Add tmmword. * i386-opc.tbl: Add AMX instructions. * i386-reg.tbl: Add AMX registers. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
849 lines
29 KiB
Plaintext
849 lines
29 KiB
Plaintext
-*- text -*-
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* Add support for Intel AMX instructions.
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||
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* Configure with --enable-x86-used-note by default for Linux/x86.
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||
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Changes in 2.35:
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||
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* X86 NaCl target support is removed.
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||
|
||
* Extend .symver directive to update visibility of the original symbol
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and assign one original symbol to different versioned symbols.
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||
|
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* Add support for Intel SERIALIZE and TSXLDTRK instructions.
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||
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* Add -mlfence-after-load=, -mlfence-before-indirect-branch= and
|
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-mlfence-before-ret= options to x86 assembler to help mitigate
|
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CVE-2020-0551.
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|
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* Add --gdwarf-5 option to the assembler to generate DWARF 5 debug output
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(if such output is being generated). Added the ability to generate
|
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version 5 .debug_line sections.
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* Add -mbig-obj support to i386 MingW targets.
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|
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Changes in 2.34:
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* Add -malign-branch-boundary=NUM, -malign-branch=TYPE[+TYPE...],
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-malign-branch-prefix-size=NUM and -mbranches-within-32B-boundaries
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options to x86 assembler to align branches within a fixed boundary
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with segment prefixes or NOPs.
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* Add support for Zilog eZ80 and Zilog Z180 CPUs.
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* Add support for z80-elf target.
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* Add support for relocation of each byte or word of multibyte value to Z80
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targets (just use right shift to 0, 8, 16, or 24 bits or AND operation
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with 0xff/0xffff mask): ld a, label >> 16 \ ld hl, label & 0xffff
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* Add SDCC support for Z80 targets.
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Changes in 2.33:
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* Add support for the Arm Scalable Vector Extension version 2 (SVE2)
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instructions.
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* Add support for the Arm Transactional Memory Extension (TME)
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instructions.
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* Add support for the Armv8.1-M Mainline and M-profile Vector Extension (MVE)
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instructions.
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* For MIPS, Add -m[no-]fix-loongson3-llsc option to fix (or not) Loongson3
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LLSC Errata. Add a --enable-mips-fix-loongson3-llsc=[yes|no] configure
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time option to set the default behavior. Set the default if the configure
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option is not used to "no".
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* Add support for the Arm Cortex-A76AE, Cortex-A77 and Cortex-M35P
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processors.
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* Add support for the AArch64 Cortex-A34, Cortex-A65, Cortex-A65AE,
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Cortex-A76AE, and Cortex-A77 processors.
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* Add .float16 directive for both Arm and AArch64 to allow encoding of 16-bit
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floating point literals. Add .float16_format directive and
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-mfp16-format=[ieee|alternative] option for Arm to control the format of the
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encoding.
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* Add --gdwarf-cie-version command line flag. This allows control over which
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version of DWARF CIE the assembler creates.
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Changes in 2.32:
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* Add -mvexwig=[0|1] option to x86 assembler to control encoding of
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VEX.W-ignored (WIG) VEX instructions.
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* Add -mx86-used-note=[yes|no] option to generate (or not) x86 GNU property
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notes. Add a --enable-x86-used-note configure time option to set the
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default behavior. Set the default if the configure option is not used
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to "no".
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* Add support for the MIPS Loongson EXTensions R2 (EXT2) instructions.
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* Add support for the MIPS Loongson EXTensions (EXT) instructions.
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* Add support for the MIPS Loongson Content Address Memory (CAM) ASE.
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* Add support for the C-SKY processor series.
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* Add support for the MIPS Loongson MultiMedia extensions Instructions (MMI)
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ASE.
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Changes in 2.31:
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* The ADR and ADRL pseudo-instructions supported by the ARM assembler
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now only set the bottom bit of the address of thumb function symbols
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if the -mthumb-interwork command line option is active.
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* Add support for the MIPS Global INValidate (GINV) ASE.
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* Add support for the MIPS Cyclic Redudancy Check (CRC) ASE.
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* Add support for the Freescale S12Z architecture.
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* Add --generate-missing-build-notes=[yes|no] option to create (or not) GNU
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Build Attribute notes if none are present in the input sources. Add a
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--enable-generate-build-notes=[yes|no] configure time option to set the
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default behaviour. Set the default if the configure option is not used
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to "no".
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* Remove -mold-gcc command-line option for x86 targets.
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* Add -O[2|s] command-line options to x86 assembler to enable alternate
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shorter instruction encoding.
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* Add support for .nops directive. It is currently supported only for
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x86 targets.
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Changes in 2.30:
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* Add support for loaction views in DWARF debug line information.
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Changes in 2.29:
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* Add support for ELF SHF_GNU_MBIND.
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* Add support for the WebAssembly file format and wasm32 ELF conversion.
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||
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* PowerPC gas now checks that the correct register class is used in
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instructions. For instance, "addi %f4,%cr3,%r31" warns three times
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that the registers are invalid.
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* Add support for the Texas Instruments PRU processor.
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* Support for the ARMv8-R architecture and Cortex-R52 processor has been
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added to the ARM port.
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Changes in 2.28:
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* Add support for the RISC-V architecture.
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* Add support for the ARM Cortex-M23 and Cortex-M33 processors.
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Changes in 2.27:
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* Default to --enable-compressed-debug-sections=gas for Linux/x86 targets.
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* Add --no-pad-sections to stop the assembler from padding the end of output
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sections up to their alignment boundary.
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* Support for the ARMv8-M architecture has been added to the ARM port. Support
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for the ARMv8-M Security and DSP Extensions has also been added to the ARM
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port.
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* ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and
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.extCoreRegister pseudo-ops that allow an user to define custom
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instructions, conditional codes, auxiliary and core registers.
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* Add a configure option --enable-elf-stt-common to decide whether ELF
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assembler should generate common symbols with the STT_COMMON type by
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default. Default to no.
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* New command-line option --elf-stt-common= for ELF targets to control
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whether to generate common symbols with the STT_COMMON type.
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* Add ability to set section flags and types via numeric values for ELF
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||
based targets.
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* Add a configure option --enable-x86-relax-relocations to decide whether
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x86 assembler should generate relax relocations by default. Default to
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yes, except for x86 Solaris targets older than Solaris 12.
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* New command-line option -mrelax-relocations= for x86 target to control
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whether to generate relax relocations.
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* New command-line option -mfence-as-lock-add=yes for x86 target to encode
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lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)".
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* Add assembly-time relaxation option for ARC cpus.
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* Add --with-cpu=TYPE configure option for ARC gas. This allows the default
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cpu type to be adjusted at configure time.
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Changes in 2.26:
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* Add a configure option --enable-compressed-debug-sections={all,gas} to
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decide whether DWARF debug sections should be compressed by default.
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* Add support for the ARC EM/HS, and ARC600/700 architectures. Remove
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assembler support for Argonaut RISC architectures.
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* Symbol and label names can now be enclosed in double quotes (") which allows
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them to contain characters that are not part of valid symbol names in high
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level languages.
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* Added the correctly spelled -march=armv6kz, for ARMv6KZ support. The
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previous spelling, -march=armv6zk, is still accepted.
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* Support for the ARMv8.1 architecture has been added to the Aarch64 port.
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Support for the individual ARMv8.1 Adv.SIMD, LOR and PAN architecture
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extensions has also been added to the Aarch64 port.
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* Support for the ARMv8.1 architecture has been added to the ARM port. Support
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for the individual ARMv8.1 Adv.SIMD and PAN architecture extensions has also
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been added to the ARM port.
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* Extend --compress-debug-sections option to support
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--compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi] for ELF
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||
targets.
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* --compress-debug-sections is turned on for Linux/x86 by default.
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Changes in 2.25:
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* Add support for the AVR Tiny microcontrollers.
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* Replace support for openrisc and or32 with support for or1k.
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* Enhanced the ARM port to accept the assembler output from the CodeComposer
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Studio tool. Support is enabled via the new command-line option -mccs.
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* Add support for the Andes NDS32.
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Changes in 2.24:
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* Add support for the Texas Instruments MSP430X processor.
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|
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* Add -gdwarf-sections command-line option to enable per-code-section
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||
generation of DWARF .debug_line sections.
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* Add support for Altera Nios II.
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* Add support for the Imagination Technologies Meta processor.
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* Add support for the v850e3v5.
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* Remove assembler support for MIPS ECOFF targets.
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Changes in 2.23:
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|
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* Add support for the 64-bit ARM architecture: AArch64.
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|
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* Add support for S12X processor.
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* Add support for the VLE extension to the PowerPC architecture.
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||
|
||
* Add support for the Freescale XGATE architecture.
|
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|
||
* Add support for .bundle_align_mode, .bundle_lock, and .bundle_unlock
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directives. These are currently available only for x86 and ARM targets.
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|
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* Add support for the Renesas RL78 architecture.
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||
|
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* Add support for the Adapteva EPIPHANY architecture.
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||
|
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* For x86, allow 'rep bsf', 'rep bsr', and 'rep ret' syntax.
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|
||
Changes in 2.22:
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||
|
||
* Add support for the Tilera TILEPro and TILE-Gx architectures.
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|
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Changes in 2.21:
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|
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* Gas no longer requires doubling of ampersands in macros.
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||
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||
* Add support for the TMS320C6000 (TI C6X) processor family.
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||
|
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* GAS now understands an extended syntax in the .section directive flags
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for COFF targets that allows the section's alignment to be specified. This
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feature has also been backported to the 2.20 release series, starting with
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||
2.20.1.
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||
|
||
* Add support for the Renesas RX processor.
|
||
|
||
* New command-line option, --compress-debug-sections, which requests
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||
compression of DWARF debug information sections in the relocatable output
|
||
file. Compressed debug sections are supported by readelf, objdump, and
|
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gold, but not currently by Gnu ld.
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||
|
||
Changes in 2.20:
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||
|
||
* Added support for v850e2 and v850e2v3.
|
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|
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* GNU/Linux targets now supports "gnu_unique_object" as a value in the .type
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pseudo op. It marks the symbol as being globally unique in the entire
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||
process.
|
||
|
||
* ARM assembler now supports .inst[.nw] pseudo-ops to insert opcodes specified
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in binary rather than text.
|
||
|
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* Add support for common symbol alignment to PE formats.
|
||
|
||
* Add support for the new discriminator column in the DWARF line table,
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||
with a discriminator operand for the .loc directive.
|
||
|
||
* Add support for Sunplus score architecture.
|
||
|
||
* The .type pseudo-op now accepts a type of STT_GNU_IFUNC which can be used to
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||
indicate that if the symbol is the target of a relocation, its value should
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||
not be use. Instead the function should be invoked and its result used as
|
||
the value.
|
||
|
||
* Add support for Lattice Mico32 (lm32) architecture.
|
||
|
||
* Add support for Xilinx MicroBlaze architecture.
|
||
|
||
Changes in 2.19:
|
||
|
||
* New pseudo op .cfi_val_encoded_addr, to record constant addresses in unwind
|
||
tables without runtime relocation.
|
||
|
||
* New command-line option, -h-tick-hex, for sh, m32c, and h8/300 targets, which
|
||
adds compatibility with H'00 style hex constants.
|
||
|
||
* New command-line option, -msse-check=[none|error|warning], for x86
|
||
targets.
|
||
|
||
* New sub-option added to the assembler's -a command-line switch to
|
||
generate a listing output. The 'g' sub-option will insert into the listing
|
||
various information about the assembly, such as assembler version, the
|
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command-line options used, and a time stamp.
|
||
|
||
* New command-line option -msse2avx for x86 target to encode SSE
|
||
instructions with VEX prefix.
|
||
|
||
* Add Intel XSAVE, EPT, MOVBE, AES, PCLMUL, AVX/FMA support for x86 target.
|
||
|
||
* New command-line options, -march=CPU[,+EXTENSION...], -mtune=CPU,
|
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-mmnemonic=[att|intel], -msyntax=[att|intel], -mindex-reg,
|
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-mnaked-reg and -mold-gcc, for x86 targets.
|
||
|
||
* Support for generating wide character strings has been added via the new
|
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pseudo ops: .string16, .string32 and .string64.
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||
|
||
* Support for SSE5 has been added to the i386 port.
|
||
|
||
Changes in 2.18:
|
||
|
||
* The GAS sources are now released under the GPLv3.
|
||
|
||
* Support for the National Semiconductor CR16 target has been added.
|
||
|
||
* Added gas .reloc pseudo. This is a low-level interface for creating
|
||
relocations.
|
||
|
||
* Add support for x86_64 PE+ target.
|
||
|
||
* Add support for Score target.
|
||
|
||
Changes in 2.17:
|
||
|
||
* Support for the Infineon XC16X has been added by KPIT Cummins Infosystems.
|
||
|
||
* Support for ms2 architecture has been added.
|
||
|
||
* Support for the Z80 processor family has been added.
|
||
|
||
* Add support for the "@<file>" syntax to the command line, so that extra
|
||
switches can be read from <file>.
|
||
|
||
* The SH target supports a new command-line switch --enable-reg-prefix which,
|
||
if enabled, will allow register names to be optionally prefixed with a $
|
||
character. This allows register names to be distinguished from label names.
|
||
|
||
* Macros with a variable number of arguments are now supported. See the
|
||
documentation for how this works.
|
||
|
||
* Added --reduce-memory-overheads switch to reduce the size of the hash
|
||
tables used, at the expense of longer assembly times, and
|
||
--hash-size=<NUMBER> to set the size of the hash tables used by gas.
|
||
|
||
* Macro names and macro parameter names can now be any identifier that would
|
||
also be legal as a symbol elsewhere. For macro parameter names, this is
|
||
known to cause problems in certain sources when the respective target uses
|
||
characters inconsistently, and thus macro parameter references may no longer
|
||
be recognized as such (see the documentation for details).
|
||
|
||
* Support the .f_floating, .d_floating, .g_floating and .h_floating directives
|
||
for the VAX target in order to be more compatible with the VAX MACRO
|
||
assembler.
|
||
|
||
* New command-line option -mtune=[itanium1|itanium2] for IA64 targets.
|
||
|
||
Changes in 2.16:
|
||
|
||
* Redefinition of macros now results in an error.
|
||
|
||
* New command-line option -mhint.b=[ok|warning|error] for IA64 targets.
|
||
|
||
* New command-line option -munwind-check=[warning|error] for IA64
|
||
targets.
|
||
|
||
* The IA64 port now uses automatic dependency violation removal as its default
|
||
mode.
|
||
|
||
* Port to MAXQ processor contributed by HCL Tech.
|
||
|
||
* Added support for generating unwind tables for ARM ELF targets.
|
||
|
||
* Add a -g command-line option to generate debug information in the target's
|
||
preferred debug format.
|
||
|
||
* Support for the crx-elf target added.
|
||
|
||
* Support for the sh-symbianelf target added.
|
||
|
||
* Added a pseudo-op (.secrel32) to generate 32 bit section relative relocations
|
||
on pe[i]-i386; required for this target's DWARF 2 support.
|
||
|
||
* Support for Motorola MCF521x/5249/547x/548x added.
|
||
|
||
* Support for ColdFire EMAC instructions added and Motorola syntax for MAC/EMAC
|
||
instrucitons.
|
||
|
||
* New command-line option -mno-shared for MIPS ELF targets.
|
||
|
||
* New command-line option --alternate and pseudo-ops .altmacro and .noaltmacro
|
||
added to enter (and leave) alternate macro syntax mode.
|
||
|
||
Changes in 2.15:
|
||
|
||
* The MIPS -membedded-pic option (Embedded-PIC code generation) is
|
||
deprecated and will be removed in a future release.
|
||
|
||
* Added PIC m32r Linux (ELF) and support to M32R assembler.
|
||
|
||
* Added support for ARM V6.
|
||
|
||
* Added support for sh4a and variants.
|
||
|
||
* Support for Renesas M32R2 added.
|
||
|
||
* Limited support for Mapping Symbols as specified in the ARM ELF
|
||
specification has been added to the arm assembler.
|
||
|
||
* On ARM architectures, added a new gas directive ".unreq" that undoes
|
||
definitions created by ".req".
|
||
|
||
* Support for Motorola ColdFire MCF528x added.
|
||
|
||
* Added --gstabs+ switch to enable the generation of STABS debug format
|
||
information with GNU extensions.
|
||
|
||
* Added support for MIPS64 Release 2.
|
||
|
||
* Added support for v850e1.
|
||
|
||
* Added -n switch for x86 assembler. By default, x86 GAS replaces
|
||
multiple nop instructions used for alignment within code sections
|
||
with multi-byte nop instructions such as leal 0(%esi,1),%esi. This
|
||
switch disables the optimization.
|
||
|
||
* Removed -n option from MIPS assembler. It was not useful, and confused the
|
||
existing -non_shared option.
|
||
|
||
Changes in 2.14:
|
||
|
||
* Added support for MIPS32 Release 2.
|
||
|
||
* Added support for Xtensa architecture.
|
||
|
||
* Support for Intel's iWMMXt processor (an ARM variant) added.
|
||
|
||
* An assembler test generator has been contributed and an example file that
|
||
uses it (gas/testsuite/gas/all/test-gen.c and test-exmaple.c).
|
||
|
||
* Support for SH2E added.
|
||
|
||
* GASP has now been removed.
|
||
|
||
* Support for Texas Instruments TMS320C4x and TMS320C3x series of
|
||
DSP's contributed by Michael Hayes and Svein E. Seldal.
|
||
|
||
* Support for the Ubicom IP2xxx microcontroller added.
|
||
|
||
Changes in 2.13:
|
||
|
||
* Support for the Fujitsu FRV architecture added by Red Hat. Models for FR400
|
||
and FR500 included.
|
||
|
||
* Support for DLX processor added.
|
||
|
||
* GASP has now been deprecated and will be removed in a future release. Use
|
||
the macro facilities in GAS instead.
|
||
|
||
* GASP now correctly parses floating point numbers. Unless the base is
|
||
explicitly specified, they are interpreted as decimal numbers regardless of
|
||
the currently specified base.
|
||
|
||
Changes in 2.12:
|
||
|
||
* Support for Don Knuth's MMIX, by Hans-Peter Nilsson.
|
||
|
||
* Support for the OpenRISC 32-bit embedded processor by OpenCores.
|
||
|
||
* The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for
|
||
specifying the target instruction set. The old method of specifying the
|
||
target processor has been deprecated, but is still accepted for
|
||
compatibility.
|
||
|
||
* Support for the VFP floating-point instruction set has been added to
|
||
the ARM assembler.
|
||
|
||
* New psuedo op: .incbin to include a set of binary data at a given point
|
||
in the assembly. Contributed by Anders Norlander.
|
||
|
||
* The MIPS assembler now accepts -march/-mtune. -mcpu has been deprecated
|
||
but still works for compatability.
|
||
|
||
* The MIPS assembler no longer issues a warning by default when it
|
||
generates a nop instruction from a macro. The new command-line option
|
||
-n will turn on the warning.
|
||
|
||
Changes in 2.11:
|
||
|
||
* Support for PDP-11 and 2.11BSD a.out format, by Lars Brinkhoff.
|
||
|
||
* x86 gas now supports the full Pentium4 instruction set.
|
||
|
||
* Support for AMD x86-64 architecture, by Jan Hubicka, SuSE Labs.
|
||
|
||
* Support for Motorola 68HC11 and 68HC12.
|
||
|
||
* Support for Texas Instruments TMS320C54x (tic54x).
|
||
|
||
* Support for IA-64.
|
||
|
||
* Support for i860, by Jason Eckhardt.
|
||
|
||
* Support for CRIS (Axis Communications ETRAX series).
|
||
|
||
* x86 gas has a new .arch pseudo op to specify the target CPU architecture.
|
||
|
||
* x86 gas -q command-line option quietens warnings about register size changes
|
||
due to suffix, indirect jmp/call without `*', stand-alone prefixes, and
|
||
translating various deprecated floating point instructions.
|
||
|
||
Changes in 2.10:
|
||
|
||
* Support for the ARM msr instruction was changed to only allow an immediate
|
||
operand when altering the flags field.
|
||
|
||
* Support for ATMEL AVR.
|
||
|
||
* Support for IBM 370 ELF. Somewhat experimental.
|
||
|
||
* Support for numbers with suffixes.
|
||
|
||
* Added support for breaking to the end of repeat loops.
|
||
|
||
* Added support for parallel instruction syntax (DOUBLEBAR_PARALLEL).
|
||
|
||
* New .elseif pseudo-op added.
|
||
|
||
* New --fatal-warnings option.
|
||
|
||
* picoJava architecture support added.
|
||
|
||
* Motorola MCore 210 processor support added.
|
||
|
||
* A new pseudo-op .intel_syntax has been implemented to allow gas to parse i386
|
||
assembly programs with intel syntax.
|
||
|
||
* New pseudo-ops .func,.endfunc to aid in debugging user-written assembler code.
|
||
|
||
* Added -gdwarf2 option to generate DWARF 2 debugging information.
|
||
|
||
* Full 16-bit mode support for i386.
|
||
|
||
* Greatly improved instruction operand checking for i386. This change will
|
||
produce errors or warnings on incorrect assembly code that previous versions
|
||
of gas accepted. If you get unexpected messages from code that worked with
|
||
older versions of gas, please double check the code before reporting a bug.
|
||
|
||
* Weak symbol support added for COFF targets.
|
||
|
||
* Mitsubishi D30V support added.
|
||
|
||
* Texas Instruments c80 (tms320c80) support added.
|
||
|
||
* i960 ELF support added.
|
||
|
||
* ARM ELF support added.
|
||
|
||
Changes in 2.9:
|
||
|
||
* Texas Instruments c30 (tms320c30) support added.
|
||
|
||
* The assembler now optimizes the exception frame information generated by egcs
|
||
and gcc 2.8. The new --traditional-format option disables this optimization.
|
||
|
||
* Added --gstabs option to generate stabs debugging information.
|
||
|
||
* The -a option takes a new suboption, m (e.g., -alm) to expand macros in a
|
||
listing.
|
||
|
||
* Added -MD option to print dependencies.
|
||
|
||
Changes in 2.8:
|
||
|
||
* BeOS support added.
|
||
|
||
* MIPS16 support added.
|
||
|
||
* Motorola ColdFire 5200 support added (configure for m68k and use -m5200).
|
||
|
||
* Alpha/VMS support added.
|
||
|
||
* m68k options --base-size-default-16, --base-size-default-32,
|
||
--disp-size-default-16, and --disp-size-default-32 added.
|
||
|
||
* The alignment directives now take an optional third argument, which is the
|
||
maximum number of bytes to skip. If doing the alignment would require
|
||
skipping more than the given number of bytes, the alignment is not done at
|
||
all.
|
||
|
||
* The ELF assembler has a new pseudo-op, .symver, used for symbol versioning.
|
||
|
||
* The -a option takes a new suboption, c (e.g., -alc), to skip false
|
||
conditionals in listings.
|
||
|
||
* Added new pseudo-op, .equiv; it's like .equ, except that it is an error if
|
||
the symbol is already defined.
|
||
|
||
Changes in 2.7:
|
||
|
||
* The PowerPC assembler now allows the use of symbolic register names (r0,
|
||
etc.) if -mregnames is used. Symbolic names preceded by a '%' (%r0, etc.)
|
||
can be used any time. PowerPC 860 move to/from SPR instructions have been
|
||
added.
|
||
|
||
* Alpha Linux (ELF) support added.
|
||
|
||
* PowerPC ELF support added.
|
||
|
||
* m68k Linux (ELF) support added.
|
||
|
||
* i960 Hx/Jx support added.
|
||
|
||
* i386/PowerPC gnu-win32 support added.
|
||
|
||
* SCO ELF support added. For OpenServer 5 targets (i386-unknown-sco3.2v5) the
|
||
default is to build COFF-only support. To get a set of tools that generate
|
||
ELF (they'll understand both COFF and ELF), you must configure with
|
||
target=i386-unknown-sco3.2v5elf.
|
||
|
||
* m88k-motorola-sysv3* support added.
|
||
|
||
Changes in 2.6:
|
||
|
||
* Gas now directly supports macros, without requiring GASP.
|
||
|
||
* Gas now has an MRI assembler compatibility mode. Use -M or --mri to select
|
||
MRI mode. The pseudo-op ``.mri 1'' will switch into the MRI mode until the
|
||
``.mri 0'' is seen; this can be convenient for inline assembler code.
|
||
|
||
* Added --defsym SYM=VALUE option.
|
||
|
||
* Added -mips4 support to MIPS assembler.
|
||
|
||
* Added PIC support to Solaris and SPARC SunOS 4 assembler.
|
||
|
||
Changes in 2.4:
|
||
|
||
* Converted this directory to use an autoconf-generated configure script.
|
||
|
||
* ARM support, from Richard Earnshaw.
|
||
|
||
* Updated VMS support, from Pat Rankin, including considerably improved
|
||
debugging support.
|
||
|
||
* Support for the control registers in the 68060.
|
||
|
||
* Handles (ignores) a new directive ".this_GCC_requires_the_GNU_assembler", to
|
||
provide for possible future gcc changes, for targets where gas provides some
|
||
features not available in the native assembler. If the native assembler is
|
||
used, it should become obvious pretty quickly what the problem is.
|
||
|
||
* Usage message is available with "--help".
|
||
|
||
* The GNU Assembler Preprocessor (gasp) is included. (Actually, it was in 2.3
|
||
also, but didn't get into the NEWS file.)
|
||
|
||
* Weak symbol support for a.out.
|
||
|
||
* A bug in the listing code which could cause an infinite loop has been fixed.
|
||
Bugs in listings when generating a COFF object file have also been fixed.
|
||
|
||
* Initial i386-svr4 PIC implementation from Eric Youngdale, based on code by
|
||
Paul Kranenburg.
|
||
|
||
* Improved Alpha support. Immediate constants can have a much larger range
|
||
now. Support for the 21164 has been contributed by Digital.
|
||
|
||
* Updated ns32k (pc532-mach, netbsd532) support from Ian Dall.
|
||
|
||
Changes in 2.3:
|
||
|
||
* Mach i386 support, by David Mackenzie and Ken Raeburn.
|
||
|
||
* RS/6000 and PowerPC support by Ian Taylor.
|
||
|
||
* VMS command scripts (make-gas.com, config-gas.com) have been worked on a bit,
|
||
based on mail received from various people. The `-h#' option should work
|
||
again too.
|
||
|
||
* HP-PA work, by Jeff Law. Note, for the PA, gas-2.3 has been designed to work
|
||
with gdb-4.12 and gcc-2.6. As gcc-2.6 has not been released yet, a special
|
||
version of gcc-2.5.8 has been patched to work with gas-2.3. You can retrieve
|
||
this special version of gcc-2.5.8 via anonymous ftp from jaguar.cs.utah.edu
|
||
in the "dist" directory.
|
||
|
||
* Vax support in gas fixed for BSD, so it builds and seems to run a couple
|
||
simple tests okay. I haven't put it through extensive testing. (GNU make is
|
||
currently required for BSD 4.3 builds.)
|
||
|
||
* Support for the DEC Alpha, running OSF/1 (ECOFF format). The gas support is
|
||
based on code donated by CMU, which used an a.out-based format. I'm afraid
|
||
the alpha-a.out support is pretty badly mangled, and much of it removed;
|
||
making it work will require rewriting it as BFD support for the format anyways.
|
||
|
||
* Irix 5 support.
|
||
|
||
* The test suites have been fixed up a bit, so that they should work with a
|
||
couple different versions of expect and dejagnu.
|
||
|
||
* Symbols' values are now handled internally as expressions, permitting more
|
||
flexibility in evaluating them in some cases. Some details of relocation
|
||
handling have also changed, and simple constant pool management has been
|
||
added, to make the Alpha port easier.
|
||
|
||
* New option "--statistics" for printing out program run times. This is
|
||
intended to be used with the gcc "-Q" option, which prints out times spent in
|
||
various phases of compilation. (You should be able to get all of them
|
||
printed out with "gcc -Q -Wa,--statistics", I think.)
|
||
|
||
Changes in 2.2:
|
||
|
||
* RS/6000 AIX and MIPS SGI Irix 5 support has been added.
|
||
|
||
* Configurations that are still in development (and therefore are convenient to
|
||
have listed in configure.in) still get rejected without a minor change to
|
||
gas/Makefile.in, so people not doing development work shouldn't get the
|
||
impression that support for such configurations is actually believed to be
|
||
reliable.
|
||
|
||
* The program name (usually "as") is printed when a fatal error message is
|
||
displayed. This should prevent some confusion about the source of occasional
|
||
messages about "internal errors".
|
||
|
||
* ELF support is falling into place. Support for the 386 should be working.
|
||
Support for SPARC Solaris is in. HPPA support from Utah is being integrated.
|
||
|
||
* Symbol values are maintained as expressions instead of being immediately
|
||
boiled down to add-symbol, sub-symbol, and constant. This permits slightly
|
||
more complex calculations involving symbols whose values are not alreadey
|
||
known.
|
||
|
||
* DBX-style debugging info ("stabs") is now supported for COFF formats.
|
||
If any stabs directives are seen in the source, GAS will create two new
|
||
sections: a ".stab" and a ".stabstr" section. The format of the .stab
|
||
section is nearly identical to the a.out symbol format, and .stabstr is
|
||
its string table. For this to be useful, you must have configured GCC
|
||
to generate stabs (by defining DBX_DEBUGGING_INFO), and must have a GDB
|
||
that can use the stab sections (4.11 or later).
|
||
|
||
* LynxOS, on i386 and m68k platforms, is now supported. SPARC LynxOS
|
||
support is in progress.
|
||
|
||
Changes in 2.1:
|
||
|
||
* Several small fixes for i386-aix (PS/2) support from Minh Tran-Le have been
|
||
incorporated, but not well tested yet.
|
||
|
||
* Altered the opcode table split for m68k; it should require less VM to compile
|
||
with gcc now.
|
||
|
||
* Some minor adjustments to add (Convergent Technologies') Miniframe support,
|
||
suggested by Ronald Cole.
|
||
|
||
* HPPA support (running OSF only, not HPUX) has been contributed by Utah. This
|
||
includes improved ELF support, which I've started adapting for SPARC Solaris
|
||
2.x. Integration isn't completely, so it probably won't work.
|
||
|
||
* HP9000/300 support, donated by HP, has been merged in.
|
||
|
||
* Ian Taylor has finished the MIPS ECOFF (Ultrix, Irix) support.
|
||
|
||
* Better error messages for unsupported configurations (e.g., hppa-hpux).
|
||
|
||
* Test suite framework is starting to become reasonable.
|
||
|
||
Changes in 2.0:
|
||
|
||
* Mostly bug fixes.
|
||
|
||
* Some more merging of BFD and ELF code, but ELF still doesn't work.
|
||
|
||
Changes in 1.94:
|
||
|
||
* BFD merge is partly done. Adventurous souls may try giving configure the
|
||
"--with-bfd-assembler" option. Currently, ELF format requires it, a.out
|
||
format accepts it; SPARC CPU accepts it. It's the default only for OS "elf"
|
||
or "solaris". (ELF isn't really supported yet. It needs work. I've got
|
||
some code from Utah for HP-PA ELF, and from DG for m88k ELF, but they're not
|
||
fully merged yet.)
|
||
|
||
* The 68K opcode table has been split in half. It should now compile under gcc
|
||
without consuming ridiculous amounts of memory.
|
||
|
||
* A couple data structures have been reduced in size. This should result in
|
||
saving a little bit of space at runtime.
|
||
|
||
* Support for MIPS, from OSF and Ralph Campbell, has been merged in. The OSF
|
||
code provided ROSE format support, which I haven't merged in yet. (I can
|
||
make it available, if anyone wants to try it out.) Ralph's code, for BSD
|
||
4.4, supports a.out format. We don't have ECOFF support in just yet; it's
|
||
coming.
|
||
|
||
* Support for the Hitachi H8/500 has been added.
|
||
|
||
* VMS host and target support should be working now, thanks chiefly to Eric
|
||
Youngdale.
|
||
|
||
Changes in 1.93.01:
|
||
|
||
* For m68k, support for more processors has been added: 68040, CPU32, 68851.
|
||
|
||
* For i386, .align is now power-of-two; was number-of-bytes.
|
||
|
||
* For m68k, "%" is now accepted before register names. For COFF format, which
|
||
doesn't use underscore prefixes for C labels, it is required, so variable "a0"
|
||
can be distinguished from the register.
|
||
|
||
* Last public release was 1.38. Lots of configuration changes since then, lots
|
||
of new CPUs and formats, lots of bugs fixed.
|
||
|
||
|
||
Copyright (C) 2012-2020 Free Software Foundation, Inc.
|
||
|
||
Copying and distribution of this file, with or without modification,
|
||
are permitted in any medium without royalty provided the copyright
|
||
notice and this notice are preserved.
|
||
|
||
Local variables:
|
||
fill-column: 79
|
||
End:
|