binutils-gdb/sim/testsuite/v850/allinsns.exp
Jeff Law 49fffa58f7 Fix "bins" simulation for v850e3v5
I've been carrying this for a few years.   One test in the GCC testsuite is
failing due to a bug in the handling of the v850e3v5 instruction "bins".

When the "bins" instruction specifies a 32bit bitfield size, the simulator
exhibits undefined behavior by trying to shift a 32 bit quantity by 32 bits.
In the case of a 32 bit shift, we know what the resultant mask should be.  So
we can just set it.

That seemed better than using 1UL for the constant (on a 32bit host unsigned
long might still just be 32 bits) or needlessly forcing everything to
long long types.

Thankfully the case where this shows up is only bins <src>, 0, 32, <dest>
which would normally be encoded as a simple move.

	* testsuite/v850/allinsns.exp: Add v850e3v5.
	* testsuite/v850/bins.cgs: New test.
	* v850/simops.c (v850_bins): Avoid undefined behavior on left shift.
2022-04-06 11:06:53 -04:00

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# v850 simulator testsuite.
sim_init
# All machines.
# Should add more cpus if the testsuite adds coverage for their insns, but
# at the core level, there's no deviation beyond these two.
set all_machs "v850e3v5 v850e v850"
# gas doesn't support any '=' option for v850.
set cpu_option_sep ""
set cpu_option -m
# The .cgs suffix is for "cgen .s".
foreach src [lsort [glob -nocomplain $srcdir/$subdir/*.cgs]] {
# If we're only testing specific files and this isn't one of them, skip it.
if ![runtest_file_p $runtests $src] {
continue
}
run_sim_test $src $all_machs
}