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https://sourceware.org/git/binutils-gdb.git
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1368b914e9
Now that all port tests live under testsuite/sim/*/, and none live in testsuite/ directly, flatten the structure by moving all of the dirs under testsuite/sim/ to testsuite/ directly. We need to stop passing --tool to dejagnu so that it searches all dirs and not just ones that start with "sim". Since we have no other dirs in this tree, and no plans to add any, should be fine.
171 lines
3.5 KiB
ArmAsm
171 lines
3.5 KiB
ArmAsm
// reg-based SHIFT test program.
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# mach: bfin
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.include "testutils.inc"
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start
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// Test FDEP with no sign extension
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R0.L = 0xdead;
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R0.H = 0x1234;
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R1.L = 0x0c08; // pos=12 len=8
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R1.H = 0x00ff;
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R7 = DEPOSIT( R0, R1 );
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DBGA ( R7.L , 0xfead );
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DBGA ( R7.H , 0x123f );
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R0.L = 0xdead;
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R0.H = 0x1234;
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R1.L = 0x0c04; // pos=12 len=4
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R1.H = 0x00ff;
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R7 = DEPOSIT( R0, R1 );
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DBGA ( R7.L , 0xfead );
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DBGA ( R7.H , 0x1234 );
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R0.L = 0xdead;
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R0.H = 0x1234;
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R1.L = 0x0c05; // pos=12 len=5
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R1.H = 0x00ff;
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R7 = DEPOSIT( R0, R1 );
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DBGA ( R7.L , 0xfead );
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DBGA ( R7.H , 0x1235 );
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R0.L = 0xdead;
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R0.H = 0x1234;
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R1.L = 0x0010; // pos=0 len=16
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R1.H = 0xffff;
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R7 = DEPOSIT( R0, R1 );
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DBGA ( R7.L , 0xffff );
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DBGA ( R7.H , 0x1234 );
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R0.L = 0xdead;
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R0.H = 0x1234;
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R1.L = 0x0011; // pos=0 len=17
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R1.H = 0xffff;
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R7 = DEPOSIT( R0, R1 );
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DBGA ( R7.L , 0xffff );
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DBGA ( R7.H , 0x1234 );
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R0.L = 0xdead;
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R0.H = 0x1234;
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R1.L = 0x0114; // pos=1 len=20
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R1.H = 0xffff;
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R7 = DEPOSIT( R0, R1 );
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DBGA ( R7.L , 0xffff );
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DBGA ( R7.H , 0x1235 );
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R0.L = 0xdead;
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R0.H = 0x1234;
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R1.L = 0x001f; // pos=0 len=31
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R1.H = 0xffff;
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R7 = DEPOSIT( R0, R1 );
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DBGA ( R7.L , 0xffff );
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DBGA ( R7.H , 0x1234 );
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R0.L = 0xdead;
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R0.H = 0x1234;
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R1.L = 0x1c04; // pos=28 len=4
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R1.H = 0xffff;
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R7 = DEPOSIT( R0, R1 );
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DBGA ( R7.L , 0xdead );
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DBGA ( R7.H , 0xf234 );
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R0.L = 0xdead;
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R0.H = 0x0234;
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R1.L = 0x1d04; // pos=29 len=4
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R1.H = 0xffff;
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R7 = DEPOSIT( R0, R1 );
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DBGA ( R7.L , 0xdead );
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DBGA ( R7.H , 0xe234 );
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R0.L = 0xdead;
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R0.H = 0x0234;
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R1.L = 0x1f04; // pos=31 len=4
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R1.H = 0xffff;
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R7 = DEPOSIT( R0, R1 );
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DBGA ( R7.L , 0xdead );
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DBGA ( R7.H , 0x8234 );
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R0.L = 0xdead;
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R0.H = 0x0234;
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R1.L = 0x2004; // pos=32 len=4, same as pos=0 len=4
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R1.H = 0xffff;
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R7 = DEPOSIT( R0, R1 );
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DBGA ( R7.L , 0xdeaf );
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DBGA ( R7.H , 0x0234 );
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// Test FDEP with sign extension
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R0.L = 0xdead;
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R0.H = 0x1234;
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R1.L = 0x0c08; // pos=12 len=8
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R1.H = 0x00ff;
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R7 = DEPOSIT( R0, R1 ) (X);
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DBGA ( R7.L , 0xfead );
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DBGA ( R7.H , 0xffff );
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CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AN; R7 = CC; DBGA ( R7.L , 0x1 );
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R0.L = 0xdead;
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R0.H = 0x1234;
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R1.L = 0x0c08; // pos=12 len=8
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R1.H = 0x007f;
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R7 = DEPOSIT( R0, R1 ) (X);
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DBGA ( R7.L , 0xfead );
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DBGA ( R7.H , 0x0007 );
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CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AN; R7 = CC; DBGA ( R7.L , 0x0 );
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R0.L = 0xdea0;
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R0.H = 0x1234;
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R1.L = 0x0110; // pos=1 len=16
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R1.H = 0xffff;
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R7 = DEPOSIT( R0, R1 ) (X);
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DBGA ( R7.L , 0xfffe );
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DBGA ( R7.H , 0xffff );
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CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AN; R7 = CC; DBGA ( R7.L , 0x1 );
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R0.L = 0xdea0;
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R0.H = 0x1234;
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R1.L = 0x0101; // pos=1 len=1
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R1.H = 0xffff;
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R7 = DEPOSIT( R0, R1 ) (X);
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DBGA ( R7.L , 0xfffe );
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DBGA ( R7.H , 0xffff );
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CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AN; R7 = CC; DBGA ( R7.L , 0x1 );
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R0.L = 0xdea0;
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R0.H = 0x1234;
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R1.L = 0x0102; // pos=1 len=2
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R1.H = 0x0001;
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R7 = DEPOSIT( R0, R1 ) (X);
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DBGA ( R7.L , 0x0002 );
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DBGA ( R7.H , 0x0000 );
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CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AN; R7 = CC; DBGA ( R7.L , 0x0 );
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R0.L = 0xdea0;
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R0.H = 0x1234;
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R1.L = 0x0002; // pos=0 len=2
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R1.H = 0x0001;
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R7 = DEPOSIT( R0, R1 ) (X);
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DBGA ( R7.L , 0x0001 );
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DBGA ( R7.H , 0x0000 );
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CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AN; R7 = CC; DBGA ( R7.L , 0x0 );
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R0.L = 0xdea0;
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R0.H = 0x1234;
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R1.L = 0x0000; // pos=0 len=0
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R1.H = 0x000f;
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R7 = DEPOSIT( R0, R1 ) (X);
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DBGA ( R7.L , 0x0000 );
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DBGA ( R7.H , 0x0000 );
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CC = AZ; R7 = CC; DBGA ( R7.L , 0x1 );
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CC = AN; R7 = CC; DBGA ( R7.L , 0x0 );
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pass
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