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1368b914e9
Now that all port tests live under testsuite/sim/*/, and none live in testsuite/ directly, flatten the structure by moving all of the dirs under testsuite/sim/ to testsuite/ directly. We need to stop passing --tool to dejagnu so that it searches all dirs and not just ones that start with "sim". Since we have no other dirs in this tree, and no plans to add any, should be fine.
312 lines
6.9 KiB
ArmAsm
312 lines
6.9 KiB
ArmAsm
//Original:/testcases/core/c_dsp32shift_lhh/c_dsp32shift_lhh.dsp
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// Spec Reference: dsp32shift lshift/lshift
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# mach: bfin
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.include "testutils.inc"
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start
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// lshift/lshift : = (half reg)
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// d_reg = lshift/lshift (d BY d_lo)
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// Rx by RLx
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imm32 r0, 0x01230000;
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imm32 r1, 0x12345678;
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imm32 r2, 0x23456789;
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imm32 r3, 0x3456789a;
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imm32 r4, 0x456789ab;
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imm32 r5, 0x56789abc;
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imm32 r6, 0x6789abcd;
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imm32 r7, 0x789abcde;
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R1 = LSHIFT R0 BY R0.L (V);
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R2 = LSHIFT R1 BY R0.L (V);
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R3 = LSHIFT R2 BY R0.L (V);
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R4 = LSHIFT R3 BY R0.L (V);
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R5 = LSHIFT R4 BY R0.L (V);
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R6 = LSHIFT R5 BY R0.L (V);
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R7 = LSHIFT R6 BY R0.L (V);
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R0 = LSHIFT R7 BY R0.L (V);
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imm32 r0, 0x01230002;
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imm32 r1, 0x12345678;
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imm32 r2, 0x23456789;
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imm32 r3, 0x3456789a;
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imm32 r4, 0x456789ab;
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imm32 r5, 0x56789abc;
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imm32 r6, 0x6789abcd;
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imm32 r7, 0x789abcde;
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R1.L = 5;
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R2 = LSHIFT R0 BY R1.L (V);
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R3 = LSHIFT R1 BY R1.L (V);
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R4 = LSHIFT R2 BY R1.L (V);
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R5 = LSHIFT R3 BY R1.L (V);
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R6 = LSHIFT R4 BY R1.L (V);
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R7 = LSHIFT R5 BY R1.L (V);
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R0 = LSHIFT R6 BY R1.L (V);
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R1 = LSHIFT R7 BY R1.L (V);
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imm32 r0, 0x01230002;
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imm32 r1, 0x12345678;
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imm32 r2, 0x23456789;
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imm32 r3, 0x3456789a;
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imm32 r4, 0x456789ab;
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imm32 r5, 0x56789abc;
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imm32 r6, 0x6789abcd;
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imm32 r7, 0x789abcde;
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R2 = 15;
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R3 = LSHIFT R0 BY R2.L (V);
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R4 = LSHIFT R1 BY R2.L (V);
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R5 = LSHIFT R2 BY R2.L (V);
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R6 = LSHIFT R3 BY R2.L (V);
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R7 = LSHIFT R4 BY R2.L (V);
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R0 = LSHIFT R5 BY R2.L (V);
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R1 = LSHIFT R6 BY R2.L (V);
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R2 = LSHIFT R7 BY R2.L (V);
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imm32 r0, 0x01230002;
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imm32 r1, 0x12345678;
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imm32 r2, 0x23456789;
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imm32 r3, 0x3456789a;
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imm32 r4, 0x456789ab;
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imm32 r5, 0x56789abc;
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imm32 r6, 0x6789abcd;
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imm32 r7, 0x789abcde;
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R3.L = 16;
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R4 = LSHIFT R0 BY R3.L (V);
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R5 = LSHIFT R1 BY R3.L (V);
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R6 = LSHIFT R2 BY R3.L (V);
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R7 = LSHIFT R3 BY R3.L (V);
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R0 = LSHIFT R4 BY R3.L (V);
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R1 = LSHIFT R5 BY R3.L (V);
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R2 = LSHIFT R6 BY R3.L (V);
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R3 = LSHIFT R7 BY R3.L (V);
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imm32 r0, 0x01230002;
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imm32 r1, 0x12345678;
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imm32 r2, 0x23456789;
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imm32 r3, 0x3456789a;
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imm32 r4, 0x456789ab;
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imm32 r5, 0x56789abc;
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imm32 r6, 0x6789abcd;
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imm32 r7, 0x789abcde;
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R4.L = -1;
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R0 = LSHIFT R0 BY R4.L (V);
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R1 = LSHIFT R1 BY R4.L (V);
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R2 = LSHIFT R2 BY R4.L (V);
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R3 = LSHIFT R3 BY R4.L (V);
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R4 = LSHIFT R4 BY R4.L (V);
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R5 = LSHIFT R5 BY R4.L (V);
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R6 = LSHIFT R6 BY R4.L (V);
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R7 = LSHIFT R7 BY R4.L (V);
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imm32 r0, 0x01230002;
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imm32 r1, 0x12345678;
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imm32 r2, 0x23456789;
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imm32 r3, 0x3456789a;
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imm32 r4, 0x456789ab;
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imm32 r5, 0x56789abc;
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imm32 r6, 0x6789abcd;
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imm32 r7, 0x789abcde;
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R5.L = -6;
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R6 = LSHIFT R0 BY R5.L (V);
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R7 = LSHIFT R1 BY R5.L (V);
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R0 = LSHIFT R2 BY R5.L (V);
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R1 = LSHIFT R3 BY R5.L (V);
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R2 = LSHIFT R4 BY R5.L (V);
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R3 = LSHIFT R5 BY R5.L (V);
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R4 = LSHIFT R6 BY R5.L (V);
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R5 = LSHIFT R7 BY R5.L (V);
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imm32 r0, 0x01230002;
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imm32 r1, 0x12345678;
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imm32 r2, 0x23456789;
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imm32 r3, 0x3456789a;
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imm32 r4, 0x456789ab;
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imm32 r5, 0x56789abc;
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imm32 r6, 0x6789abcd;
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imm32 r7, 0x789abcde;
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R6.L = -15;
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R7 = LSHIFT R0 BY R6.L (V);
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R0 = LSHIFT R1 BY R6.L (V);
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R1 = LSHIFT R2 BY R6.L (V);
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R2 = LSHIFT R3 BY R6.L (V);
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R3 = LSHIFT R4 BY R6.L (V);
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R4 = LSHIFT R5 BY R6.L (V);
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R5 = LSHIFT R6 BY R6.L (V);
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R6 = LSHIFT R7 BY R6.L (V);
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imm32 r0, 0x01230002;
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imm32 r1, 0x12345678;
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imm32 r2, 0x23456789;
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imm32 r3, 0x3456789a;
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imm32 r4, 0x456789ab;
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imm32 r5, 0x56789abc;
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imm32 r6, 0x6789abcd;
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imm32 r7, 0x789abcde;
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R7.L = -16;
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R0 = LSHIFT R0 BY R7.L (V);
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R1 = LSHIFT R1 BY R7.L (V);
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R2 = LSHIFT R2 BY R7.L (V);
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R3 = LSHIFT R3 BY R7.L (V);
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R4 = LSHIFT R4 BY R7.L (V);
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R5 = LSHIFT R5 BY R7.L (V);
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R6 = LSHIFT R6 BY R7.L (V);
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R7 = LSHIFT R7 BY R7.L (V);
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imm32 r0, 0x01230002;
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imm32 r1, 0x12345678;
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imm32 r2, 0x23456789;
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imm32 r3, 0x3456789a;
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imm32 r4, 0x456789ab;
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imm32 r5, 0x56789abc;
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imm32 r6, 0x6789abcd;
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imm32 r7, 0x789abcde;
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R0.L = 4;
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//r0 = lshift/lshift (r0 by rl0);
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R1 = LSHIFT R1 BY R0.L (V);
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R2 = LSHIFT R2 BY R0.L (V);
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R3 = LSHIFT R3 BY R0.L (V);
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R4 = LSHIFT R4 BY R0.L (V);
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R5 = LSHIFT R5 BY R0.L (V);
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R6 = LSHIFT R6 BY R0.L (V);
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R7 = LSHIFT R7 BY R0.L (V);
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imm32 r0, 0x01230002;
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imm32 r1, 0x12345678;
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imm32 r2, 0x23456789;
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imm32 r3, 0x3456789a;
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imm32 r4, 0x456789ab;
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imm32 r5, 0x56789abc;
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imm32 r6, 0x6789abcd;
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imm32 r7, 0x789abcde;
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R1.L = 6;
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R0 = LSHIFT R0 BY R1.L (V);
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//r1 = lshift/lshift (r1 by rl1);
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R2 = LSHIFT R2 BY R1.L (V);
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R3 = LSHIFT R3 BY R1.L (V);
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R4 = LSHIFT R4 BY R1.L (V);
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R5 = LSHIFT R5 BY R1.L (V);
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R6 = LSHIFT R6 BY R1.L (V);
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R7 = LSHIFT R7 BY R1.L (V);
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imm32 r0, 0x01230002;
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imm32 r1, 0x12345678;
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imm32 r2, 0x23456789;
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imm32 r3, 0x3456789a;
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imm32 r4, 0x456789ab;
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imm32 r5, 0x56789abc;
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imm32 r6, 0x6789abcd;
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imm32 r7, 0x789abcde;
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R2.L = 15;
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R0 = LSHIFT R0 BY R2.L (V);
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R1 = LSHIFT R1 BY R2.L (V);
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//r2 = lshift/lshift (r2 by rl2);
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R3 = LSHIFT R3 BY R2.L (V);
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R4 = LSHIFT R4 BY R2.L (V);
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R5 = LSHIFT R5 BY R2.L (V);
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R6 = LSHIFT R6 BY R2.L (V);
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R7 = LSHIFT R7 BY R2.L (V);
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imm32 r0, 0x01230002;
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imm32 r1, 0x12345678;
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imm32 r2, 0x23456789;
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imm32 r3, 0x3456789a;
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imm32 r4, 0x456789ab;
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imm32 r5, 0x56789abc;
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imm32 r6, 0x6789abcd;
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imm32 r7, 0x789abcde;
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R3.L = 16;
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R0 = LSHIFT R0 BY R3.L (V);
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R1 = LSHIFT R1 BY R3.L (V);
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R2 = LSHIFT R2 BY R3.L (V);
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//r3 = lshift/lshift (r3 by rl3);
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R4 = LSHIFT R4 BY R3.L (V);
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R5 = LSHIFT R5 BY R3.L (V);
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R6 = LSHIFT R6 BY R3.L (V);
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R7 = LSHIFT R7 BY R3.L (V);
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imm32 r0, 0x01230002;
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imm32 r1, 0x12345678;
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imm32 r2, 0x23456789;
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imm32 r3, 0x3456789a;
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imm32 r4, 0x456789ab;
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imm32 r5, 0x56789abc;
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imm32 r6, 0x6789abcd;
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imm32 r7, 0x789abcde;
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R4.L = -9;
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R0 = LSHIFT R0 BY R4.L (V);
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R1 = LSHIFT R1 BY R4.L (V);
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R2 = LSHIFT R2 BY R4.L (V);
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R3 = LSHIFT R3 BY R4.L (V);
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//r4 = lshift/lshift (r4 by rl4);
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R5 = LSHIFT R5 BY R4.L (V);
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R6 = LSHIFT R6 BY R4.L (V);
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R7 = LSHIFT R7 BY R4.L (V);
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imm32 r0, 0x01230002;
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imm32 r1, 0x12345678;
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imm32 r2, 0x23456789;
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imm32 r3, 0x3456789a;
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imm32 r4, 0x456789ab;
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imm32 r5, 0x56789abc;
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imm32 r6, 0x6789abcd;
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imm32 r7, 0x789abcde;
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R5.L = -14;
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R0 = LSHIFT R0 BY R5.L (V);
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R1 = LSHIFT R1 BY R5.L (V);
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R2 = LSHIFT R2 BY R5.L (V);
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R3 = LSHIFT R3 BY R5.L (V);
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R4 = LSHIFT R4 BY R5.L (V);
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//r5 = lshift/lshift (r5 by rl5);
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R6 = LSHIFT R6 BY R5.L (V);
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R7 = LSHIFT R7 BY R5.L (V);
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imm32 r0, 0x01230002;
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imm32 r1, 0x12345678;
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imm32 r2, 0x23456789;
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imm32 r3, 0x3456789a;
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imm32 r4, 0x456789ab;
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imm32 r5, 0x56789abc;
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imm32 r6, 0x6789abcd;
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imm32 r7, 0x789abcde;
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R6.L = -15;
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R0 = LSHIFT R0 BY R6.L (V);
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R1 = LSHIFT R1 BY R6.L (V);
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R2 = LSHIFT R2 BY R6.L (V);
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R3 = LSHIFT R3 BY R6.L (V);
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R4 = LSHIFT R4 BY R6.L (V);
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R5 = LSHIFT R5 BY R6.L (V);
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//r6 = lshift/lshift (r6 by rl6);
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R7 = LSHIFT R7 BY R6.L (V);
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imm32 r0, 0x01230002;
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imm32 r1, 0x12345678;
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imm32 r2, 0x23456789;
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imm32 r3, 0x3456789a;
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imm32 r4, 0x456789ab;
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imm32 r5, 0x56789abc;
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imm32 r6, 0x6789abcd;
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imm32 r7, 0x789abcde;
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R7.L = -16;
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R0 = LSHIFT R0 BY R7.L (V);
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R1 = LSHIFT R1 BY R7.L (V);
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R2 = LSHIFT R2 BY R7.L (V);
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R3 = LSHIFT R3 BY R7.L (V);
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R4 = LSHIFT R4 BY R7.L (V);
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R5 = LSHIFT R5 BY R7.L (V);
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R6 = LSHIFT R6 BY R7.L (V);
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R7 = LSHIFT R7 BY R7.L (V);
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CHECKREG r0, 0x00000000;
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CHECKREG r1, 0x00000000;
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CHECKREG r2, 0x00000000;
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CHECKREG r3, 0x00000000;
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CHECKREG r4, 0x00000000;
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CHECKREG r5, 0x00000000;
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CHECKREG r6, 0x00000000;
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CHECKREG r7, 0x00000000;
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CHECKREG r7, 0x00000000;
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pass
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