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1368b914e9
Now that all port tests live under testsuite/sim/*/, and none live in testsuite/ directly, flatten the structure by moving all of the dirs under testsuite/sim/ to testsuite/ directly. We need to stop passing --tool to dejagnu so that it searches all dirs and not just ones that start with "sim". Since we have no other dirs in this tree, and no plans to add any, should be fine.
256 lines
5.1 KiB
ArmAsm
256 lines
5.1 KiB
ArmAsm
//Original:/testcases/core/c_dsp32mac_a1a0/c_dsp32mac_a1a0.dsp
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// Spec Reference: dsp32mac a1 a0
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# mach: bfin
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.include "testutils.inc"
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start
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INIT_R_REGS 0;
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imm32 r0, 0x00000000;
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A0 = 0;
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A1 = 0;
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ASTAT = r0;
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// test the default (signed fraction : left )
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imm32 r0, 0x12345678;
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imm32 r1, 0x33456789;
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imm32 r2, 0x5556789a;
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imm32 r3, 0x75678912;
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imm32 r4, 0x86789123;
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imm32 r5, 0xa7891234;
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imm32 r6, 0xc1234567;
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imm32 r7, 0xf1234567;
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A1 = R0.L * R1.L, A0 = R0.L * R1.L;
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R0 = A0.w;
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R1 = A1.w;
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A1 = R2.L * R3.L, A0 += R2.L * R3.H;
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R2 = A0.w;
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R3 = A1.w;
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A1 += R4.L * R5.L, A0 = R4.H * R5.L;
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R4 = A0.w;
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R5 = A1.w;
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A1 += R6.L * R7.L, A0 += R6.H * R7.H;
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R6 = A0.w;
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R7 = A1.w;
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CHECKREG r0, 0x45F11C70;
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CHECKREG r1, 0x45F11C70;
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CHECKREG r2, 0xB48EEC5C;
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CHECKREG r3, 0x8FF1C9A8;
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CHECKREG r4, 0xEEB780C0;
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CHECKREG r5, 0x802DABE0;
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CHECKREG r6, 0xF6043652;
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CHECKREG r7, 0xA5CF0AC2;
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imm32 r0, 0x12245618;
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imm32 r1, 0x23256719;
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imm32 r2, 0x3426781a;
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imm32 r3, 0x45278912;
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imm32 r4, 0x56289113;
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imm32 r5, 0x67291214;
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imm32 r6, 0xa1234517;
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imm32 r7, 0xc1234517;
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A1 = R0.L * R1.H, A0 += R0.L * R1.L;
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R0 = A0.w;
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R1 = A1.w;
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A1 = R2.L * R3.H, A0 += R2.L * R3.H;
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R2 = A0.w;
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R3 = A1.w;
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A1 = R4.L * R5.H, A0 += R4.H * R5.L;
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R4 = A0.w;
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R5 = A1.w;
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A1 = R6.L * R7.H, A0 += R6.H * R7.H;
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R6 = A0.w;
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R7 = A1.w;
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CHECKREG r0, 0x3B5C5702;
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CHECKREG r1, 0x17A372F0;
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CHECKREG r2, 0x7C3EF2EE;
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CHECKREG r3, 0x40E29BEC;
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CHECKREG r4, 0x886A092E;
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CHECKREG r5, 0xA699C216;
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CHECKREG r6, 0xB700DEC0;
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CHECKREG r7, 0xDE11924A;
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imm32 r0, 0x15245648;
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imm32 r1, 0x25256749;
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imm32 r2, 0x3526784a;
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imm32 r3, 0x45278942;
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imm32 r4, 0x55389143;
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imm32 r5, 0x65391244;
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imm32 r6, 0xa5334547;
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imm32 r7, 0xc5334547;
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A1 += R0.H * R1.H, A0 = R0.L * R1.L;
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R0 = A0.w;
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R1 = A1.w;
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A1 += R2.H * R3.H, A0 = R2.L * R3.H;
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R2 = A0.w;
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R3 = A1.w;
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A1 += R4.H * R5.H, A0 = R4.H * R5.L;
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R4 = A0.w;
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R5 = A1.w;
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A1 += R6.H * R7.H, A0 = R6.H * R7.H;
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R6 = A0.w;
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R7 = A1.w;
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CHECKREG r0, 0x459F2510;
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CHECKREG r1, 0xE43416B2;
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CHECKREG r2, 0x40FC8A8C;
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CHECKREG r3, 0x00EAC446;
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CHECKREG r4, 0x0C2925C0;
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CHECKREG r5, 0x444EE736;
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CHECKREG r6, 0x29B65052;
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CHECKREG r7, 0x6E053788;
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imm32 r0, 0x13245628;
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imm32 r1, 0x23256729;
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imm32 r2, 0x3326782a;
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imm32 r3, 0x43278922;
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imm32 r4, 0x56389123;
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imm32 r5, 0x67391224;
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imm32 r6, 0xa1334527;
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imm32 r7, 0xc1334527;
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A1 += R0.H * R1.L, A0 += R0.L * R1.L;
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R0 = A0.w;
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R1 = A1.w;
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A1 = R2.H * R3.L, A0 += R2.L * R3.H;
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R2 = A0.w;
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R3 = A1.w;
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A1 = R4.H * R5.L, A0 += R4.H * R5.L;
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R4 = A0.w;
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R5 = A1.w;
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A1 = R6.H * R7.L, A0 += R6.H * R7.H;
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R6 = A0.w;
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R7 = A1.w;
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CHECKREG r0, 0x6F261922;
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CHECKREG r1, 0x7D725110;
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CHECKREG r2, 0xAE30B1EE;
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CHECKREG r3, 0xD0804218;
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CHECKREG r4, 0xBA68D1AE;
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CHECKREG r5, 0x0C381FC0;
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CHECKREG r6, 0xE8EBF200;
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CHECKREG r7, 0xCCC89B8A;
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imm32 r0, 0x01340678;
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imm32 r1, 0x02450789;
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imm32 r2, 0x0356089a;
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imm32 r3, 0x04670912;
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imm32 r4, 0x05780123;
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imm32 r5, 0x06890234;
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imm32 r6, 0x07230567;
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imm32 r7, 0x00230567;
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A1 -= R0.L * R1.L, A0 = R0.L * R1.L;
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R0 = A0.w;
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R1 = A1.w;
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A1 = R2.L * R3.L, A0 -= R2.L * R3.H;
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R2 = A0.w;
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R3 = A1.w;
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A1 -= R4.L * R5.L, A0 -= R4.H * R5.L;
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R4 = A0.w;
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R5 = A1.w;
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A1 -= R6.L * R7.L, A0 += R6.H * R7.H;
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R6 = A0.w;
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R7 = A1.w;
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CHECKREG r0, 0x00617C70;
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CHECKREG r1, 0xCC671F1A;
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CHECKREG r2, 0x0015C084;
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CHECKREG r3, 0x009C09A8;
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CHECKREG r4, 0xFFFDA7C4;
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CHECKREG r5, 0x00970770;
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CHECKREG r6, 0xFFFF9B56;
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CHECKREG r7, 0x005CA88E;
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imm32 r0, 0x00245618;
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imm32 r1, 0x01256719;
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imm32 r2, 0x0226781a;
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imm32 r3, 0x03278912;
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imm32 r4, 0x06489113;
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imm32 r5, 0x05291214;
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imm32 r6, 0x01634517;
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imm32 r7, 0x02234517;
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A1 += R0.L * R1.H, A0 -= R0.L * R1.L;
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R0 = A0.w;
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R1 = A1.w;
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A1 -= R2.L * R3.H, A0 += R2.L * R3.H;
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R2 = A0.w;
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R3 = A1.w;
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A1 -= R4.L * R5.H, A0 -= R4.H * R5.L;
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R4 = A0.w;
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R5 = A1.w;
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A1 += R6.L * R7.H, A0 -= R6.H * R7.H;
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R6 = A0.w;
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R7 = A1.w;
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CHECKREG r0, 0xBAA77AA6;
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CHECKREG r1, 0x0121BB7E;
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CHECKREG r2, 0xBD9CAE92;
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CHECKREG r3, 0xFE2C8792;
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CHECKREG r4, 0xBCB99352;
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CHECKREG r5, 0x02A5517C;
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CHECKREG r6, 0xBCB3A640;
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CHECKREG r7, 0x03CC91C6;
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imm32 r0, 0x10240648;
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imm32 r1, 0x25156749;
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imm32 r2, 0x3526084a;
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imm32 r3, 0x45238942;
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imm32 r4, 0x51381143;
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imm32 r5, 0x62392244;
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imm32 r6, 0xa3333547;
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imm32 r7, 0xc4334547;
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A1 += R0.H * R1.H, A0 -= R0.L * R1.L;
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R0 = A0.w;
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R1 = A1.w;
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A1 -= R2.H * R3.H, A0 -= R2.L * R3.H;
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R2 = A0.w;
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R3 = A1.w;
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A1 -= R4.H * R5.H, A0 += R4.H * R5.L;
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R4 = A0.w;
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R5 = A1.w;
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A1 += R6.H * R7.H, A0 -= R6.H * R7.H;
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R6 = A0.w;
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R7 = A1.w;
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CHECKREG r0, 0xB7A22130;
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CHECKREG r1, 0x08799FAE;
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CHECKREG r2, 0xB327F8F4;
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CHECKREG r3, 0xEBC49B4A;
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CHECKREG r4, 0xC8E5FEB4;
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CHECKREG r5, 0xAD71905A;
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CHECKREG r6, 0x9D8AE062;
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CHECKREG r7, 0xD8CCAEAC;
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imm32 r0, 0x10245628;
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imm32 r1, 0x23056729;
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imm32 r2, 0x3320782a;
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imm32 r3, 0x43270922;
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imm32 r4, 0x56389023;
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imm32 r5, 0x67391024;
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imm32 r6, 0x21334507;
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imm32 r7, 0x11334520;
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A1 += R0.H * R1.L, A0 -= R0.L * R1.L;
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R0 = A0.w;
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R1 = A1.w;
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A1 -= R2.H * R3.L, A0 += R2.L * R3.H;
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R2 = A0.w;
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R3 = A1.w;
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A1 -= R4.H * R5.L, A0 -= R4.H * R5.L;
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R4 = A0.w;
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R5 = A1.w;
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A1 += R6.H * R7.L, A0 -= R6.H * R7.H;
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R6 = A0.w;
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R7 = A1.w;
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CHECKREG r0, 0x581B1792;
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CHECKREG r1, 0xE5CED234;
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CHECKREG r2, 0x9725B05E;
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CHECKREG r3, 0xE228FDB4;
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CHECKREG r4, 0x8C46709E;
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CHECKREG r5, 0xD749BDF4;
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CHECKREG r6, 0x87D0704C;
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CHECKREG r7, 0xE93788B4;
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pass
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