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1007 lines
28 KiB
C
1007 lines
28 KiB
C
/* This file is part of the program psim.
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Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#ifndef _PSIM_C_
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#define _PSIM_C_
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#include "inline.c"
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#include <stdio.h>
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#include <ctype.h>
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#ifdef HAVE_STDLIB_H
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#include <stdlib.h>
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#endif
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#include <setjmp.h>
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#include "cpu.h" /* includes psim.h */
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#include "idecode.h"
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#include "options.h"
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#ifdef HAVE_STRING_H
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#include <string.h>
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#else
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#ifdef HAVE_STRINGS_H
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#include <strings.h>
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#endif
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#endif
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#include "bfd.h"
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/* system structure, actual size of processor array determined at
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runtime */
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struct _psim {
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event_queue *events;
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device *devices;
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mon *monitor;
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os_emul *os_emulation;
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core *memory;
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/* escape routine for inner functions */
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void *path_to_halt;
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void *path_to_restart;
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/* status from last halt */
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psim_status halt_status;
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/* the processors proper */
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int nr_cpus;
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int last_cpu; /* CPU that last (tried to) execute an instruction */
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cpu *processors[MAX_NR_PROCESSORS];
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};
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int current_target_byte_order;
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int current_host_byte_order;
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int current_environment;
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int current_alignment;
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int current_floating_point;
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int current_model_issue = MODEL_ISSUE_IGNORE;
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model_enum current_model = WITH_DEFAULT_MODEL;
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/* create the device tree */
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INLINE_PSIM\
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(device *)
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psim_tree(void)
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{
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device *root = core_device_create();
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device_tree_add_parsed(root, "/aliases");
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device_tree_add_parsed(root, "/options");
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device_tree_add_parsed(root, "/chosen");
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device_tree_add_parsed(root, "/packages");
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device_tree_add_parsed(root, "/cpus");
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device_tree_add_parsed(root, "/openprom");
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device_tree_add_parsed(root, "/openprom/init");
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device_tree_add_parsed(root, "/openprom/trace");
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device_tree_add_parsed(root, "/openprom/options");
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return root;
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}
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STATIC_INLINE_PSIM\
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(char *)
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find_arg(char *err_msg,
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int *ptr_to_argp,
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char **argv)
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{
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*ptr_to_argp += 1;
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if (argv[*ptr_to_argp] == NULL)
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error(err_msg);
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return argv[*ptr_to_argp];
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}
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INLINE_PSIM\
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(void)
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psim_usage(int verbose)
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{
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printf_filtered("Usage:\n");
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printf_filtered("\n");
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printf_filtered("\tpsim [ <psim-option> ... ] <image> [ <image-arg> ... ]\n");
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printf_filtered("\n");
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printf_filtered("Where\n");
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printf_filtered("\n");
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printf_filtered("\t<image> Name of the PowerPC program to run.\n");
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if (verbose) {
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printf_filtered("\t This can either be a PowerPC binary or\n");
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printf_filtered("\t a text file containing a device tree\n");
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printf_filtered("\t specification.\n");
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printf_filtered("\t PSIM will attempt to determine from the\n");
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printf_filtered("\t specified <image> the intended emulation\n");
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printf_filtered("\t environment.\n");
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printf_filtered("\t If PSIM gets it wrong, the emulation\n");
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printf_filtered("\t environment can be specified using the\n");
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printf_filtered("\t `-e' option (described below).\n");
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printf_filtered("\n"); }
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printf_filtered("\t<image-arg> Argument to be passed to <image>\n");
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if (verbose) {
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printf_filtered("\t These arguments will be passed to\n");
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printf_filtered("\t <image> (as standard C argv, argc)\n");
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printf_filtered("\t when <image> is started.\n");
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printf_filtered("\n"); }
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printf_filtered("\t<psim-option> See below\n");
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printf_filtered("\n");
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printf_filtered("The following are valid <psim-option>s:\n");
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printf_filtered("\n");
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printf_filtered("\t-m <model> Specify the processor to model (604)\n");
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if (verbose) {
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printf_filtered("\t Selects the processor to use when\n");
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printf_filtered("\t modeling execution units. Includes:\n");
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printf_filtered("\t 604, 603 and 603e\n");
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printf_filtered("\n"); }
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printf_filtered("\t-e <os-emul> specify an OS or platform to model\n");
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if (verbose) {
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printf_filtered("\t Can be any of the following:\n");
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printf_filtered("\t bug - OEA + MOTO BUG ROM calls\n");
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printf_filtered("\t netbsd - UEA + NetBSD system calls\n");
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printf_filtered("\t chirp - OEA + a few OpenBoot calls\n");
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printf_filtered("\n"); }
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printf_filtered("\t-i Print instruction counting statistics\n");
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if (verbose) { printf_filtered("\n"); }
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printf_filtered("\t-I Print execution unit statistics\n");
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if (verbose) { printf_filtered("\n"); }
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printf_filtered("\t-r <size> Set RAM size in bytes (OEA environments)\n");
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if (verbose) { printf_filtered("\n"); }
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printf_filtered("\t-t [!]<trace> Enable (disable) <trace> option\n");
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if (verbose) { printf_filtered("\n"); }
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printf_filtered("\t-o <spec> add device <spec> to the device tree\n");
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if (verbose) { printf_filtered("\n"); }
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printf_filtered("\t-h -? -H give more detailed usage\n");
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if (verbose) { printf_filtered("\n"); }
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printf_filtered("\n");
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trace_usage(verbose);
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device_usage(verbose);
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if (verbose > 1) {
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printf_filtered("\n");
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print_options();
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}
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error("");
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}
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INLINE_PSIM\
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(char **)
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psim_options(device *root,
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char **argv)
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{
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device *current = root;
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int argp;
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if (argv == NULL)
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return NULL;
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argp = 0;
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while (argv[argp] != NULL && argv[argp][0] == '-') {
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char *p = argv[argp] + 1;
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char *param;
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while (*p != '\0') {
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switch (*p) {
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default:
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psim_usage(0);
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error ("");
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break;
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case 'e':
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param = find_arg("Missing <emul> option for -e\n", &argp, argv);
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device_tree_add_parsed(root, "/openprom/options/os-emul %s", param);
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break;
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case 'h':
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case '?':
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psim_usage(1);
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break;
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case 'H':
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psim_usage(2);
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break;
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case 'i':
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device_tree_add_parsed(root, "/openprom/trace/print-info 1");
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break;
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case 'I':
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device_tree_add_parsed(root, "/openprom/trace/print-info 2");
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device_tree_add_parsed(root, "/openprom/options/model-issue %d",
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MODEL_ISSUE_PROCESS);
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break;
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case 'm':
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param = find_arg("Missing <model> option for -m\n", &argp, argv);
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device_tree_add_parsed(root, "/openprom/options/model \"%s", param);
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break;
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case 'o':
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param = find_arg("Missing <device> option for -o\n", &argp, argv);
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current = device_tree_add_parsed(current, "%s", param);
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break;
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case 'r':
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param = find_arg("Missing <ram-size> option for -r\n", &argp, argv);
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device_tree_add_parsed(root, "/openprom/options/oea-memory-size 0x%lx",
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atol(param));
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break;
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case 't':
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param = find_arg("Missing <trace> option for -t\n", &argp, argv);
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if (param[0] == '!')
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device_tree_add_parsed(root, "/openprom/trace/%s 0", param+1);
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else
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device_tree_add_parsed(root, "/openprom/trace/%s 1", param);
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break;
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}
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p += 1;
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}
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argp += 1;
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}
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/* force the trace node to (re)process its options */
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device_init_data(device_tree_find_device(root, "/openprom/trace"), NULL);
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/* return where the options end */
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return argv + argp;
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}
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/* create the simulator proper from the device tree and executable */
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INLINE_PSIM\
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(psim *)
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psim_create(const char *file_name,
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device *root)
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{
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int cpu_nr;
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const char *env;
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psim *system;
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os_emul *os_emulation;
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int nr_cpus;
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/* given this partially populated device tree, os_emul_create() uses
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it and file_name to determine the selected emulation and hence
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further populate the tree with any other required nodes. */
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os_emulation = os_emul_create(file_name, root);
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if (os_emulation == NULL)
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error("psim: either file %s was not reconized or unreconized or unknown os-emulation type\n", file_name);
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/* fill in the missing real number of CPU's */
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nr_cpus = device_find_integer_property(root, "/openprom/options/smp");
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if (MAX_NR_PROCESSORS < nr_cpus)
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error("target and configured number of cpus conflict\n");
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/* fill in the missing TARGET BYTE ORDER information */
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current_target_byte_order
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= (device_find_boolean_property(root, "/options/little-endian?")
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? LITTLE_ENDIAN
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: BIG_ENDIAN);
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if (CURRENT_TARGET_BYTE_ORDER != current_target_byte_order)
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error("target and configured byte order conflict\n");
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/* fill in the missing HOST BYTE ORDER information */
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current_host_byte_order = (current_host_byte_order = 1,
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(*(char*)(¤t_host_byte_order)
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? LITTLE_ENDIAN
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: BIG_ENDIAN));
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if (CURRENT_HOST_BYTE_ORDER != current_host_byte_order)
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error("host and configured byte order conflict\n");
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/* fill in the missing OEA/VEA information */
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env = device_find_string_property(root, "/openprom/options/env");
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current_environment = ((strcmp(env, "user") == 0
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|| strcmp(env, "uea") == 0)
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? USER_ENVIRONMENT
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: (strcmp(env, "virtual") == 0
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|| strcmp(env, "vea") == 0)
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? VIRTUAL_ENVIRONMENT
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: (strcmp(env, "operating") == 0
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|| strcmp(env, "oea") == 0)
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? OPERATING_ENVIRONMENT
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: 0);
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if (current_environment == 0)
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error("unreconized /options env property\n");
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if (CURRENT_ENVIRONMENT != current_environment)
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error("target and configured environment conflict\n");
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/* fill in the missing ALLIGNMENT information */
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current_alignment
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= (device_find_boolean_property(root, "/openprom/options/strict-alignment?")
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? STRICT_ALIGNMENT
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: NONSTRICT_ALIGNMENT);
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if (CURRENT_ALIGNMENT != current_alignment)
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error("target and configured alignment conflict\n");
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/* fill in the missing FLOATING POINT information */
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current_floating_point
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= (device_find_boolean_property(root, "/openprom/options/floating-point?")
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? HARD_FLOATING_POINT
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: SOFT_FLOATING_POINT);
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if (CURRENT_FLOATING_POINT != current_floating_point)
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error("target and configured floating-point conflict\n");
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/* sort out the level of detail for issue modeling */
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current_model_issue
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= device_find_integer_property(root, "/openprom/options/model-issue");
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if (CURRENT_MODEL_ISSUE != current_model_issue)
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error("target and configured model-issue conflict\n");
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/* sort out our model architecture - wrong.
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FIXME: this should be obtaining the required information from the
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device tree via the "/chosen" property "cpu" which is an instance
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(ihandle) for the only executing processor. By converting that
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ihandle into the corresponding cpu's phandle and then querying
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the "name" property, the cpu type can be determined. Ok? */
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model_set(device_find_string_property(root, "/openprom/options/model"));
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/* create things */
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system = ZALLOC(psim);
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system->events = event_queue_create();
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system->memory = core_create(root);
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system->monitor = mon_create();
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system->nr_cpus = nr_cpus;
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system->os_emulation = os_emulation;
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system->devices = root;
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/* now all the processors attaching to each their per-cpu information */
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for (cpu_nr = 0; cpu_nr < MAX_NR_PROCESSORS; cpu_nr++) {
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system->processors[cpu_nr] = cpu_create(system,
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system->memory,
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system->events,
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mon_cpu(system->monitor,
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cpu_nr),
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system->os_emulation,
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cpu_nr);
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}
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/* dump out the contents of the device tree */
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if (ppc_trace[trace_print_device_tree] || ppc_trace[trace_dump_device_tree])
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device_tree_traverse(root, device_tree_print_device, NULL, NULL);
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if (ppc_trace[trace_dump_device_tree])
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error("");
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return system;
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}
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/* allow the simulation to stop/restart abnormaly */
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STATIC_INLINE_PSIM\
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(void)
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psim_set_halt_and_restart(psim *system,
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void *halt_jmp_buf,
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void *restart_jmp_buf)
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{
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system->path_to_halt = halt_jmp_buf;
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system->path_to_restart = restart_jmp_buf;
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}
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STATIC_INLINE_PSIM\
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(void)
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psim_clear_halt_and_restart(psim *system)
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{
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system->path_to_halt = NULL;
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system->path_to_restart = NULL;
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}
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INLINE_PSIM\
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(void)
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psim_restart(psim *system,
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int current_cpu)
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{
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system->last_cpu = current_cpu;
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longjmp(*(jmp_buf*)(system->path_to_restart), current_cpu + 1);
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}
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INLINE_PSIM\
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(void)
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psim_halt(psim *system,
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int current_cpu,
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unsigned_word cia,
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stop_reason reason,
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int signal)
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{
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system->last_cpu = current_cpu;
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system->halt_status.cpu_nr = current_cpu;
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system->halt_status.reason = reason;
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system->halt_status.signal = signal;
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system->halt_status.program_counter = cia;
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longjmp(*(jmp_buf*)(system->path_to_halt), current_cpu + 1);
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}
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INLINE_PSIM\
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(psim_status)
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psim_get_status(psim *system)
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{
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return system->halt_status;
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}
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INLINE_PSIM\
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(cpu *)
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psim_cpu(psim *system,
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int cpu_nr)
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{
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if (cpu_nr < 0 || cpu_nr >= system->nr_cpus)
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return NULL;
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else
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return system->processors[cpu_nr];
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}
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INLINE_PSIM\
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(device *)
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psim_device(psim *system,
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const char *path)
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{
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return device_tree_find_device(system->devices, path);
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}
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INLINE_PSIM\
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(void)
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psim_init(psim *system)
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{
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int cpu_nr;
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/* scrub the monitor */
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mon_init(system->monitor, system->nr_cpus);
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os_emul_init(system->os_emulation, system->nr_cpus);
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event_queue_init(system->events);
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/* scrub all the cpus */
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for (cpu_nr = 0; cpu_nr < system->nr_cpus; cpu_nr++)
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cpu_init(system->processors[cpu_nr]);
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/* init all the devices (which updates the cpus) */
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device_tree_init(system->devices, system);
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/* now sync each cpu against the initialized state of its registers */
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for (cpu_nr = 0; cpu_nr < system->nr_cpus; cpu_nr++) {
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cpu_synchronize_context(system->processors[cpu_nr]);
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cpu_page_tlb_invalidate_all(system->processors[cpu_nr]);
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}
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/* force loop to restart */
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system->last_cpu = system->nr_cpus - 1;
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}
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INLINE_PSIM\
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(void)
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psim_stack(psim *system,
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char **argv,
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char **envp)
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{
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/* pass the stack device the argv/envp and let it work out what to
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do with it */
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device *stack_device = device_tree_find_device(system->devices,
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"/openprom/init/stack");
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if (stack_device != (device*)0) {
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unsigned_word stack_pointer;
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psim_read_register(system, 0, &stack_pointer, "sp", cooked_transfer);
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device_ioctl(stack_device,
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system,
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NULL, /*cpu*/
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0, /*cia*/
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stack_pointer,
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argv,
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envp);
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}
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}
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/* EXECUTE REAL CODE:
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Unfortunatly, there are multiple cases to consider vis:
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<icache> X <smp> X <events> X <keep-running-flag> X ...
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Consequently this function is written in multiple different ways */
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STATIC_INLINE_PSIM\
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(void)
|
|
run_until_stop(psim *system,
|
|
volatile int *keep_running)
|
|
{
|
|
jmp_buf halt;
|
|
jmp_buf restart;
|
|
#if WITH_IDECODE_CACHE_SIZE
|
|
int cpu_nr;
|
|
for (cpu_nr = 0; cpu_nr < system->nr_cpus; cpu_nr++)
|
|
cpu_flush_icache(system->processors[cpu_nr]);
|
|
#endif
|
|
psim_set_halt_and_restart(system, &halt, &restart);
|
|
|
|
#if (!WITH_IDECODE_CACHE_SIZE && WITH_SMP == 0)
|
|
|
|
/* CASE 1: No instruction cache and no SMP.
|
|
|
|
In this case, we can take advantage of the fact that the current
|
|
instruction address does not need to be returned to the cpu
|
|
object after every execution of an instruction. Instead it only
|
|
needs to be saved when either A. the main loop exits or B. a
|
|
cpu-{halt,restart} call forces the loop to be re-entered. The
|
|
later functions always save the current cpu instruction
|
|
address. */
|
|
|
|
if (!setjmp(halt)) {
|
|
do {
|
|
if (!setjmp(restart)) {
|
|
cpu *const processor = system->processors[0];
|
|
unsigned_word cia = cpu_get_program_counter(processor);
|
|
do {
|
|
if (WITH_EVENTS) {
|
|
if (event_queue_tick(system->events)) {
|
|
cpu_set_program_counter(processor, cia);
|
|
event_queue_process(system->events);
|
|
cia = cpu_get_program_counter(processor);
|
|
}
|
|
}
|
|
{
|
|
instruction_word const instruction
|
|
= vm_instruction_map_read(cpu_instruction_map(processor),
|
|
processor, cia);
|
|
cia = idecode_issue(processor, instruction, cia);
|
|
}
|
|
} while (keep_running == NULL || *keep_running);
|
|
cpu_set_program_counter(processor, cia);
|
|
}
|
|
} while(keep_running == NULL || *keep_running);
|
|
}
|
|
#endif
|
|
|
|
|
|
#if (WITH_IDECODE_CACHE_SIZE && WITH_SMP == 0)
|
|
|
|
/* CASE 2: Instruction case but no SMP
|
|
|
|
Here, the additional complexity comes from there being two
|
|
different cache implementations. A simple function address cache
|
|
or a full cracked instruction cache */
|
|
|
|
if (!setjmp(halt)) {
|
|
do {
|
|
if (!setjmp(restart)) {
|
|
cpu *const processor = system->processors[0];
|
|
unsigned_word cia = cpu_get_program_counter(processor);
|
|
do {
|
|
if (WITH_EVENTS)
|
|
if (event_queue_tick(system->events)) {
|
|
cpu_set_program_counter(processor, cia);
|
|
event_queue_process(system->events);
|
|
cia = cpu_get_program_counter(processor);
|
|
}
|
|
{
|
|
idecode_cache *const cache_entry = cpu_icache_entry(processor,
|
|
cia);
|
|
if (cache_entry->address == cia) {
|
|
idecode_semantic *const semantic = cache_entry->semantic;
|
|
cia = semantic(processor, cache_entry, cia);
|
|
}
|
|
else {
|
|
instruction_word const instruction
|
|
= vm_instruction_map_read(cpu_instruction_map(processor),
|
|
processor,
|
|
cia);
|
|
idecode_semantic *const semantic = idecode(processor,
|
|
instruction,
|
|
cia,
|
|
cache_entry);
|
|
|
|
if (WITH_MON != 0)
|
|
mon_event(mon_event_icache_miss, processor, cia);
|
|
cache_entry->address = cia;
|
|
cache_entry->semantic = semantic;
|
|
cia = semantic(processor, cache_entry, cia);
|
|
}
|
|
}
|
|
} while (keep_running == NULL || *keep_running);
|
|
cpu_set_program_counter(processor, cia);
|
|
}
|
|
} while(keep_running == NULL || *keep_running);
|
|
}
|
|
#endif
|
|
|
|
|
|
#if (!WITH_IDECODE_CACHE_SIZE && WITH_SMP > 0)
|
|
|
|
/* CASE 3: No ICACHE but SMP
|
|
|
|
The complexity here comes from needing to correctly restart the
|
|
system when it is aborted. In particular if cpu0 requests a
|
|
restart, the next cpu is still cpu1. Cpu0 being restarted after
|
|
all the other CPU's and the event queue have been processed */
|
|
|
|
if (!setjmp(halt)) {
|
|
int first_cpu = setjmp(restart);
|
|
if (first_cpu == 0)
|
|
first_cpu = system->last_cpu + 1;
|
|
do {
|
|
int current_cpu;
|
|
for (current_cpu = first_cpu, first_cpu = 0;
|
|
current_cpu < system->nr_cpus + (WITH_EVENTS ? 1 : 0);
|
|
current_cpu++) {
|
|
if (WITH_EVENTS && current_cpu == system->nr_cpus) {
|
|
if (event_queue_tick(system->events))
|
|
event_queue_process(system->events);
|
|
}
|
|
else {
|
|
cpu *const processor = system->processors[current_cpu];
|
|
unsigned_word const cia = cpu_get_program_counter(processor);
|
|
instruction_word instruction =
|
|
vm_instruction_map_read(cpu_instruction_map(processor),
|
|
processor,
|
|
cia);
|
|
cpu_set_program_counter(processor,
|
|
idecode_issue(processor, instruction, cia));
|
|
}
|
|
if (!(keep_running == NULL || *keep_running)) {
|
|
system->last_cpu = current_cpu;
|
|
break;
|
|
}
|
|
}
|
|
} while (keep_running == NULL || *keep_running);
|
|
}
|
|
#endif
|
|
|
|
#if (WITH_IDECODE_CACHE_SIZE && WITH_SMP > 0)
|
|
|
|
/* CASE 4: ICACHE and SMP ...
|
|
|
|
This time, everything goes wrong. Need to restart loops
|
|
correctly, need to save the program counter and finally need to
|
|
keep track of each processors current address! */
|
|
|
|
if (!setjmp(halt)) {
|
|
int first_cpu = setjmp(restart);
|
|
if (!first_cpu)
|
|
first_cpu = system->last_cpu + 1;
|
|
do {
|
|
int current_cpu;
|
|
for (current_cpu = first_cpu, first_cpu = 0;
|
|
current_cpu < system->nr_cpus + (WITH_EVENTS ? 1 : 0);
|
|
current_cpu++) {
|
|
if (WITH_EVENTS && current_cpu == system->nr_cpus) {
|
|
if (event_queue_tick(system->events))
|
|
event_queue_process(system->events);
|
|
}
|
|
else {
|
|
cpu *processor = system->processors[current_cpu];
|
|
unsigned_word const cia = cpu_get_program_counter(processor);
|
|
idecode_cache *cache_entry = cpu_icache_entry(processor, cia);
|
|
if (cache_entry->address == cia) {
|
|
idecode_semantic *semantic = cache_entry->semantic;
|
|
cpu_set_program_counter(processor,
|
|
semantic(processor, cache_entry, cia));
|
|
}
|
|
else {
|
|
instruction_word instruction =
|
|
vm_instruction_map_read(cpu_instruction_map(processor),
|
|
processor,
|
|
cia);
|
|
idecode_semantic *semantic = idecode(processor,
|
|
instruction,
|
|
cia,
|
|
cache_entry);
|
|
|
|
if (WITH_MON != 0)
|
|
mon_event(mon_event_icache_miss, system->processors[current_cpu], cia);
|
|
cache_entry->address = cia;
|
|
cache_entry->semantic = semantic;
|
|
cpu_set_program_counter(processor,
|
|
semantic(processor, cache_entry, cia));
|
|
}
|
|
}
|
|
if (!(keep_running == NULL || *keep_running))
|
|
break;
|
|
}
|
|
} while (keep_running == NULL || *keep_running);
|
|
}
|
|
#endif
|
|
|
|
psim_clear_halt_and_restart(system);
|
|
}
|
|
|
|
|
|
/* SIMULATE INSTRUCTIONS, various different ways of achieving the same
|
|
thing */
|
|
|
|
INLINE_PSIM\
|
|
(void)
|
|
psim_step(psim *system)
|
|
{
|
|
volatile int keep_running = 0;
|
|
run_until_stop(system, &keep_running);
|
|
}
|
|
|
|
INLINE_PSIM\
|
|
(void)
|
|
psim_run(psim *system)
|
|
{
|
|
run_until_stop(system, NULL);
|
|
}
|
|
|
|
INLINE_PSIM\
|
|
(void)
|
|
psim_run_until_stop(psim *system,
|
|
volatile int *keep_running)
|
|
{
|
|
run_until_stop(system, keep_running);
|
|
}
|
|
|
|
|
|
|
|
/* storage manipulation functions */
|
|
|
|
INLINE_PSIM\
|
|
(void)
|
|
psim_read_register(psim *system,
|
|
int which_cpu,
|
|
void *buf,
|
|
const char reg[],
|
|
transfer_mode mode)
|
|
{
|
|
register_descriptions description;
|
|
char cooked_buf[sizeof(unsigned_8)];
|
|
cpu *processor;
|
|
|
|
/* find our processor */
|
|
if (which_cpu == MAX_NR_PROCESSORS)
|
|
which_cpu = system->last_cpu;
|
|
if (which_cpu < 0 || which_cpu >= system->nr_cpus)
|
|
error("psim_read_register() - invalid processor %d\n", which_cpu);
|
|
processor = system->processors[which_cpu];
|
|
|
|
/* find the register description */
|
|
description = register_description(reg);
|
|
if (description.type == reg_invalid)
|
|
error("psim_read_register() invalid register name `%s'\n", reg);
|
|
|
|
/* get the cooked value */
|
|
switch (description.type) {
|
|
|
|
case reg_gpr:
|
|
*(gpreg*)cooked_buf = cpu_registers(processor)->gpr[description.index];
|
|
break;
|
|
|
|
case reg_spr:
|
|
*(spreg*)cooked_buf = cpu_registers(processor)->spr[description.index];
|
|
break;
|
|
|
|
case reg_sr:
|
|
*(sreg*)cooked_buf = cpu_registers(processor)->sr[description.index];
|
|
break;
|
|
|
|
case reg_fpr:
|
|
*(fpreg*)cooked_buf = cpu_registers(processor)->fpr[description.index];
|
|
break;
|
|
|
|
case reg_pc:
|
|
*(unsigned_word*)cooked_buf = cpu_get_program_counter(processor);
|
|
break;
|
|
|
|
case reg_cr:
|
|
*(creg*)cooked_buf = cpu_registers(processor)->cr;
|
|
break;
|
|
|
|
case reg_msr:
|
|
*(msreg*)cooked_buf = cpu_registers(processor)->msr;
|
|
break;
|
|
|
|
default:
|
|
printf_filtered("psim_read_register(processor=0x%lx,buf=0x%lx,reg=%s) %s\n",
|
|
(unsigned long)processor, (unsigned long)buf, reg,
|
|
"read of this register unimplemented");
|
|
break;
|
|
|
|
}
|
|
|
|
/* the PSIM internal values are in host order. To fetch raw data,
|
|
they need to be converted into target order and then returned */
|
|
if (mode == raw_transfer) {
|
|
/* FIXME - assumes that all registers are simple integers */
|
|
switch (description.size) {
|
|
case 1:
|
|
*(unsigned_1*)buf = H2T_1(*(unsigned_1*)cooked_buf);
|
|
break;
|
|
case 2:
|
|
*(unsigned_2*)buf = H2T_2(*(unsigned_2*)cooked_buf);
|
|
break;
|
|
case 4:
|
|
*(unsigned_4*)buf = H2T_4(*(unsigned_4*)cooked_buf);
|
|
break;
|
|
case 8:
|
|
*(unsigned_8*)buf = H2T_8(*(unsigned_8*)cooked_buf);
|
|
break;
|
|
}
|
|
}
|
|
else {
|
|
memcpy(buf/*dest*/, cooked_buf/*src*/, description.size);
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
INLINE_PSIM\
|
|
(void)
|
|
psim_write_register(psim *system,
|
|
int which_cpu,
|
|
const void *buf,
|
|
const char reg[],
|
|
transfer_mode mode)
|
|
{
|
|
cpu *processor;
|
|
register_descriptions description;
|
|
char cooked_buf[sizeof(unsigned_8)];
|
|
|
|
/* find our processor */
|
|
if (which_cpu == MAX_NR_PROCESSORS)
|
|
which_cpu = system->last_cpu;
|
|
if (which_cpu == -1) {
|
|
int i;
|
|
for (i = 0; i < system->nr_cpus; i++)
|
|
psim_write_register(system, i, buf, reg, mode);
|
|
return;
|
|
}
|
|
else if (which_cpu < 0 || which_cpu >= system->nr_cpus) {
|
|
error("psim_read_register() - invalid processor %d\n", which_cpu);
|
|
}
|
|
|
|
processor = system->processors[which_cpu];
|
|
|
|
/* find the description of the register */
|
|
description = register_description(reg);
|
|
if (description.type == reg_invalid)
|
|
error("psim_write_register() invalid register name %s\n", reg);
|
|
|
|
/* If the data is comming in raw (target order), need to cook it
|
|
into host order before putting it into PSIM's internal structures */
|
|
if (mode == raw_transfer) {
|
|
switch (description.size) {
|
|
case 1:
|
|
*(unsigned_1*)cooked_buf = T2H_1(*(unsigned_1*)buf);
|
|
break;
|
|
case 2:
|
|
*(unsigned_2*)cooked_buf = T2H_2(*(unsigned_2*)buf);
|
|
break;
|
|
case 4:
|
|
*(unsigned_4*)cooked_buf = T2H_4(*(unsigned_4*)buf);
|
|
break;
|
|
case 8:
|
|
*(unsigned_8*)cooked_buf = T2H_8(*(unsigned_8*)buf);
|
|
break;
|
|
}
|
|
}
|
|
else {
|
|
memcpy(cooked_buf/*dest*/, buf/*src*/, description.size);
|
|
}
|
|
|
|
/* put the cooked value into the register */
|
|
switch (description.type) {
|
|
|
|
case reg_gpr:
|
|
cpu_registers(processor)->gpr[description.index] = *(gpreg*)cooked_buf;
|
|
break;
|
|
|
|
case reg_fpr:
|
|
cpu_registers(processor)->fpr[description.index] = *(fpreg*)cooked_buf;
|
|
break;
|
|
|
|
case reg_pc:
|
|
cpu_set_program_counter(processor, *(unsigned_word*)cooked_buf);
|
|
break;
|
|
|
|
case reg_spr:
|
|
cpu_registers(processor)->spr[description.index] = *(spreg*)cooked_buf;
|
|
break;
|
|
|
|
case reg_sr:
|
|
cpu_registers(processor)->sr[description.index] = *(sreg*)cooked_buf;
|
|
break;
|
|
|
|
case reg_cr:
|
|
cpu_registers(processor)->cr = *(creg*)cooked_buf;
|
|
break;
|
|
|
|
case reg_msr:
|
|
cpu_registers(processor)->msr = *(msreg*)cooked_buf;
|
|
break;
|
|
|
|
default:
|
|
printf_filtered("psim_write_register(processor=0x%lx,cooked_buf=0x%lx,reg=%s) %s\n",
|
|
(unsigned long)processor, (unsigned long)cooked_buf, reg,
|
|
"read of this register unimplemented");
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
INLINE_PSIM\
|
|
(unsigned)
|
|
psim_read_memory(psim *system,
|
|
int which_cpu,
|
|
void *buffer,
|
|
unsigned_word vaddr,
|
|
unsigned nr_bytes)
|
|
{
|
|
cpu *processor;
|
|
if (which_cpu == MAX_NR_PROCESSORS)
|
|
which_cpu = system->last_cpu;
|
|
if (which_cpu < 0 || which_cpu >= system->nr_cpus)
|
|
error("psim_read_memory() invalid cpu\n");
|
|
processor = system->processors[which_cpu];
|
|
return vm_data_map_read_buffer(cpu_data_map(processor),
|
|
buffer, vaddr, nr_bytes);
|
|
}
|
|
|
|
|
|
INLINE_PSIM\
|
|
(unsigned)
|
|
psim_write_memory(psim *system,
|
|
int which_cpu,
|
|
const void *buffer,
|
|
unsigned_word vaddr,
|
|
unsigned nr_bytes,
|
|
int violate_read_only_section)
|
|
{
|
|
cpu *processor;
|
|
if (which_cpu == MAX_NR_PROCESSORS)
|
|
which_cpu = system->last_cpu;
|
|
if (which_cpu < 0 || which_cpu >= system->nr_cpus)
|
|
error("psim_read_memory() invalid cpu\n");
|
|
processor = system->processors[which_cpu];
|
|
return vm_data_map_write_buffer(cpu_data_map(processor),
|
|
buffer, vaddr, nr_bytes, 1);
|
|
}
|
|
|
|
|
|
INLINE_PSIM\
|
|
(void)
|
|
psim_print_info(psim *system,
|
|
int verbose)
|
|
{
|
|
mon_print_info(system, system->monitor, verbose);
|
|
}
|
|
|
|
|
|
/* Merge a device tree and a device file. */
|
|
|
|
INLINE_PSIM\
|
|
(void)
|
|
psim_merge_device_file(device *root,
|
|
const char *file_name)
|
|
{
|
|
FILE *description = fopen(file_name, "r");
|
|
int line_nr = 0;
|
|
char device_path[1000];
|
|
device *current = root;
|
|
while (fgets(device_path, sizeof(device_path), description)) {
|
|
/* check all of line was read */
|
|
if (strchr(device_path, '\n') == NULL) {
|
|
fclose(description);
|
|
error("create_filed_device_tree() line %d to long: %s\n",
|
|
line_nr, device_path);
|
|
}
|
|
line_nr++;
|
|
/* parse this line */
|
|
current = device_tree_add_parsed(current, "%s", device_path);
|
|
}
|
|
fclose(description);
|
|
}
|
|
|
|
|
|
#endif /* _PSIM_C_ */
|