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2922d21da1
We've decided to standardize on two flags for RISC-V: "-march" sets the target architecture (which determines which instructions can be generated), and "-mabi" sets the target ABI. We needed to rework this because the old flag set didn't support soft-float or single-float ABIs, and didn't support an x32-style ABI on RISC-V. Additionally, we've changed the behavior of the -march flag: it's now a lot stricter and only parses things we can actually understand. Additionally, it's now lowercase-only: the rationale is that while the RISC-V ISA manual specifies that ISA strings are case-insensitive, in Linux-land things are usually case-sensitive. Since this flag can be used to determine library paths, we didn't want to bake some case-insensitivity in there that would case trouble later. This patch implements these two new flags and removes the old flags that could conflict with these. There wasn't a RISC-V release before, so we want to just support a clean flag set. include/ * elf/riscv.h (EF_RISCV_SOFT_FLOAT): Don't define. (EF_RISCV_FLOAT_ABI, EF_RISCV_FLOAT_ABI_SOFT): Define. (EF_RISCV_FLOAT_ABI_SINGLE, EF_RISCV_FLOAT_ABI_DOUBLE): Define. (EF_RISCV_FLOAT_ABI_QUAD): Define. bfd/ * elfnn-riscv.c (_bfd_riscv_elf_merge_private_bfd_data): Use EF_RISCV_FLOAT_ABI_SOFT instead of EF_RISCV_SOFT_FLOAT. binutils/ * readelf.c (get_machine_flags): Use EF_RISCV_FLOAT_ABI_{SOFT,SINGLE,DOBULE,QUAD) instead of EF_RISCV_{SOFT,HARD}_FLOAT. gas/ * config/tc-riscv.h (xlen): Delete. * config/tc-riscv.c (xlen): Make static. (abi_xlen): New variable. (options): Replace OPTION_{M32,M64,MSOFT_FLOAT,MHARD_FLOAT,MRVC} with OPTION_MABI. (md_longopts): Likewise. (md_parse_option): Likewise. (riscv_elf_final_processing): Likewise. * doc/as.texinfo (Target RISC-V options): Likewise. * doc/c-riscv.texi (OPTIONS): Likewise. * config/tc-riscv.c (float_mode): Removed. (float_abi): New type, specifies the floating-point ABI. (riscv_set_abi): New function. (riscv_add_subset): Only allow lower-case ISA names and require them to start with "rv". (riscv_after_parse_args): Likewise. opcodes/ * riscv-dis.c (riscv_disassemble_insn): Default to the ELF's XLEN when none is provided. |
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.. | ||
aarch64.h | ||
alpha.h | ||
arc-reloc.def | ||
arc.h | ||
arm.h | ||
avr.h | ||
bfin.h | ||
ChangeLog-0415 | ||
ChangeLog-9103 | ||
common.h | ||
cr16.h | ||
cr16c.h | ||
cris.h | ||
crx.h | ||
d10v.h | ||
d30v.h | ||
dlx.h | ||
dwarf.h | ||
epiphany.h | ||
external.h | ||
fr30.h | ||
frv.h | ||
ft32.h | ||
h8.h | ||
hppa.h | ||
i370.h | ||
i386.h | ||
i860.h | ||
i960.h | ||
ia64.h | ||
internal.h | ||
ip2k.h | ||
iq2000.h | ||
lm32.h | ||
m32c.h | ||
m32r.h | ||
m68hc11.h | ||
m68k.h | ||
mcore.h | ||
mep.h | ||
metag.h | ||
microblaze.h | ||
mips.h | ||
mmix.h | ||
mn10200.h | ||
mn10300.h | ||
moxie.h | ||
msp430.h | ||
mt.h | ||
nds32.h | ||
nios2.h | ||
or1k.h | ||
pj.h | ||
ppc64.h | ||
ppc.h | ||
reloc-macros.h | ||
riscv.h | ||
rl78.h | ||
rx.h | ||
s390.h | ||
score.h | ||
sh.h | ||
sparc.h | ||
spu.h | ||
tic6x-attrs.h | ||
tic6x.h | ||
tilegx.h | ||
tilepro.h | ||
v850.h | ||
vax.h | ||
visium.h | ||
vxworks.h | ||
x86-64.h | ||
xc16x.h | ||
xgate.h | ||
xstormy16.h | ||
xtensa.h |