Mike Frysinger 4ce3ba0865 sim: testsuite: fix cris badarch in multi-target builds ... This test assumes that /bin/sh will never be a CRIS ELF by way of assuming that the current bfd cannot load it (since a basic cris cross-compiler only understands CRIS ELFs). In a multi-target build though, bfd understands just about every ELF out there, so we're able to read the /bin/sh format before failing at a diff point in the cris code. Let's switch to using / instead since it'll fail for a similar reason (at least similar enough for what this test is testing).		2022-11-04 01:42:41 +07:00
..
aarch64	sim: testsuite: cleanup the istarget * logic	2022-02-16 00:36:47 -05:00
arm	sim: testsuite: cleanup the istarget * logic	2022-02-16 00:36:47 -05:00
avr	sim: testsuite: cleanup the istarget * logic	2022-02-16 00:36:47 -05:00
bfin	sim: testsuite: cleanup the istarget * logic	2022-02-16 00:36:47 -05:00
bpf	sim: testsuite: cleanup the istarget * logic	2022-02-16 00:36:47 -05:00
common	sim: testsuite: migrate to standard uintXX_t types	2022-01-06 01:17:38 -05:00
config	sim: testsuite: rework sim_init usage	2021-11-26 19:48:05 -05:00
cr16	sim: testsuite: cleanup the istarget * logic	2022-02-16 00:36:47 -05:00
cris	sim: testsuite: fix cris badarch in multi-target builds	2022-11-04 01:42:41 +07:00
d10v	sim: testsuite: cleanup the istarget * logic	2022-02-16 00:36:47 -05:00
example-synacor	sim: testsuite: cleanup the istarget * logic	2022-02-16 00:36:47 -05:00
frv	sim: testsuite: cleanup the istarget * logic	2022-02-16 00:36:47 -05:00
ft32	sim: testsuite: cleanup the istarget * logic	2022-02-16 00:36:47 -05:00
h8300	sim: testsuite: cleanup the istarget * logic	2022-02-16 00:36:47 -05:00
iq2000	sim: testsuite: cleanup the istarget * logic	2022-02-16 00:36:47 -05:00
lib	sim/testsuite: Default global_cc_os and global_cc_works properly	2022-02-15 23:35:23 +01:00
lm32	sim: testsuite: cleanup the istarget * logic	2022-02-16 00:36:47 -05:00
m32c	sim: testsuite: cleanup the istarget * logic	2022-02-16 00:36:47 -05:00
m32r	sim: testsuite: cleanup the istarget * logic	2022-02-16 00:36:47 -05:00
m68hc11	sim: testsuite: cleanup the istarget * logic	2022-02-16 00:36:47 -05:00
mcore	sim: testsuite: cleanup the istarget * logic	2022-02-16 00:36:47 -05:00
microblaze	sim: testsuite: cleanup the istarget * logic	2022-02-16 00:36:47 -05:00
mips	sim: mips: Add simulator support for mips32r6/mips64r6	2022-02-04 19:37:26 -05:00
mn10300	sim: testsuite: cleanup the istarget * logic	2022-02-16 00:36:47 -05:00
moxie	sim: testsuite: cleanup the istarget * logic	2022-02-16 00:36:47 -05:00
msp430	sim: testsuite: cleanup the istarget * logic	2022-02-16 00:36:47 -05:00
or1k	sim: testsuite: cleanup the istarget * logic	2022-02-16 00:36:47 -05:00
pru	sim: testsuite: cleanup the istarget * logic	2022-02-16 00:36:47 -05:00
riscv	sim/riscv: fix multiply instructions on simulator	2022-10-11 12:38:36 +01:00
sh	sim: testsuite: cleanup the istarget * logic	2022-02-16 00:36:47 -05:00
v850	Fix for v850e divq instruction	2022-04-06 11:10:40 -04:00
.gitignore
ChangeLog-2021	sim: rename ChangeLog files to ChangeLog-2021	2021-08-17 20:27:36 -04:00
local.mk	sim: testsuite: improve parallel test processing	2022-10-26 14:38:44 +05:45