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The result of running etc/update-copyright.py --this-year, fixing all the files whose mode is changed by the script, plus a build with --enable-maintainer-mode --enable-cgen-maint=yes, then checking out */po/*.pot which we don't update frequently. The copy of cgen was with commit d1dd5fcc38ead reverted as that commit breaks building of bfp opcodes files.
233 lines
5.1 KiB
Plaintext
233 lines
5.1 KiB
Plaintext
@c Copyright (C) 2008-2022 Free Software Foundation, Inc.
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@c This is part of the GAS manual.
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@c For copying conditions, see the file as.texinfo.
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@ifset GENERIC
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@page
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@node LM32-Dependent
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@chapter LM32 Dependent Features
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@end ifset
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@ifclear GENERIC
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@node Machine Dependencies
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@chapter LM32 Dependent Features
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@end ifclear
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@cindex LM32 support
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@menu
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* LM32 Options:: Options
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* LM32 Syntax:: Syntax
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* LM32 Opcodes:: Opcodes
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@end menu
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@node LM32 Options
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@section Options
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@cindex LM32 options (none)
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@cindex options for LM32 (none)
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@table @code
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@cindex @code{-mmultiply-enabled} command-line option, LM32
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@item -mmultiply-enabled
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Enable multiply instructions.
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@cindex @code{-mdivide-enabled} command-line option, LM32
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@item -mdivide-enabled
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Enable divide instructions.
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@cindex @code{-mbarrel-shift-enabled} command-line option, LM32
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@item -mbarrel-shift-enabled
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Enable barrel-shift instructions.
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@cindex @code{-msign-extend-enabled} command-line option, LM32
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@item -msign-extend-enabled
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Enable sign extend instructions.
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@cindex @code{-muser-enabled} command-line option, LM32
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@item -muser-enabled
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Enable user defined instructions.
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@cindex @code{-micache-enabled} command-line option, LM32
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@item -micache-enabled
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Enable instruction cache related CSRs.
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@cindex @code{-mdcache-enabled} command-line option, LM32
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@item -mdcache-enabled
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Enable data cache related CSRs.
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@cindex @code{-mbreak-enabled} command-line option, LM32
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@item -mbreak-enabled
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Enable break instructions.
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@cindex @code{-mall-enabled} command-line option, LM32
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@item -mall-enabled
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Enable all instructions and CSRs.
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@end table
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@node LM32 Syntax
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@section Syntax
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@menu
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* LM32-Regs:: Register Names
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* LM32-Modifiers:: Relocatable Expression Modifiers
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* LM32-Chars:: Special Characters
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@end menu
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@node LM32-Regs
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@subsection Register Names
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@cindex LM32 register names
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@cindex register names, LM32
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LM32 has 32 x 32-bit general purpose registers @samp{r0},
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@samp{r1}, ... @samp{r31}.
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The following aliases are defined: @samp{gp} - @samp{r26},
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@samp{fp} - @samp{r27}, @samp{sp} - @samp{r28},
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@samp{ra} - @samp{r29}, @samp{ea} - @samp{r30},
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@samp{ba} - @samp{r31}.
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LM32 has the following Control and Status Registers (CSRs).
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@table @code
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@item IE
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Interrupt enable.
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@item IM
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Interrupt mask.
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@item IP
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Interrupt pending.
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@item ICC
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Instruction cache control.
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@item DCC
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Data cache control.
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@item CC
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Cycle counter.
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@item CFG
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Configuration.
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@item EBA
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Exception base address.
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@item DC
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Debug control.
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@item DEBA
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Debug exception base address.
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@item JTX
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JTAG transmit.
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@item JRX
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JTAG receive.
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@item BP0
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Breakpoint 0.
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@item BP1
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Breakpoint 1.
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@item BP2
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Breakpoint 2.
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@item BP3
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Breakpoint 3.
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@item WP0
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Watchpoint 0.
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@item WP1
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Watchpoint 1.
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@item WP2
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Watchpoint 2.
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@item WP3
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Watchpoint 3.
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@end table
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@node LM32-Modifiers
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@subsection Relocatable Expression Modifiers
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@cindex LM32 modifiers
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@cindex syntax, LM32
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The assembler supports several modifiers when using relocatable addresses
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in LM32 instruction operands. The general syntax is the following:
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@smallexample
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modifier(relocatable-expression)
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@end smallexample
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@table @code
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@cindex symbol modifiers
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@item lo
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This modifier allows you to use bits 0 through 15 of
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an address expression as 16 bit relocatable expression.
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@item hi
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This modifier allows you to use bits 16 through 23 of an address expression
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as 16 bit relocatable expression.
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For example
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@smallexample
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ori r4, r4, lo(sym+10)
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orhi r4, r4, hi(sym+10)
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@end smallexample
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@item gp
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This modified creates a 16-bit relocatable expression that is
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the offset of the symbol from the global pointer.
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@smallexample
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mva r4, gp(sym)
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@end smallexample
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@item got
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This modifier places a symbol in the GOT and creates a 16-bit
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relocatable expression that is the offset into the GOT of this
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symbol.
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@smallexample
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lw r4, (gp+got(sym))
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@end smallexample
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@item gotofflo16
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This modifier allows you to use the bits 0 through 15 of an
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address which is an offset from the GOT.
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@item gotoffhi16
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This modifier allows you to use the bits 16 through 31 of an
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address which is an offset from the GOT.
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@smallexample
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orhi r4, r4, gotoffhi16(lsym)
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addi r4, r4, gotofflo16(lsym)
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@end smallexample
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@end table
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@node LM32-Chars
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@subsection Special Characters
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@cindex line comment character, LM32
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@cindex LM32 line comment character
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The presence of a @samp{#} on a line indicates the start of a comment
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that extends to the end of the current line. Note that if a line
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starts with a @samp{#} character then it can also be a logical line
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number directive (@pxref{Comments}) or a preprocessor
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control command (@pxref{Preprocessing}).
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@cindex line separator, LM32
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@cindex statement separator, LM32
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@cindex LM32 line separator
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A semicolon (@samp{;}) can be used to separate multiple statements on
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the same line.
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@node LM32 Opcodes
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@section Opcodes
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@cindex LM32 opcode summary
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@cindex opcode summary, LM32
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@cindex mnemonics, LM32
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@cindex instruction summary, LM32
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For detailed information on the LM32 machine instruction set, see
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@url{http://www.latticesemi.com/products/intellectualproperty/ipcores/mico32/}.
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@code{@value{AS}} implements all the standard LM32 opcodes.
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