binutils-gdb/include
Andrew Waterman 858f82bf7e RISC-V: Add physical memory protection CSRs
2017-03-27  Andrew Waterman  <andrew@sifive.com>

       * opcode/riscv-opc.h (CSR_PMPCFG0): New define.
       (CSR_PMPCFG1): Likewise.
       (CSR_PMPCFG2): Likewise.
       (CSR_PMPCFG3): Likewise.
       (CSR_PMPADDR0): Likewise.
       (CSR_PMPADDR1): Likewise.
       (CSR_PMPADDR2): Likewise.
       (CSR_PMPADDR3): Likewise.
       (CSR_PMPADDR4): Likewise.
       (CSR_PMPADDR5): Likewise.
       (CSR_PMPADDR6): Likewise.
       (CSR_PMPADDR7): Likewise.
       (CSR_PMPADDR8): Likewise.
       (CSR_PMPADDR9): Likewise.
       (CSR_PMPADDR10): Likewise.
       (CSR_PMPADDR11): Likewise.
       (CSR_PMPADDR12): Likewise.
       (CSR_PMPADDR13): Likewise.
       (CSR_PMPADDR14): Likewise.
       (CSR_PMPADDR15): Likewise.
       (pmpcfg0): Declare register.
       (pmpcfg1): Likewise.
       (pmpcfg2): Likewise.
       (pmpcfg3): Likewise.
       (pmpaddr0): Likewise.
       (pmpaddr1): Likewise.
       (pmpaddr2): Likewise.
       (pmpaddr3): Likewise.
       (pmpaddr4): Likewise.
       (pmpaddr5): Likewise.
       (pmpaddr6): Likewise.
       (pmpaddr7): Likewise.
       (pmpaddr8): Likewise.
       (pmpaddr9): Likewise.
       (pmpaddr10): Likewise.
       (pmpaddr11): Likewise.
       (pmpaddr12): Likewise.
       (pmpaddr13): Likewise.
       (pmpaddr14): Likewise.
       (pmpaddr15): Likewise.
2017-03-31 09:35:11 -07:00
..
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opcode RISC-V: Add physical memory protection CSRs 2017-03-31 09:35:11 -07:00
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ChangeLog RISC-V: Add physical memory protection CSRs 2017-03-31 09:35:11 -07:00
ChangeLog-0415
ChangeLog-2016 ChangeLog rotation 2017-01-02 13:55:05 +10:30
ChangeLog-9103
COPYING
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