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b67020158a
Mark Shinwell <shinwell@codesourcery.com> gas/ * config/tc-arm.c (operand_parse_code): Add OP_oRRw. (parse_operands): Don't expect comma if first operand missing. Handle OP_oRRw. (do_srs): Encode register number, checking it is r13. Update comment. (insns): Update SRS entries to take a register. gas/testsuite/ * gas/arm/archv6.s: Add new SRS tests. * gas/arm/archv6.d: Update expected output. * gas/arm/thumb32.s: Add new SRS tests. * gas/arm/thumb32.d: Update expected output. * gas/arm/srs-t2.d: New. * gas/arm/srs-t2.l: New. * gas/arm/srs-t2.s: New. * gas/arm/srs-arm.d: New. * gas/arm/srs-arm.l: New. * gas/arm/srs-arm.s: New. opcodes/ * arm-dis.c (arm_opcodes): Print SRS base register.
221 lines
4.3 KiB
ArmAsm
221 lines
4.3 KiB
ArmAsm
.text
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.align 0
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label:
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cps #15
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cpsid if
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cpsie if
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ldrex r2, [r4]
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ldrexne r4, [r8]
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mcrr2 p0, 12, r7, r5, c3
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mrrc2 p0, 12, r7, r5, c3
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pkhbt r2, r5, r8
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pkhbt r2, r5, r8, LSL #3
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pkhbtal r2, r5, r8, LSL #3
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pkhbteq r2, r5, r8, LSL #3
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pkhtb r2, r5, r8 @ Equivalent to pkhbt r2, r8, r5.
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pkhtb r2, r5, r8, ASR #3
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pkhtbal r2, r5, r8, ASR #3
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pkhtbeq r2, r5, r8, ASR #3
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qadd16 r2, r4, r7
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qadd16ne r2, r4, r7
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qadd8 r2, r4, r7
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qadd8ne r2, r4, r7
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qaddsubx r2, r4, r7
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qaddsubxne r2, r4, r7
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qsub16 r2, r4, r7
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qsub16ne r2, r4, r7
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qsub8 r2, r4, r7
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qsub8ne r2, r4, r7
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qsubaddx r2, r4, r7
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qsubaddx r2, r4, r7
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rev r2, r4
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rev16 r2, r4
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rev16ne r3, r5
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revne r3, r5
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revsh r2, r4
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revshne r3, r5
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rfeda r2
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rfedb r2!
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rfeea r2
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rfeed r2!
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rfefa r2!
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rfefd r2
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rfeia r2
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rfeib r2!
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sadd16 r2, r4, r7
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sadd16ne r2, r4, r7
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sxtah r2, r4, r5
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sxtah r2, r4, r5, ROR #8
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sxtahne r2, r4, r5
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sxtahne r2, r4, r5, ROR #8
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sadd8 r2, r4, r7
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sadd8ne r2, r4, r7
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sxtab16 r2, r4, r5
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sxtab16 r2, r4, r5, ROR #8
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sxtab16ne r2, r4, r5
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sxtab16ne r2, r4, r5, ROR #8
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sxtab r2, r4, r5
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sxtab r2, r4, r5, ROR #8
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sxtabne r2, r4, r5
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sxtabne r2, r4, r5, ROR #8
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saddsubx r2, r4, r7
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saddsubxne r2, r4, r7
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sel r1, r2, r3
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selne r1, r2, r3
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setend be
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setend le
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shadd16 r2, r4, r7
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shadd16ne r2, r4, r7
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shadd8 r2, r4, r7
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shadd8ne r2, r4, r7
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shaddsubx r2, r4, r7
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shaddsubxne r2, r4, r7
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shsub16 r2, r4, r7
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shsub16ne r2, r4, r7
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shsub8 r2, r4, r7
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shsub8ne r2, r4, r7
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shsubaddx r2, r4, r7
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shsubaddxne r2, r4, r7
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smlad r1,r2,r3,r4
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smladle r1,r2,r3,r4
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smladx r1,r2,r3,r4
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smladxle r1,r2,r3,r4
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smlald r1,r2,r3,r4
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smlaldle r1,r2,r3,r4
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smlaldx r1,r2,r3,r4
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smlaldxle r1,r2,r3,r4
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smlsd r1,r2,r3,r4
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smlsdle r1,r2,r3,r4
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smlsdx r1,r2,r3,r4
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smlsdxle r1,r2,r3,r4
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smlsld r1,r2,r3,r4
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smlsldle r1,r2,r3,r4
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smlsldx r1,r2,r3,r4
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smlsldxle r1,r2,r3,r4
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smmla r1,r2,r3,r4
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smmlale r1,r2,r3,r4
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smmlar r1,r2,r3,r4
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smmlarle r1,r2,r3,r4
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smmls r1,r2,r3,r4
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smmlsle r1,r2,r3,r4
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smmlsr r1,r2,r3,r4
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smmlsrle r1,r2,r3,r4
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smmul r1,r2,r3
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smmulle r1,r2,r3
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smmulr r1,r2,r3
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smmulrle r1,r2,r3
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smuad r1,r2,r3
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smuadle r1,r2,r3
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smuadx r1,r2,r3
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smuadxle r1,r2,r3
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smusd r1,r2,r3
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smusdle r1,r2,r3
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smusdx r1,r2,r3
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smusdxle r1,r2,r3
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srsia #16
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srsib #16!
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ssat r1, #1, r2
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ssat r1, #1, r2, ASR #2
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ssat r1, #1, r2, LSL #2
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ssat16 r1, #1, r1
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ssat16le r1, #1, r1
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ssub16 r2, r4, r7
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ssub16ne r2, r4, r7
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ssub8 r2, r4, r7
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ssub8ne r2, r4, r7
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ssubaddx r2, r4, r7
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ssubaddxne r2, r4, r7
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strex r1, r2, [r3]
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strexne r1, r2, [r3]
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sxth r2, r5
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sxth r2, r5, ROR #8
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sxthne r2, r5
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sxthne r2, r5, ROR #8
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sxtb16 r2, r5
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sxtb16 r2, r5, ROR #8
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sxtb16ne r2, r5
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sxtb16ne r2, r5, ROR #8
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sxtb r2, r5
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sxtb r2, r5, ROR #8
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sxtbne r2, r5
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sxtbne r2, r5, ROR #8
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uadd16 r2, r4, r7
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uadd16ne r2, r4, r7
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uxtah r2, r3, r5
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uxtah r2, r3, r5, ROR #8
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uxtahne r2, r3, r5
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uxtahne r2, r3, r5, ROR #8
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uadd8 r2, r4, r7
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uadd8ne r2, r4, r7
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uxtab16 r2, r3, r5
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uxtab16 r2, r3, r5, ROR #8
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uxtab16ne r2, r3, r5
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uxtab16ne r2, r3, r5, ROR #8
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uxtab r2, r3, r5
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uxtab r2, r3, r5, ROR #8
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uxtabne r2, r3, r5
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uxtabne r2, r3, r5, ROR #8
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uaddsubx r2, r4, r7
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uaddsubxne r2, r4, r7
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uhadd16 r2, r4, r7
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uhadd16ne r2, r4, r7
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uhadd8 r2, r4, r7
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uhadd8ne r2, r4, r7
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uhaddsubx r2, r4, r7
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uhaddsubxne r2, r4, r7
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uhsub16 r2, r4, r7
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uhsub16ne r2, r4, r7
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uhsub8 r2, r4, r7
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uhsub8ne r2, r4, r7
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uhsubaddx r2, r4, r7
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uhsubaddxne r2, r4, r7
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umaal r1, r2, r3, r4
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umaalle r1, r2, r3, r4
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uqadd16 r2, r4, r7
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uqadd16ne r2, r4, r7
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uqadd8 r2, r4, r7
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uqadd8ne r2, r4, r7
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uqaddsubx r2, r4, r7
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uqaddsubxne r2, r4, r7
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uqsub16 r2, r4, r7
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uqsub16ne r2, r4, r7
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uqsub8 r2, r4, r7
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uqsub8ne r2, r4, r7
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uqsubaddx r2, r4, r7
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uqsubaddxne r2, r4, r7
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usad8 r1, r2, r3
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usad8ne r1, r2, r3
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usada8 r1, r2, r3, r4
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usada8ne r1, r2, r3, r4
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usat r1, #15, r2
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usat r1, #15, r2, ASR #4
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usat r1, #15, r2, LSL #4
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usat16 r1, #15, r2
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usat16le r1, #15, r2
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usatle r1, #15, r2
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usatle r1, #15, r2, ASR #4
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usatle r1, #15, r2, LSL #4
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usub16 r2, r4, r7
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usub16ne r2, r4, r7
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usub8 r2, r4, r7
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usub8ne r2, r4, r7
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usubaddx r2, r4, r7
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usubaddxne r2, r4, r7
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uxth r2, r5
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uxth r2, r5, ROR #8
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uxthne r2, r5
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uxthne r2, r5, ROR #8
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uxtb16 r2, r5
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uxtb16 r2, r5, ROR #8
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uxtb16ne r2, r5
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uxtb16ne r2, r5, ROR #8
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uxtb r2, r5
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uxtb r2, r5, ROR #8
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uxtbne r2, r5
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uxtbne r2, r5, ROR #8
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cpsie if, #10
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cpsie if, #21
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srsia sp, #16
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srsib sp!, #16
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