binutils-gdb/sim/aarch64
Jim Wilson bf1554384b Fix ldn/stn multiple instructions. Fix testcases with unaligned data.
sim/aarch64/
	* simulator.c (vec_load): Add M argument.  Rewrite to iterate over
	registers based on structure size.
	(LD4, LD3, LD2, LD1_2, LD1_3, LD1_4): Pass new arg to vec_load.
	(LD1_1): Replace with call to vec_load.
	(vec_store): Add new M argument.  Rewrite to iterate over registers
	based on structure size.
	(ST4, ST3, ST2, ST1_2, ST1_3, ST1_4): Pass new arg to vec_store.
	(ST1_1): Replace with call to vec_store.

	sim/testsuite/sim/aarch64/
	* fcvtz.s, fstur.s, ldn_single.s, ldnr.s, mla.s, mls.s, uzp.s: Align
	data.
	* sumulh.s: Delete unnecessary data alignment.
	* stn_single.s: Align data.  Fix unaligned ldr insns.  Adjust cmp
	arguments to match change.
	* ldn_multiple.s, stn_multiple.s: New.
2017-04-22 16:36:01 -07:00
..
aclocal.m4
ChangeLog Fix ldn/stn multiple instructions. Fix testcases with unaligned data. 2017-04-22 16:36:01 -07:00
config.in
configure
configure.ac
cpustate.c
cpustate.h
decode.h
interp.c
Makefile.in
memory.c
memory.h
sim-main.h
simulator.c Fix ldn/stn multiple instructions. Fix testcases with unaligned data. 2017-04-22 16:36:01 -07:00
simulator.h