mirror of
https://sourceware.org/git/binutils-gdb.git
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06c441ccef
2022-02-01 Ali Lown <ali.lown@imgtec.com> Andrew Bennett <andrew.bennett@imgtec.com> Dragan Mladjenovic <dragan.mladjenovic@rt-rk.com> Faraz Shahbazker <fshahbazker@wavecomp.com> sim/common/ChangeLog: * sim-bits.h (EXTEND9, EXTEND18 ,EXTEND19, EXTEND21, EXTEND26): New macros. sim/mips/ChangeLog: * Makefile.in (IGEN_INCLUDE): Add mips3264r6.igen. * configure: Regenerate. * configure.ac: Support mipsisa32r6 and mipsisa64r6. (sim_engine_run): Pick simulator model from processor specified in e_flags. * cp1.c (value_fpr): Handle fmt_dc32. (fp_unary, fp_binary): Zero initialize locals. (update_fcsr, fp_classify, fp_rint, fp_r6_cmp, inner_fmac, fp_fmac, fp_min, fp_max, fp_mina, fp_maxa, fp_fmadd, fp_fmsub): New functions. (sim_fpu_class_mips_mapping): New. * cp1.h (fcsr_ABS2008_mask, fcsr_ABS2008_shift): New define. * interp.c (MIPSR6_P): New. (load_word): Allow unaligned memory access for MIPSR6. * micromips.igen (sc, scd): Adapt to new do_sc* helper signature. * mips.igen: Add *r6 models. (signal_if_cti, forbiddenslot32): New helpers. (delayslot32): Use signal_if_cti. (do_sc, do_scd); Add store_ll_bit parameter. (sc, scd): Adapt to previous change. (nal, beq, bal): New definitions for *r6. (sll): Split nop and ssnop cases into ... (nop, ssnop): New definitions. (loadstore_ea): Use the 32-bit compatibility adressing. (cache): Split logic into ... (do_cache): New helper. (check_fpu): Select IEEE 754-2008 mode for R6. (not_word_value, unpredictable, check_mt_hilo, check_mf_hilo, check_multi_hilo, check_div_hilo, check_u64, do_dmfc1b, add, li, addu, and, andi, bgez, bgtz, blez, bltz, bne, break, dadd, daddiu, daddu, dror, dror32, drorv, dsll, dsll32, dsllv, dsra, dsra32, dsrav, dsrl, dsrl32, dsub, dsubu, j, jal, jalr, jalr.hb, lb, lbu, ld, lh, lhu, lui, lw, lwu, nor, or, ori, ror, rorv, sb, sd, sh, sll, sllv, slt, slti, sltiu, sltu, sra, srav, srl, srlv, sub, subu, sw, sync, syscall, teq, tge, tgeu, tlt, tltu, tne, xor, xori, check_fmt_p, do_load_double, do_store_double, abs.FMT, add.FMT, ceil.l.FMT, ceil.w.FMT, cfc1, ctc1, cvt.d.FMT, cvt.l.FMT, cvt.w.FMT, div.FMT, dfmc1, dmtc1, floor.l.FMT, floor.w.FMT, ldc1, lwc1, mfc1, mov.FMT, mtc1, mul.FMT, recip.FMT, round.l.FMT, round.w.FMT, rsqrt.FMT, sdc1, sqrt.FMT, sub.FMT, swc1, trunc.l.FMT, trunc.w.FMT, bc0f, bc0fl, bc0t, bc0tl, dmfc0, dmtc0, eret, mfc0, mtc0, cop, tlbp, tlbr, tlbwi, tlbwr): Enable on *r6 models. * mips3264r2.igen (dext, dextm, dextu, di, dins, dinsm, dinsu, dsbh, dshd, ei, ext, mfhc1, mthc1, ins, seb, seh, synci, rdhwr, wsbh): Likewise. * mips3264r6.igen: New file. * sim-main.h (FP_formats): Add fmt_dc32. (FORBIDDEN_SLOT): New macros. (simFORBIDDENSLOT, FP_R6CMP_*, FP_R6CLASS_*): New defines. (fp_r6_cmp, fp_classify, fp_rint, fp_min, fp_max, fp_mina, fp_maxa, fp_fmadd, fp_fmsub): New declarations. (R6Compare, Classify, RoundToIntegralExact, Min, Max, MinA, MaxA, FusedMultiplyAdd, FusedMultiplySub): New macros. Wrapping previous declarations. sim/testsuite/mips/ChangeLog: * basic.exp: Add r6-*.s tests. (run_r6_removed_test): New function. (run_endian_tests): New function. * hilo-hazard-3.s: Skip for mips*r6. * r2-fpu.s: New test. * r6-64.s: New test. * r6-branch.s: New test. * r6-forbidden.s: New test. * r6-fpu.s: New test. * r6-llsc-dp.s: New test. * r6-llsc-wp.s: New test. * r6-removed.csv: New test. * r6-removed.s: New test. * r6.s: New test. * utils-r6.inc: New inc.
608 lines
19 KiB
C
608 lines
19 KiB
C
/* The common simulator framework for GDB, the GNU Debugger.
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Copyright 2002-2022 Free Software Foundation, Inc.
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Contributed by Andrew Cagney and Red Hat.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#ifndef SIM_BITS_H
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#define SIM_BITS_H
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/* Bit manipulation routines:
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Bit numbering: The bits are numbered according to the target ISA's
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convention. That being controlled by WITH_TARGET_WORD_MSB. For
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the PowerPC (WITH_TARGET_WORD_MSB == 0) the numbering is 0..31
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while for the MIPS (WITH_TARGET_WORD_MSB == 31) it is 31..0.
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Size convention: Each macro is in three forms - <MACRO>32 which
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operates in 32bit quantity (bits are numbered 0..31); <MACRO>64
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which operates using 64bit quantites (and bits are numbered 0..63);
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and <MACRO> which operates using the bit size of the target
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architecture (bits are still numbered 0..63), with 32bit
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architectures ignoring the first 32bits leaving bit 32 as the most
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significant.
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NB: Use EXTRACTED, MSEXTRACTED and LSEXTRACTED as a guideline for
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naming. LSMASK and LSMASKED are wrong.
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BIT*(POS): `*' bit constant with just 1 bit set.
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LSBIT*(OFFSET): `*' bit constant with just 1 bit set - LS bit is
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zero.
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MSBIT*(OFFSET): `*' bit constant with just 1 bit set - MS bit is
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zero.
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MASK*(FIRST, LAST): `*' bit constant with bits [FIRST .. LAST]
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set. The <MACRO> (no size) version permits FIRST >= LAST and
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generates a wrapped bit mask vis ([0..LAST] | [FIRST..LSB]).
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LSMASK*(FIRST, LAST): Like MASK - LS bit is zero.
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MSMASK*(FIRST, LAST): Like MASK - LS bit is zero.
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MASKED*(VALUE, FIRST, LAST): Masks out all but bits [FIRST
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.. LAST].
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LSMASKED*(VALUE, FIRST, LAST): Like MASKED - LS bit is zero.
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MSMASKED*(VALUE, FIRST, LAST): Like MASKED - MS bit is zero.
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EXTRACTED*(VALUE, FIRST, LAST): Masks out bits [FIRST .. LAST] but
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also right shifts the masked value so that bit LAST becomes the
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least significant (right most).
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LSEXTRACTED*(VALUE, FIRST, LAST): Same as extracted - LS bit is
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zero.
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MSEXTRACTED*(VALUE, FIRST, LAST): Same as extracted - MS bit is
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zero.
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SHUFFLED**(VALUE, OLD, NEW): Mask then move a single bit from OLD
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new NEW.
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MOVED**(VALUE, OLD_FIRST, OLD_LAST, NEW_FIRST, NEW_LAST): Moves
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things around so that bits OLD_FIRST..OLD_LAST are masked then
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moved to NEW_FIRST..NEW_LAST.
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INSERTED*(VALUE, FIRST, LAST): Takes VALUE and `inserts' the (LAST
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- FIRST + 1) least significant bits into bit positions [ FIRST
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.. LAST ]. This is almost the complement to EXTRACTED.
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IEA_MASKED(SHOULD_MASK, ADDR): Convert the address to the targets
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natural size. If in 32bit mode, discard the high 32bits.
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EXTEND*(VALUE): Convert the `*' bit value to the targets natural
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word size. Sign extend the value if needed.
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align_*(VALUE, BYTES): Round the value so that it is aligned to a
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BYTES boundary.
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ROT*(VALUE, NR_BITS): Return the `*' bit VALUE rotated by NR_BITS
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right (positive) or left (negative).
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ROTL*(VALUE, NR_BITS): Return the `*' bit value rotated by NR_BITS
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left. 0 <= NR_BITS <= `*'.
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ROTR*(VALUE, NR_BITS): Return the `*' bit value rotated by NR_BITS
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right. 0 <= NR_BITS <= N.
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SEXT*(VALUE, SIGN_BIT): Treat SIGN_BIT as VALUEs sign, extend it ti
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`*' bits.
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Note: Only the BIT* and MASK* macros return a constant that can be
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used in variable declarations.
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*/
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/* compute the number of bits between START and STOP */
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#if (WITH_TARGET_WORD_MSB == 0)
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#define _MAKE_WIDTH(START, STOP) (STOP - START + 1)
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#else
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#define _MAKE_WIDTH(START, STOP) (START - STOP + 1)
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#endif
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/* compute the number shifts required to move a bit between LSB (MSB)
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and POS */
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#if (WITH_TARGET_WORD_MSB == 0)
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#define _LSB_SHIFT(WIDTH, POS) (WIDTH - 1 - POS)
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#else
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#define _LSB_SHIFT(WIDTH, POS) (POS)
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#endif
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#if (WITH_TARGET_WORD_MSB == 0)
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#define _MSB_SHIFT(WIDTH, POS) (POS)
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#else
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#define _MSB_SHIFT(WIDTH, POS) (WIDTH - 1 - POS)
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#endif
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/* compute the absolute bit position given the OFFSET from the MSB(LSB)
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NB: _MAKE_xxx_POS (WIDTH, _MAKE_xxx_SHIFT (WIDTH, POS)) == POS */
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#if (WITH_TARGET_WORD_MSB == 0)
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#define _MSB_POS(WIDTH, SHIFT) (SHIFT)
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#else
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#define _MSB_POS(WIDTH, SHIFT) (WIDTH - 1 - SHIFT)
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#endif
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#if (WITH_TARGET_WORD_MSB == 0)
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#define _LSB_POS(WIDTH, SHIFT) (WIDTH - 1 - SHIFT)
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#else
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#define _LSB_POS(WIDTH, SHIFT) (SHIFT)
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#endif
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/* convert a 64 bit position into a corresponding 32bit position. MSB
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pos handles the posibility that the bit lies beyond the 32bit
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boundary */
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#if (WITH_TARGET_WORD_MSB == 0)
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#define _MSB_32(START, STOP) (START <= STOP \
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? (START < 32 ? 0 : START - 32) \
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: (STOP < 32 ? 0 : STOP - 32))
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#define _MSB_16(START, STOP) (START <= STOP \
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? (START < 48 ? 0 : START - 48) \
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: (STOP < 48 ? 0 : STOP - 48))
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#else
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#define _MSB_32(START, STOP) (START >= STOP \
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? (START >= 32 ? 31 : START) \
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: (STOP >= 32 ? 31 : STOP))
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#define _MSB_16(START, STOP) (START >= STOP \
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? (START >= 16 ? 15 : START) \
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: (STOP >= 16 ? 15 : STOP))
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#endif
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#if (WITH_TARGET_WORD_MSB == 0)
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#define _LSB_32(START, STOP) (START <= STOP \
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? (STOP < 32 ? 0 : STOP - 32) \
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: (START < 32 ? 0 : START - 32))
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#define _LSB_16(START, STOP) (START <= STOP \
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? (STOP < 48 ? 0 : STOP - 48) \
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: (START < 48 ? 0 : START - 48))
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#else
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#define _LSB_32(START, STOP) (START >= STOP \
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? (STOP >= 32 ? 31 : STOP) \
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: (START >= 32 ? 31 : START))
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#define _LSB_16(START, STOP) (START >= STOP \
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? (STOP >= 16 ? 15 : STOP) \
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: (START >= 16 ? 15 : START))
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#endif
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#if (WITH_TARGET_WORD_MSB == 0)
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#define _MSB(START, STOP) (START <= STOP ? START : STOP)
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#else
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#define _MSB(START, STOP) (START >= STOP ? START : STOP)
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#endif
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#if (WITH_TARGET_WORD_MSB == 0)
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#define _LSB(START, STOP) (START <= STOP ? STOP : START)
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#else
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#define _LSB(START, STOP) (START >= STOP ? STOP : START)
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#endif
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/* LS/MS Bit operations */
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#define LSBIT8(POS) ((uint8_t) 1 << (POS))
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#define LSBIT16(POS) ((uint16_t)1 << (POS))
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#define LSBIT32(POS) ((uint32_t)1 << (POS))
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#define LSBIT64(POS) ((uint64_t)1 << (POS))
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#if (WITH_TARGET_WORD_BITSIZE == 64)
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#define LSBIT(POS) LSBIT64 (POS)
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#endif
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#if (WITH_TARGET_WORD_BITSIZE == 32)
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#define LSBIT(POS) ((uint32_t)((POS) >= 32 \
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? 0 \
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: (1 << ((POS) >= 32 ? 0 : (POS)))))
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#endif
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#if (WITH_TARGET_WORD_BITSIZE == 16)
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#define LSBIT(POS) ((uint16_t)((POS) >= 16 \
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? 0 \
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: (1 << ((POS) >= 16 ? 0 : (POS)))))
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#endif
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#define MSBIT8(POS) ((uint8_t) 1 << ( 8 - 1 - (POS)))
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#define MSBIT16(POS) ((uint16_t)1 << (16 - 1 - (POS)))
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#define MSBIT32(POS) ((uint32_t)1 << (32 - 1 - (POS)))
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#define MSBIT64(POS) ((uint64_t)1 << (64 - 1 - (POS)))
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#if (WITH_TARGET_WORD_BITSIZE == 64)
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#define MSBIT(POS) MSBIT64 (POS)
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#endif
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#if (WITH_TARGET_WORD_BITSIZE == 32)
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#define MSBIT(POS) ((uint32_t)((POS) < 32 \
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? 0 \
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: (1 << ((POS) < 32 ? 0 : (64 - 1) - (POS)))))
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#endif
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#if (WITH_TARGET_WORD_BITSIZE == 16)
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#define MSBIT(POS) ((uint16_t)((POS) < 48 \
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? 0 \
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: (1 << ((POS) < 48 ? 0 : (64 - 1) - (POS)))))
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#endif
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/* Bit operations */
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#define BIT4(POS) (1 << _LSB_SHIFT (4, (POS)))
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#define BIT5(POS) (1 << _LSB_SHIFT (5, (POS)))
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#define BIT10(POS) (1 << _LSB_SHIFT (10, (POS)))
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#if (WITH_TARGET_WORD_MSB == 0)
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#define BIT8 MSBIT8
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#define BIT16 MSBIT16
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#define BIT32 MSBIT32
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#define BIT64 MSBIT64
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#define BIT MSBIT
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#else
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#define BIT8 LSBIT8
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#define BIT16 LSBIT16
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#define BIT32 LSBIT32
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#define BIT64 LSBIT64
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#define BIT LSBIT
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#endif
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/* multi bit mask */
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/* 111111 -> mmll11 -> mm11ll */
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#define _MASKn(WIDTH, START, STOP) (((uint##WIDTH##_t)(-1) \
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>> (_MSB_SHIFT (WIDTH, START) \
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+ _LSB_SHIFT (WIDTH, STOP))) \
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<< _LSB_SHIFT (WIDTH, STOP))
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#if (WITH_TARGET_WORD_MSB == 0)
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#define _POS_LE(START, STOP) (START <= STOP)
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#else
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#define _POS_LE(START, STOP) (STOP <= START)
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#endif
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#if (WITH_TARGET_WORD_BITSIZE == 64)
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#define MASK(START, STOP) \
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(_POS_LE ((START), (STOP)) \
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? _MASKn(64, \
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_MSB ((START), (STOP)), \
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_LSB ((START), (STOP)) ) \
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: (_MASKn(64, _MSB_POS (64, 0), (STOP)) \
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| _MASKn(64, (START), _LSB_POS (64, 0))))
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#endif
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#if (WITH_TARGET_WORD_BITSIZE == 32)
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#define MASK(START, STOP) \
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(_POS_LE ((START), (STOP)) \
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? (_POS_LE ((STOP), _MSB_POS (64, 31)) \
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? 0 \
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: _MASKn (32, \
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_MSB_32 ((START), (STOP)), \
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_LSB_32 ((START), (STOP)))) \
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: (_MASKn (32, \
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_LSB_32 ((START), (STOP)), \
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_LSB_POS (32, 0)) \
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| (_POS_LE ((STOP), _MSB_POS (64, 31)) \
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? 0 \
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: _MASKn (32, \
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_MSB_POS (32, 0), \
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_MSB_32 ((START), (STOP))))))
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#endif
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#if (WITH_TARGET_WORD_BITSIZE == 16)
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#define MASK(START, STOP) \
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(_POS_LE ((START), (STOP)) \
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? (_POS_LE ((STOP), _MSB_POS (64, 15)) \
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? 0 \
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: _MASKn (16, \
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_MSB_16 ((START), (STOP)), \
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_LSB_16 ((START), (STOP)))) \
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: (_MASKn (16, \
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_LSB_16 ((START), (STOP)), \
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_LSB_POS (16, 0)) \
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| (_POS_LE ((STOP), _MSB_POS (64, 15)) \
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? 0 \
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: _MASKn (16, \
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_MSB_POS (16, 0), \
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_MSB_16 ((START), (STOP))))))
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#endif
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#if !defined (MASK)
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#error "MASK never undefined"
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#endif
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/* Multi-bit mask on least significant bits */
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#define _LSMASKn(WIDTH, FIRST, LAST) _MASKn (WIDTH, \
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_LSB_POS (WIDTH, FIRST), \
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_LSB_POS (WIDTH, LAST))
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#define LSMASK8(FIRST, LAST) _LSMASKn ( 8, (FIRST), (LAST))
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#define LSMASK16(FIRST, LAST) _LSMASKn (16, (FIRST), (LAST))
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#define LSMASK32(FIRST, LAST) _LSMASKn (32, (FIRST), (LAST))
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#define LSMASK64(FIRST, LAST) _LSMASKn (64, (FIRST), (LAST))
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#define LSMASK(FIRST, LAST) (MASK (_LSB_POS (64, FIRST), _LSB_POS (64, LAST)))
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/* Multi-bit mask on most significant bits */
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#define _MSMASKn(WIDTH, FIRST, LAST) _MASKn (WIDTH, \
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_MSB_POS (WIDTH, FIRST), \
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_MSB_POS (WIDTH, LAST))
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#define MSMASK8(FIRST, LAST) _MSMASKn ( 8, (FIRST), (LAST))
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#define MSMASK16(FIRST, LAST) _MSMASKn (16, (FIRST), (LAST))
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#define MSMASK32(FIRST, LAST) _MSMASKn (32, (FIRST), (LAST))
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#define MSMASK64(FIRST, LAST) _MSMASKn (64, (FIRST), (LAST))
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#define MSMASK(FIRST, LAST) (MASK (_MSB_POS (64, FIRST), _MSB_POS (64, LAST)))
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#if (WITH_TARGET_WORD_MSB == 0)
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#define MASK8 MSMASK8
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#define MASK16 MSMASK16
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#define MASK32 MSMASK32
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#define MASK64 MSMASK64
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#else
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#define MASK8 LSMASK8
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#define MASK16 LSMASK16
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#define MASK32 LSMASK32
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#define MASK64 LSMASK64
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#endif
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/* mask the required bits, leaving them in place */
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INLINE_SIM_BITS(uint8_t) LSMASKED8 (uint8_t word, int first, int last);
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INLINE_SIM_BITS(uint16_t) LSMASKED16 (uint16_t word, int first, int last);
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INLINE_SIM_BITS(uint32_t) LSMASKED32 (uint32_t word, int first, int last);
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INLINE_SIM_BITS(uint64_t) LSMASKED64 (uint64_t word, int first, int last);
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INLINE_SIM_BITS(unsigned_word) LSMASKED (unsigned_word word, int first, int last);
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INLINE_SIM_BITS(uint8_t) MSMASKED8 (uint8_t word, int first, int last);
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INLINE_SIM_BITS(uint16_t) MSMASKED16 (uint16_t word, int first, int last);
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INLINE_SIM_BITS(uint32_t) MSMASKED32 (uint32_t word, int first, int last);
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INLINE_SIM_BITS(uint64_t) MSMASKED64 (uint64_t word, int first, int last);
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INLINE_SIM_BITS(unsigned_word) MSMASKED (unsigned_word word, int first, int last);
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#if (WITH_TARGET_WORD_MSB == 0)
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#define MASKED8 MSMASKED8
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#define MASKED16 MSMASKED16
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#define MASKED32 MSMASKED32
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#define MASKED64 MSMASKED64
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#define MASKED MSMASKED
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#else
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#define MASKED8 LSMASKED8
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#define MASKED16 LSMASKED16
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#define MASKED32 LSMASKED32
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#define MASKED64 LSMASKED64
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#define MASKED LSMASKED
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#endif
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/* extract the required bits aligning them with the lsb */
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INLINE_SIM_BITS(uint8_t) LSEXTRACTED8 (uint8_t val, int start, int stop);
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INLINE_SIM_BITS(uint16_t) LSEXTRACTED16 (uint16_t val, int start, int stop);
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INLINE_SIM_BITS(uint32_t) LSEXTRACTED32 (uint32_t val, int start, int stop);
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INLINE_SIM_BITS(uint64_t) LSEXTRACTED64 (uint64_t val, int start, int stop);
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INLINE_SIM_BITS(unsigned_word) LSEXTRACTED (unsigned_word val, int start, int stop);
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INLINE_SIM_BITS(uint8_t) MSEXTRACTED8 (uint8_t val, int start, int stop);
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INLINE_SIM_BITS(uint16_t) MSEXTRACTED16 (uint16_t val, int start, int stop);
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INLINE_SIM_BITS(uint32_t) MSEXTRACTED32 (uint32_t val, int start, int stop);
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INLINE_SIM_BITS(uint64_t) MSEXTRACTED64 (uint64_t val, int start, int stop);
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INLINE_SIM_BITS(unsigned_word) MSEXTRACTED (unsigned_word val, int start, int stop);
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#if (WITH_TARGET_WORD_MSB == 0)
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#define EXTRACTED8 MSEXTRACTED8
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#define EXTRACTED16 MSEXTRACTED16
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#define EXTRACTED32 MSEXTRACTED32
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#define EXTRACTED64 MSEXTRACTED64
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#define EXTRACTED MSEXTRACTED
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#else
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#define EXTRACTED8 LSEXTRACTED8
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#define EXTRACTED16 LSEXTRACTED16
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#define EXTRACTED32 LSEXTRACTED32
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#define EXTRACTED64 LSEXTRACTED64
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#define EXTRACTED LSEXTRACTED
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#endif
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/* move a single bit around */
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/* NB: the wierdness (N>O?N-O:0) is to stop a warning from GCC */
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#define _SHUFFLEDn(N, WORD, OLD, NEW) \
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((OLD) < (NEW) \
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? (((uint##N##_t)(WORD) \
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>> (((NEW) > (OLD)) ? ((NEW) - (OLD)) : 0)) \
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& MASK32((NEW), (NEW))) \
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: (((uint##N##_t)(WORD) \
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<< (((OLD) > (NEW)) ? ((OLD) - (NEW)) : 0)) \
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& MASK32((NEW), (NEW))))
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#define SHUFFLED32(WORD, OLD, NEW) _SHUFFLEDn (32, WORD, OLD, NEW)
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#define SHUFFLED64(WORD, OLD, NEW) _SHUFFLEDn (64, WORD, OLD, NEW)
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#define SHUFFLED(WORD, OLD, NEW) _SHUFFLEDn (_word, WORD, OLD, NEW)
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/* Insert a group of bits into a bit position */
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INLINE_SIM_BITS(uint8_t) LSINSERTED8 (uint8_t val, int start, int stop);
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INLINE_SIM_BITS(uint16_t) LSINSERTED16 (uint16_t val, int start, int stop);
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INLINE_SIM_BITS(uint32_t) LSINSERTED32 (uint32_t val, int start, int stop);
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INLINE_SIM_BITS(uint64_t) LSINSERTED64 (uint64_t val, int start, int stop);
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INLINE_SIM_BITS(unsigned_word) LSINSERTED (unsigned_word val, int start, int stop);
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INLINE_SIM_BITS(uint8_t) MSINSERTED8 (uint8_t val, int start, int stop);
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INLINE_SIM_BITS(uint16_t) MSINSERTED16 (uint16_t val, int start, int stop);
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INLINE_SIM_BITS(uint32_t) MSINSERTED32 (uint32_t val, int start, int stop);
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INLINE_SIM_BITS(uint64_t) MSINSERTED64 (uint64_t val, int start, int stop);
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INLINE_SIM_BITS(unsigned_word) MSINSERTED (unsigned_word val, int start, int stop);
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#if (WITH_TARGET_WORD_MSB == 0)
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#define INSERTED8 MSINSERTED8
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#define INSERTED16 MSINSERTED16
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#define INSERTED32 MSINSERTED32
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#define INSERTED64 MSINSERTED64
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#define INSERTED MSINSERTED
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#else
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#define INSERTED8 LSINSERTED8
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#define INSERTED16 LSINSERTED16
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#define INSERTED32 LSINSERTED32
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#define INSERTED64 LSINSERTED64
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#define INSERTED LSINSERTED
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#endif
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/* MOVE bits from one loc to another (combination of extract/insert) */
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#define MOVED8(VAL,OH,OL,NH,NL) INSERTED8 (EXTRACTED8 ((VAL), OH, OL), NH, NL)
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#define MOVED16(VAL,OH,OL,NH,NL) INSERTED16(EXTRACTED16((VAL), OH, OL), NH, NL)
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#define MOVED32(VAL,OH,OL,NH,NL) INSERTED32(EXTRACTED32((VAL), OH, OL), NH, NL)
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#define MOVED64(VAL,OH,OL,NH,NL) INSERTED64(EXTRACTED64((VAL), OH, OL), NH, NL)
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#define MOVED(VAL,OH,OL,NH,NL) INSERTED (EXTRACTED ((VAL), OH, OL), NH, NL)
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/* Sign extend the quantity to the targets natural word size */
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#define EXTEND4(X) (LSSEXT ((X), 3))
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#define EXTEND5(X) (LSSEXT ((X), 4))
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#define EXTEND6(X) (LSSEXT ((X), 5))
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#define EXTEND8(X) ((signed_word)(int8_t)(X))
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#define EXTEND9(X) (LSSEXT ((X), 8))
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#define EXTEND11(X) (LSSEXT ((X), 10))
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#define EXTEND12(X) (LSSEXT ((X), 11))
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#define EXTEND15(X) (LSSEXT ((X), 14))
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#define EXTEND16(X) ((signed_word)(int16_t)(X))
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#define EXTEND18(X) (LSSEXT ((X), 17))
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#define EXTEND19(X) (LSSEXT ((X), 18))
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#define EXTEND21(X) (LSSEXT ((X), 20))
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#define EXTEND24(X) (LSSEXT ((X), 23))
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#define EXTEND25(X) (LSSEXT ((X), 24))
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#define EXTEND26(X) (LSSEXT ((X), 25))
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#define EXTEND32(X) ((signed_word)(int32_t)(X))
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#define EXTEND64(X) ((signed_word)(int64_t)(X))
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/* depending on MODE return a 64bit or 32bit (sign extended) value */
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#if (WITH_TARGET_WORD_BITSIZE == 64)
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#define EXTENDED(X) ((int64_t)(int32_t)(X))
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#endif
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#if (WITH_TARGET_WORD_BITSIZE == 32)
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#define EXTENDED(X) (X)
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#endif
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#if (WITH_TARGET_WORD_BITSIZE == 16)
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#define EXTENDED(X) (X)
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#endif
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/* memory alignment macro's */
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#define align_up(v, n) (((v) + (n) - 1) & -(n))
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#define align_down(v, n) ((v) & -(n))
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/* bit bliting macro's */
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#define BLIT32(V, POS, BIT) \
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do { \
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if (BIT) \
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V |= BIT32 (POS); \
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else \
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V &= ~BIT32 (POS); \
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} while (0)
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#define MBLIT32(V, LO, HI, VAL) \
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do { \
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(V) = (((V) & ~MASK32 ((LO), (HI))) \
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| INSERTED32 (VAL, LO, HI)); \
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} while (0)
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/* some rotate functions. The generic macro's ROT, ROTL, ROTR are
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intentionally omited. */
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INLINE_SIM_BITS(uint8_t) ROT8 (uint8_t val, int shift);
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INLINE_SIM_BITS(uint16_t) ROT16 (uint16_t val, int shift);
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INLINE_SIM_BITS(uint32_t) ROT32 (uint32_t val, int shift);
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INLINE_SIM_BITS(uint64_t) ROT64 (uint64_t val, int shift);
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INLINE_SIM_BITS(uint8_t) ROTL8 (uint8_t val, int shift);
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INLINE_SIM_BITS(uint16_t) ROTL16 (uint16_t val, int shift);
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INLINE_SIM_BITS(uint32_t) ROTL32 (uint32_t val, int shift);
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INLINE_SIM_BITS(uint64_t) ROTL64 (uint64_t val, int shift);
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INLINE_SIM_BITS(uint8_t) ROTR8 (uint8_t val, int shift);
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INLINE_SIM_BITS(uint16_t) ROTR16 (uint16_t val, int shift);
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INLINE_SIM_BITS(uint32_t) ROTR32 (uint32_t val, int shift);
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INLINE_SIM_BITS(uint64_t) ROTR64 (uint64_t val, int shift);
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/* Sign extension operations */
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INLINE_SIM_BITS(uint8_t) LSSEXT8 (int8_t val, int sign_bit);
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INLINE_SIM_BITS(uint16_t) LSSEXT16 (int16_t val, int sign_bit);
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INLINE_SIM_BITS(uint32_t) LSSEXT32 (int32_t val, int sign_bit);
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INLINE_SIM_BITS(uint64_t) LSSEXT64 (int64_t val, int sign_bit);
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INLINE_SIM_BITS(unsigned_word) LSSEXT (signed_word val, int sign_bit);
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INLINE_SIM_BITS(uint8_t) MSSEXT8 (int8_t val, int sign_bit);
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INLINE_SIM_BITS(uint16_t) MSSEXT16 (int16_t val, int sign_bit);
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INLINE_SIM_BITS(uint32_t) MSSEXT32 (int32_t val, int sign_bit);
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INLINE_SIM_BITS(uint64_t) MSSEXT64 (int64_t val, int sign_bit);
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INLINE_SIM_BITS(unsigned_word) MSSEXT (signed_word val, int sign_bit);
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#if (WITH_TARGET_WORD_MSB == 0)
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#define SEXT8 MSSEXT8
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#define SEXT16 MSSEXT16
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#define SEXT32 MSSEXT32
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#define SEXT64 MSSEXT64
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#define SEXT MSSEXT
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#else
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#define SEXT8 LSSEXT8
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#define SEXT16 LSSEXT16
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#define SEXT32 LSSEXT32
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#define SEXT64 LSSEXT64
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#define SEXT LSSEXT
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#endif
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#if H_REVEALS_MODULE_P (SIM_BITS_INLINE)
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#include "sim-bits.c"
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#endif
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#endif /* SIM_BITS_H */
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