Mike Frysinger cc67f780ec sim: info: convert verbose field to a bool ... The verbose argument has always been an int treated as a bool, so convert it to an explicit bool. Further, update the API docs to match the reality that the verbose value is actually used by some of the internal modules.		2023-01-18 20:47:55 -05:00
..
aarch64	sim: modules.c: fix generation after recent refactors	2023-01-15 20:55:48 -05:00
arm	sim: formally assume unistd.h always exists (via gnulib)	2023-01-16 04:35:48 -05:00
avr	sim: modules.c: fix generation after recent refactors	2023-01-15 20:55:48 -05:00
bfin	sim: modules.c: fix generation after recent refactors	2023-01-15 20:55:48 -05:00
bpf	sim: modules.c: fix generation after recent refactors	2023-01-15 20:55:48 -05:00
common	sim: info: convert verbose field to a bool	2023-01-18 20:47:55 -05:00
cr16	sim: formally assume unistd.h always exists (via gnulib)	2023-01-16 04:35:48 -05:00
cris	sim: assume sys/stat.h always exists (via gnulib)	2023-01-16 04:42:47 -05:00
d10v	sim: info: convert verbose field to a bool	2023-01-18 20:47:55 -05:00
erc32	sim: info: convert verbose field to a bool	2023-01-18 20:47:55 -05:00
example-synacor	sim: modules.c: fix generation after recent refactors	2023-01-15 20:55:48 -05:00
frv	sim: info: convert verbose field to a bool	2023-01-18 20:47:55 -05:00
ft32	sim: modules.c: fix generation after recent refactors	2023-01-15 20:55:48 -05:00
h8300	sim: info: convert verbose field to a bool	2023-01-18 20:47:55 -05:00
igen	sim: igen: simplify build logic a little	2023-01-15 02:07:43 -05:00
iq2000	sim: modules.c: fix generation after recent refactors	2023-01-15 20:55:48 -05:00
lm32	sim: modules.c: fix generation after recent refactors	2023-01-15 20:55:48 -05:00
m4	sim: assume sys/stat.h always exists (via gnulib)	2023-01-16 04:42:47 -05:00
m32c	sim: info: convert verbose field to a bool	2023-01-18 20:47:55 -05:00
m32r	sim: info: convert verbose field to a bool	2023-01-18 20:47:55 -05:00
m68hc11	sim: info: convert verbose field to a bool	2023-01-18 20:47:55 -05:00
mcore	sim: info: convert verbose field to a bool	2023-01-18 20:47:55 -05:00
microblaze	sim: info: convert verbose field to a bool	2023-01-18 20:47:55 -05:00
mips	sim: modules.c: fix generation after recent refactors	2023-01-15 20:55:48 -05:00
mn10300	sim: mn10300: minimize mn10300-sim.h include in sim-main.h	2023-01-19 01:05:00 +01:00
moxie	sim: modules.c: fix generation after recent refactors	2023-01-15 20:55:48 -05:00
msp430	sim: modules.c: fix generation after recent refactors	2023-01-15 20:55:48 -05:00
or1k	sim: modules.c: fix generation after recent refactors	2023-01-15 20:55:48 -05:00
ppc	sim: info: convert verbose field to a bool	2023-01-18 20:47:55 -05:00
pru	sim: modules.c: fix generation after recent refactors	2023-01-15 20:55:48 -05:00
riscv	sim: modules.c: fix generation after recent refactors	2023-01-15 20:55:48 -05:00
rl78	sim: info: convert verbose field to a bool	2023-01-18 20:47:55 -05:00
rx	sim: info: convert verbose field to a bool	2023-01-18 20:47:55 -05:00
sh	sim: info: convert verbose field to a bool	2023-01-18 20:47:55 -05:00
testsuite	sim: bpf: fix testsuite due to linker warnings [PR sim/29954]	2023-01-04 20:54:14 -05:00
v850	sim: v850: reduce extra header inclusion to igen files	2023-01-18 19:13:04 -05:00
.gitignore
aclocal.m4	sim: smp: make option available again	2022-12-25 02:13:30 -05:00
arch-subdir.mk.in	sim: build: drop support for creating libsim.a in subdirs	2023-01-10 01:15:26 -05:00
ChangeLog-2021
config.h.in	sim: build: stop probing system extensions (ourselves)	2023-01-16 04:22:10 -05:00
configure	sim: assume sys/stat.h always exists (via gnulib)	2023-01-16 04:42:47 -05:00
configure.ac	sim: igen: simplify build logic a little	2023-01-15 02:07:43 -05:00
COPYING
gdbinit.in
MAINTAINERS
Makefile.am	sim: igen: simplify build logic a little	2023-01-15 02:07:43 -05:00
Makefile.in	sim: unify sim-signal.o building	2023-01-18 19:26:58 -05:00
README-HACKING	sim: build: delete Make-common.in logic	2023-01-13 17:34:53 -05:00