binutils-gdb/sim/configure.tgt
Jose E. Marchesi b26e2ae7d3 sim: eBPF simulator
This patch introduces the basics of an instruction-simulator for eBPF.
The simulator is based on CGEN.

gdb/ChangeLog:

2020-08-04  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* configure.tgt: Set gdb_sim for bpf-*-* targets.

sim/ChangeLog:

2020-08-04  Jose E. Marchesi  <jose.marchesi@oracle.com>
	    David Faust <david.faust@oracle.com>

	* configure.tgt (sim_arch): Add entry for bpf-*-*.
	* configure: Regenerate.
	* MAINTAINERS: Add maintainer for the BPF simulator.
	* bpf/Makefile.in: New file.
	* bpf/bpf-helpers.c: Likewise.
	* bpf/bpf-helpers.def: Likewise.
	* bpf/bpf-helpers.h: Likewise.
	* bpf/bpf-sim.h: Likewise.
	* bpf/bpf.c: Likewise.
	* bpf/config.in: Likewise.
	* bpf/configure.ac: Likewise.
	* bpf/decode.h: Likewise.
	* bpf/eng.h: Likewise.
	* bpf/mloop.in: Likewise.
	* bpf/sim-if.c: Likewise.
	* bpf/sim-main.h: Likewise.
	* bpf/traps.c: Likewise.
	* bpf/configure: Generate.
	* bpf/aclocal.m4: Likewise.

sim/testsuite/ChangeLog:

2020-08-04  David Faust  <david.faust@oracle.com>
	    Jose E. Marchesi  <jose.marchesi@oracle.com>

	* configure: Regenerate.
	* sim/bpf/allinsn.exp: New file.
	* sim/bpf/alu.s: Likewise.
	* sim/bpf/alu32.s: Likewise.
	* sim/bpf/endbe.s: Likewise.
	* sim/bpf/endle.s: Likewise.
	* sim/bpf/jmp.s: Likewise.
	* sim/bpf/jmp32.s: Likewise.
	* sim/bpf/ldabs.s: Likewise.
	* sim/bpf/mem.s: Likewise.
	* sim/bpf/mov.s: Likewise.
	* sim/bpf/testutils.inc: Likewise.
	* sim/bpf/xadd.s: Likewise.
2020-08-04 18:09:16 +02:00

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dnl Note that this file is intended to be included at the m4 level and not
dnl the shell level, so use sinclude(...) to pull it in.
# WHEN ADDING ENTRIES TO THIS MATRIX:
# Make sure that the left side always has two dashes. Otherwise you
# can get spurious matches. Even for unambiguous cases, do this as a
# convention, else the table becomes a real mess to understand and
# maintain.
dnl glue to avoid code duplication at top level
m4_ifndef([SIM_ARCH], [AC_DEFUN([SIM_ARCH],[sim_arch=$1])])
sim_igen=no
sim_arch=
case "${target}" in
aarch64*-*-*)
SIM_ARCH(aarch64)
;;
arm*-*-*)
SIM_ARCH(arm)
;;
avr*-*-*)
SIM_ARCH(avr)
;;
bfin-*-*)
SIM_ARCH(bfin)
;;
bpf-*-*)
SIM_ARCH(bpf)
;;
cr16*-*-*)
SIM_ARCH(cr16)
;;
cris-*-* | crisv32-*-*)
SIM_ARCH(cris)
;;
d10v-*-*)
SIM_ARCH(d10v)
;;
frv-*-*)
SIM_ARCH(frv)
;;
h8300*-*-*)
SIM_ARCH(h8300)
;;
iq2000-*-*)
SIM_ARCH(iq2000)
;;
lm32-*-*)
SIM_ARCH(lm32)
;;
m32c-*-*)
SIM_ARCH(m32c)
;;
m32r-*-*)
SIM_ARCH(m32r)
;;
m68hc11-*-*|m6811-*-*)
SIM_ARCH(m68hc11)
;;
mcore-*-*)
SIM_ARCH(mcore)
;;
microblaze-*-*)
SIM_ARCH(microblaze)
;;
mips*-*-*)
SIM_ARCH(mips)
sim_igen=yes
;;
mn10300*-*-*)
SIM_ARCH(mn10300)
sim_igen=yes
;;
moxie-*-*)
SIM_ARCH(moxie)
;;
msp430*-*-*)
SIM_ARCH(msp430)
;;
or1k-*-* | or1knd-*-*)
SIM_ARCH(or1k)
;;
pru*-*-*)
SIM_ARCH(pru)
;;
rl78-*-*)
SIM_ARCH(rl78)
;;
rx-*-*)
SIM_ARCH(rx)
;;
sh64*-*-*)
SIM_ARCH(sh64)
;;
sh*-*-*)
SIM_ARCH(sh)
;;
sparc-*-rtems*|sparc-*-elf*)
SIM_ARCH(erc32)
;;
powerpc*-*-*)
SIM_ARCH(ppc)
;;
ft32-*-*)
SIM_ARCH(ft32)
;;
v850*-*-*)
SIM_ARCH(v850)
sim_igen=yes
;;
esac
AC_SUBST(sim_arch)