mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-12-03 04:12:10 +08:00
08106042d9
I built GDB for all targets on a x86-64/GNU-Linux system, and
then (accidentally) passed GDB a RISC-V binary, and asked GDB to "run"
the binary on the native target. I got this error:
(gdb) show architecture
The target architecture is set to "auto" (currently "i386").
(gdb) file /tmp/hello.rv32.exe
Reading symbols from /tmp/hello.rv32.exe...
(gdb) show architecture
The target architecture is set to "auto" (currently "riscv:rv32").
(gdb) run
Starting program: /tmp/hello.rv32.exe
../../src/gdb/i387-tdep.c:596: internal-error: i387_supply_fxsave: Assertion `tdep->st0_regnum >= I386_ST0_REGNUM' failed.
What's going on here is this; initially the architecture is i386, this
is based on the default architecture, which is set based on the native
target. After loading the RISC-V executable the architecture of the
current inferior is updated based on the architecture of the
executable.
When we "run", GDB does a fork & exec, with the inferior being
controlled through ptrace. GDB sees an initial stop from the inferior
as soon as the inferior comes to life. In response to this stop GDB
ends up calling save_stop_reason (linux-nat.c), which ends up trying
to read register from the inferior, to do this we end up calling
target_ops::fetch_registers, which, for the x86-64 native target,
calls amd64_linux_nat_target::fetch_registers.
After this I eventually end up in i387_supply_fxsave, different x86
based targets will end in different functions to fetch registers, but
it doesn't really matter which function we end up in, the problem is
this line, which is repeated in many places:
i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (arch);
The problem here is that the ARCH in this line comes from the current
inferior, which, as we discussed above, will be a RISC-V gdbarch, the
tdep field will actually be of type riscv_gdbarch_tdep, not
i386_gdbarch_tdep. After this cast we are relying on undefined
behaviour, in my case I happen to trigger an assert, but this might
not always be the case.
The thing I tried that exposed this problem was of course, trying to
start an executable of the wrong architecture on a native target. I
don't think that the correct solution for this problem is to detect,
at the point of cast, that the gdbarch_tdep object is of the wrong
type, but, I did wonder, is there a way that we could protect
ourselves from incorrectly casting the gdbarch_tdep object?
I think that there is something we can do here, and this commit is the
first step in that direction, though no actual check is added by this
commit.
This commit can be split into two parts:
(1) In gdbarch.h and arch-utils.c. In these files I have modified
gdbarch_tdep (the function) so that it now takes a template argument,
like this:
template<typename TDepType>
static inline TDepType *
gdbarch_tdep (struct gdbarch *gdbarch)
{
struct gdbarch_tdep *tdep = gdbarch_tdep_1 (gdbarch);
return static_cast<TDepType *> (tdep);
}
After this change we are no better protected, but the cast is now
done within the gdbarch_tdep function rather than at the call sites,
this leads to the second, much larger change in this commit,
(2) Everywhere gdbarch_tdep is called, we make changes like this:
- i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (arch);
+ i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (arch);
There should be no functional change after this commit.
In the next commit I will build on this change to add an assertion in
gdbarch_tdep that checks we are casting to the correct type.
364 lines
9.7 KiB
C
364 lines
9.7 KiB
C
/* Native-dependent code for BSD Unix running on ARM's, for GDB.
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Copyright (C) 1988-2022 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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/* We define this to get types like register_t. */
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#define _KERNTYPES
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#include "defs.h"
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#include "gdbcore.h"
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#include "inferior.h"
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#include "regcache.h"
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#include "target.h"
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#include <sys/types.h>
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#include <sys/ptrace.h>
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#include <sys/sysctl.h>
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#include <machine/reg.h>
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#include <machine/frame.h>
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#include "arm-tdep.h"
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#include "arm-netbsd-tdep.h"
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#include "aarch32-tdep.h"
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#include "inf-ptrace.h"
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#include "netbsd-nat.h"
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class arm_netbsd_nat_target final : public nbsd_nat_target
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{
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public:
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/* Add our register access methods. */
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void fetch_registers (struct regcache *, int) override;
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void store_registers (struct regcache *, int) override;
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const struct target_desc *read_description () override;
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};
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static arm_netbsd_nat_target the_arm_netbsd_nat_target;
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static void
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arm_supply_vfpregset (struct regcache *regcache, struct fpreg *fpregset)
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{
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arm_gdbarch_tdep *tdep = gdbarch_tdep<arm_gdbarch_tdep> (regcache->arch ());
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if (tdep->vfp_register_count == 0)
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return;
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struct vfpreg &vfp = fpregset->fpr_vfp;
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for (int regno = 0; regno <= tdep->vfp_register_count; regno++)
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regcache->raw_supply (regno + ARM_D0_REGNUM, (char *) &vfp.vfp_regs[regno]);
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regcache->raw_supply (ARM_FPSCR_REGNUM, (char *) &vfp.vfp_fpscr);
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}
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static void
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fetch_register (struct regcache *regcache, int regno)
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{
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struct reg inferior_registers;
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int ret;
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int lwp = regcache->ptid ().lwp ();
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ret = ptrace (PT_GETREGS, regcache->ptid ().pid (),
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(PTRACE_TYPE_ARG3) &inferior_registers, lwp);
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if (ret < 0)
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{
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warning (_("unable to fetch general register"));
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return;
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}
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arm_nbsd_supply_gregset (nullptr, regcache, regno, &inferior_registers,
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sizeof (inferior_registers));
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}
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static void
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fetch_fp_register (struct regcache *regcache, int regno)
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{
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struct fpreg inferior_fp_registers;
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int lwp = regcache->ptid ().lwp ();
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int ret = ptrace (PT_GETFPREGS, regcache->ptid ().pid (),
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(PTRACE_TYPE_ARG3) &inferior_fp_registers, lwp);
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struct vfpreg &vfp = inferior_fp_registers.fpr_vfp;
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if (ret < 0)
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{
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warning (_("unable to fetch floating-point register"));
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return;
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}
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arm_gdbarch_tdep *tdep = gdbarch_tdep<arm_gdbarch_tdep> (regcache->arch ());
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if (regno == ARM_FPSCR_REGNUM && tdep->vfp_register_count != 0)
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regcache->raw_supply (ARM_FPSCR_REGNUM, (char *) &vfp.vfp_fpscr);
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else if (regno >= ARM_D0_REGNUM
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&& regno <= ARM_D0_REGNUM + tdep->vfp_register_count)
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{
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regcache->raw_supply (regno,
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(char *) &vfp.vfp_regs[regno - ARM_D0_REGNUM]);
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}
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else
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warning (_("Invalid register number."));
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}
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static void
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fetch_fp_regs (struct regcache *regcache)
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{
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struct fpreg inferior_fp_registers;
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int lwp = regcache->ptid ().lwp ();
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int ret;
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int regno;
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ret = ptrace (PT_GETFPREGS, regcache->ptid ().pid (),
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(PTRACE_TYPE_ARG3) &inferior_fp_registers, lwp);
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if (ret < 0)
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{
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warning (_("unable to fetch general registers"));
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return;
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}
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arm_supply_vfpregset (regcache, &inferior_fp_registers);
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}
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void
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arm_netbsd_nat_target::fetch_registers (struct regcache *regcache, int regno)
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{
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if (regno >= 0)
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{
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if (regno < ARM_F0_REGNUM || regno > ARM_FPS_REGNUM)
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fetch_register (regcache, regno);
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else
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fetch_fp_register (regcache, regno);
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}
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else
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{
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fetch_register (regcache, -1);
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fetch_fp_regs (regcache);
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}
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}
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static void
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store_register (const struct regcache *regcache, int regno)
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{
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struct gdbarch *gdbarch = regcache->arch ();
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struct reg inferior_registers;
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int lwp = regcache->ptid ().lwp ();
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int ret;
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ret = ptrace (PT_GETREGS, regcache->ptid ().pid (),
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(PTRACE_TYPE_ARG3) &inferior_registers, lwp);
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if (ret < 0)
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{
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warning (_("unable to fetch general registers"));
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return;
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}
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switch (regno)
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{
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case ARM_SP_REGNUM:
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regcache->raw_collect (ARM_SP_REGNUM, (char *) &inferior_registers.r_sp);
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break;
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case ARM_LR_REGNUM:
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regcache->raw_collect (ARM_LR_REGNUM, (char *) &inferior_registers.r_lr);
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break;
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case ARM_PC_REGNUM:
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if (arm_apcs_32)
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regcache->raw_collect (ARM_PC_REGNUM,
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(char *) &inferior_registers.r_pc);
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else
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{
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unsigned pc_val;
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regcache->raw_collect (ARM_PC_REGNUM, (char *) &pc_val);
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pc_val = gdbarch_addr_bits_remove (gdbarch, pc_val);
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inferior_registers.r_pc ^= gdbarch_addr_bits_remove
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(gdbarch, inferior_registers.r_pc);
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inferior_registers.r_pc |= pc_val;
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}
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break;
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case ARM_PS_REGNUM:
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if (arm_apcs_32)
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regcache->raw_collect (ARM_PS_REGNUM,
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(char *) &inferior_registers.r_cpsr);
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else
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{
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unsigned psr_val;
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regcache->raw_collect (ARM_PS_REGNUM, (char *) &psr_val);
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psr_val ^= gdbarch_addr_bits_remove (gdbarch, psr_val);
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inferior_registers.r_pc = gdbarch_addr_bits_remove
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(gdbarch, inferior_registers.r_pc);
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inferior_registers.r_pc |= psr_val;
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}
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break;
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default:
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regcache->raw_collect (regno, (char *) &inferior_registers.r[regno]);
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break;
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}
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ret = ptrace (PT_SETREGS, regcache->ptid ().pid (),
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(PTRACE_TYPE_ARG3) &inferior_registers, lwp);
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if (ret < 0)
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warning (_("unable to write register %d to inferior"), regno);
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}
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static void
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store_regs (const struct regcache *regcache)
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{
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struct gdbarch *gdbarch = regcache->arch ();
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struct reg inferior_registers;
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int lwp = regcache->ptid ().lwp ();
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int ret;
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int regno;
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for (regno = ARM_A1_REGNUM; regno < ARM_SP_REGNUM; regno++)
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regcache->raw_collect (regno, (char *) &inferior_registers.r[regno]);
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regcache->raw_collect (ARM_SP_REGNUM, (char *) &inferior_registers.r_sp);
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regcache->raw_collect (ARM_LR_REGNUM, (char *) &inferior_registers.r_lr);
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if (arm_apcs_32)
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{
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regcache->raw_collect (ARM_PC_REGNUM, (char *) &inferior_registers.r_pc);
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regcache->raw_collect (ARM_PS_REGNUM,
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(char *) &inferior_registers.r_cpsr);
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}
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else
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{
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unsigned pc_val;
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unsigned psr_val;
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regcache->raw_collect (ARM_PC_REGNUM, (char *) &pc_val);
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regcache->raw_collect (ARM_PS_REGNUM, (char *) &psr_val);
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pc_val = gdbarch_addr_bits_remove (gdbarch, pc_val);
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psr_val ^= gdbarch_addr_bits_remove (gdbarch, psr_val);
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inferior_registers.r_pc = pc_val | psr_val;
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}
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ret = ptrace (PT_SETREGS, regcache->ptid ().pid (),
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(PTRACE_TYPE_ARG3) &inferior_registers, lwp);
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if (ret < 0)
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warning (_("unable to store general registers"));
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}
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static void
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store_fp_register (const struct regcache *regcache, int regno)
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{
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struct fpreg inferior_fp_registers;
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int lwp = regcache->ptid ().lwp ();
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int ret = ptrace (PT_GETFPREGS, regcache->ptid ().pid (),
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(PTRACE_TYPE_ARG3) &inferior_fp_registers, lwp);
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struct vfpreg &vfp = inferior_fp_registers.fpr_vfp;
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if (ret < 0)
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{
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warning (_("unable to fetch floating-point registers"));
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return;
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}
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arm_gdbarch_tdep *tdep = gdbarch_tdep<arm_gdbarch_tdep> (regcache->arch ());
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if (regno == ARM_FPSCR_REGNUM && tdep->vfp_register_count != 0)
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regcache->raw_collect (ARM_FPSCR_REGNUM, (char *) &vfp.vfp_fpscr);
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else if (regno >= ARM_D0_REGNUM
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&& regno <= ARM_D0_REGNUM + tdep->vfp_register_count)
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{
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regcache->raw_collect (regno,
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(char *) &vfp.vfp_regs[regno - ARM_D0_REGNUM]);
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}
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else
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warning (_("Invalid register number."));
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ret = ptrace (PT_SETFPREGS, regcache->ptid ().pid (),
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(PTRACE_TYPE_ARG3) &inferior_fp_registers, lwp);
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if (ret < 0)
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warning (_("unable to write register %d to inferior"), regno);
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}
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static void
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store_fp_regs (const struct regcache *regcache)
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{
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arm_gdbarch_tdep *tdep = gdbarch_tdep<arm_gdbarch_tdep> (regcache->arch ());
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int lwp = regcache->ptid ().lwp ();
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if (tdep->vfp_register_count == 0)
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return;
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struct fpreg fpregs;
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for (int regno = 0; regno <= tdep->vfp_register_count; regno++)
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regcache->raw_collect
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(regno + ARM_D0_REGNUM, (char *) &fpregs.fpr_vfp.vfp_regs[regno]);
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regcache->raw_collect (ARM_FPSCR_REGNUM,
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(char *) &fpregs.fpr_vfp.vfp_fpscr);
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int ret = ptrace (PT_SETFPREGS, regcache->ptid ().pid (),
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(PTRACE_TYPE_ARG3) &fpregs, lwp);
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if (ret < 0)
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warning (_("unable to store floating-point registers"));
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}
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void
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arm_netbsd_nat_target::store_registers (struct regcache *regcache, int regno)
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{
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if (regno >= 0)
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{
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if (regno < ARM_F0_REGNUM || regno > ARM_FPS_REGNUM)
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store_register (regcache, regno);
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else
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store_fp_register (regcache, regno);
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}
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else
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{
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store_regs (regcache);
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store_fp_regs (regcache);
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}
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}
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const struct target_desc *
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arm_netbsd_nat_target::read_description ()
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{
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int flag;
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size_t len = sizeof (flag);
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if (sysctlbyname("machdep.fpu_present", &flag, &len, NULL, 0) != 0
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|| !flag)
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return arm_read_description (ARM_FP_TYPE_NONE, false);
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len = sizeof(flag);
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if (sysctlbyname("machdep.neon_present", &flag, &len, NULL, 0) == 0 && flag)
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return aarch32_read_description ();
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return arm_read_description (ARM_FP_TYPE_VFPV3, false);
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}
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void _initialize_arm_netbsd_nat ();
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void
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_initialize_arm_netbsd_nat ()
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{
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add_inf_child_target (&the_arm_netbsd_nat_target);
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}
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