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345bd07cce
I would like to be able to use non-trivial types in gdbarch_tdep types. This is not possible at the moment (in theory), because of the one definition rule. To allow it, rename all gdbarch_tdep types to <arch>_gdbarch_tdep, and make them inherit from a gdbarch_tdep base class. The inheritance is necessary to be able to pass pointers to all these <arch>_gdbarch_tdep objects to gdbarch_alloc, which takes a pointer to gdbarch_tdep. These objects are never deleted through a base class pointer, so I didn't include a virtual destructor. In the future, if gdbarch objects deletable, I could imagine that the gdbarch_tdep objects could become owned by the gdbarch objects, and then it would become useful to have a virtual destructor (so that the gdbarch object can delete the owned gdbarch_tdep object). But that's not necessary right now. It turns out that RISC-V already has a gdbarch_tdep that is non-default-constructible, so that provides a good motivation for this change. Most changes are fairly straightforward, mostly needing to add some casts all over the place. There is however the xtensa architecture, doing its own little weird thing to define its gdbarch_tdep. I did my best to adapt it, but I can't test those changes. Change-Id: Ic001903f91ddd106bd6ca09a79dabe8df2d69f3b
268 lines
8.7 KiB
C
268 lines
8.7 KiB
C
/* Target-dependent code for the IA-64 for GDB, the GNU debugger.
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Copyright (C) 2000-2021 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "ia64-tdep.h"
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#include "arch-utils.h"
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#include "gdbcore.h"
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#include "regcache.h"
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#include "osabi.h"
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#include "solib-svr4.h"
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#include "symtab.h"
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#include "linux-tdep.h"
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#include "regset.h"
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#include <ctype.h>
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/* The sigtramp code is in a non-readable (executable-only) region
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of memory called the ``gate page''. The addresses in question
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were determined by examining the system headers. They are
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overly generous to allow for different pages sizes. */
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#define GATE_AREA_START 0xa000000000000100LL
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#define GATE_AREA_END 0xa000000000020000LL
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/* Offset to sigcontext structure from frame of handler. */
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#define IA64_LINUX_SIGCONTEXT_OFFSET 192
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static int
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ia64_linux_pc_in_sigtramp (CORE_ADDR pc)
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{
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return (pc >= (CORE_ADDR) GATE_AREA_START && pc < (CORE_ADDR) GATE_AREA_END);
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}
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/* IA-64 GNU/Linux specific function which, given a frame address and
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a register number, returns the address at which that register may be
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found. 0 is returned for registers which aren't stored in the
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sigcontext structure. */
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static CORE_ADDR
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ia64_linux_sigcontext_register_address (struct gdbarch *gdbarch,
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CORE_ADDR sp, int regno)
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{
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enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
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gdb_byte buf[8];
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CORE_ADDR sigcontext_addr = 0;
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/* The address of the sigcontext area is found at offset 16 in the
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sigframe. */
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read_memory (sp + 16, buf, 8);
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sigcontext_addr = extract_unsigned_integer (buf, 8, byte_order);
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if (IA64_GR0_REGNUM <= regno && regno <= IA64_GR31_REGNUM)
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return sigcontext_addr + 200 + 8 * (regno - IA64_GR0_REGNUM);
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else if (IA64_BR0_REGNUM <= regno && regno <= IA64_BR7_REGNUM)
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return sigcontext_addr + 136 + 8 * (regno - IA64_BR0_REGNUM);
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else if (IA64_FR0_REGNUM <= regno && regno <= IA64_FR127_REGNUM)
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return sigcontext_addr + 464 + 16 * (regno - IA64_FR0_REGNUM);
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else
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switch (regno)
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{
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case IA64_IP_REGNUM :
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return sigcontext_addr + 40;
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case IA64_CFM_REGNUM :
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return sigcontext_addr + 48;
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case IA64_PSR_REGNUM :
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return sigcontext_addr + 56; /* user mask only */
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/* sc_ar_rsc is provided, from which we could compute bspstore, but
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I don't think it's worth it. Anyway, if we want it, it's at offset
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64. */
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case IA64_BSP_REGNUM :
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return sigcontext_addr + 72;
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case IA64_RNAT_REGNUM :
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return sigcontext_addr + 80;
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case IA64_CCV_REGNUM :
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return sigcontext_addr + 88;
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case IA64_UNAT_REGNUM :
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return sigcontext_addr + 96;
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case IA64_FPSR_REGNUM :
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return sigcontext_addr + 104;
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case IA64_PFS_REGNUM :
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return sigcontext_addr + 112;
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case IA64_LC_REGNUM :
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return sigcontext_addr + 120;
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case IA64_PR_REGNUM :
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return sigcontext_addr + 128;
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default :
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return 0;
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}
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}
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static void
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ia64_linux_write_pc (struct regcache *regcache, CORE_ADDR pc)
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{
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ia64_write_pc (regcache, pc);
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/* We must be careful with modifying the instruction-pointer: if we
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just interrupt a system call, the kernel would ordinarily try to
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restart it when we resume the inferior, which typically results
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in SIGSEGV or SIGILL. We prevent this by clearing r10, which
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will tell the kernel that r8 does NOT contain a valid error code
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and hence it will skip system-call restart.
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The clearing of r10 is safe as long as ia64_write_pc() is only
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called as part of setting up an inferior call. */
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regcache_cooked_write_unsigned (regcache, IA64_GR10_REGNUM, 0);
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}
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/* Implementation of `gdbarch_stap_is_single_operand', as defined in
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gdbarch.h. */
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static int
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ia64_linux_stap_is_single_operand (struct gdbarch *gdbarch, const char *s)
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{
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return ((isdigit (*s) && s[1] == '[' && s[2] == 'r') /* Displacement. */
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|| *s == 'r' /* Register value. */
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|| isdigit (*s)); /* Literal number. */
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}
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/* Core file support. */
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static const struct regcache_map_entry ia64_linux_gregmap[] =
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{
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{ 32, IA64_GR0_REGNUM, 8 }, /* r0 ... r31 */
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{ 1, REGCACHE_MAP_SKIP, 8 }, /* FIXME: NAT collection bits? */
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{ 1, IA64_PR_REGNUM, 8 },
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{ 8, IA64_BR0_REGNUM, 8 }, /* b0 ... b7 */
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{ 1, IA64_IP_REGNUM, 8 },
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{ 1, IA64_CFM_REGNUM, 8 },
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{ 1, IA64_PSR_REGNUM, 8 },
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{ 1, IA64_RSC_REGNUM, 8 },
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{ 1, IA64_BSP_REGNUM, 8 },
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{ 1, IA64_BSPSTORE_REGNUM, 8 },
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{ 1, IA64_RNAT_REGNUM, 8 },
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{ 1, IA64_CCV_REGNUM, 8 },
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{ 1, IA64_UNAT_REGNUM, 8 },
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{ 1, IA64_FPSR_REGNUM, 8 },
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{ 1, IA64_PFS_REGNUM, 8 },
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{ 1, IA64_LC_REGNUM, 8 },
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{ 1, IA64_EC_REGNUM, 8 },
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{ 0 }
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};
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/* Size of 'gregset_t', as defined by the Linux kernel. Note that
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this is more than actually mapped in the regmap above. */
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#define IA64_LINUX_GREGS_SIZE (128 * 8)
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static const struct regcache_map_entry ia64_linux_fpregmap[] =
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{
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{ 128, IA64_FR0_REGNUM, 16 }, /* f0 ... f127 */
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{ 0 }
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};
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#define IA64_LINUX_FPREGS_SIZE (128 * 16)
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static void
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ia64_linux_supply_fpregset (const struct regset *regset,
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struct regcache *regcache,
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int regnum, const void *regs, size_t len)
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{
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const gdb_byte f_zero[16] = { 0 };
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const gdb_byte f_one[16] =
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{ 0, 0, 0, 0, 0, 0, 0, 0x80, 0xff, 0xff, 0, 0, 0, 0, 0, 0 };
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regcache_supply_regset (regset, regcache, regnum, regs, len);
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/* Kernel generated cores have fr1==0 instead of 1.0. Older GDBs
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did the same. So ignore whatever might be recorded in fpregset_t
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for fr0/fr1 and always supply their expected values. */
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if (regnum == -1 || regnum == IA64_FR0_REGNUM)
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regcache->raw_supply (IA64_FR0_REGNUM, f_zero);
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if (regnum == -1 || regnum == IA64_FR1_REGNUM)
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regcache->raw_supply (IA64_FR1_REGNUM, f_one);
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}
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static const struct regset ia64_linux_gregset =
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{
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ia64_linux_gregmap,
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regcache_supply_regset, regcache_collect_regset
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};
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static const struct regset ia64_linux_fpregset =
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{
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ia64_linux_fpregmap,
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ia64_linux_supply_fpregset, regcache_collect_regset
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};
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static void
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ia64_linux_iterate_over_regset_sections (struct gdbarch *gdbarch,
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iterate_over_regset_sections_cb *cb,
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void *cb_data,
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const struct regcache *regcache)
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{
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cb (".reg", IA64_LINUX_GREGS_SIZE, IA64_LINUX_GREGS_SIZE, &ia64_linux_gregset,
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NULL, cb_data);
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cb (".reg2", IA64_LINUX_FPREGS_SIZE, IA64_LINUX_FPREGS_SIZE,
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&ia64_linux_fpregset, NULL, cb_data);
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}
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static void
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ia64_linux_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
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{
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ia64_gdbarch_tdep *tdep = (ia64_gdbarch_tdep *) gdbarch_tdep (gdbarch);
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static const char *const stap_register_prefixes[] = { "r", NULL };
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static const char *const stap_register_indirection_prefixes[] = { "[",
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NULL };
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static const char *const stap_register_indirection_suffixes[] = { "]",
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NULL };
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linux_init_abi (info, gdbarch, 0);
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/* Set the method of obtaining the sigcontext addresses at which
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registers are saved. */
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tdep->sigcontext_register_address = ia64_linux_sigcontext_register_address;
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/* Set the pc_in_sigtramp method. */
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tdep->pc_in_sigtramp = ia64_linux_pc_in_sigtramp;
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set_gdbarch_write_pc (gdbarch, ia64_linux_write_pc);
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set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
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set_solib_svr4_fetch_link_map_offsets
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(gdbarch, linux_lp64_fetch_link_map_offsets);
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/* Enable TLS support. */
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set_gdbarch_fetch_tls_load_module_address (gdbarch,
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svr4_fetch_objfile_link_map);
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/* Core file support. */
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set_gdbarch_iterate_over_regset_sections
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(gdbarch, ia64_linux_iterate_over_regset_sections);
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/* SystemTap related. */
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set_gdbarch_stap_register_prefixes (gdbarch, stap_register_prefixes);
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set_gdbarch_stap_register_indirection_prefixes (gdbarch,
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stap_register_indirection_prefixes);
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set_gdbarch_stap_register_indirection_suffixes (gdbarch,
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stap_register_indirection_suffixes);
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set_gdbarch_stap_gdb_register_prefix (gdbarch, "r");
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set_gdbarch_stap_is_single_operand (gdbarch,
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ia64_linux_stap_is_single_operand);
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}
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void _initialize_ia64_linux_tdep ();
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void
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_initialize_ia64_linux_tdep ()
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{
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gdbarch_register_osabi (bfd_arch_ia64, 0, GDB_OSABI_LINUX,
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ia64_linux_init_abi);
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}
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