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e5c9e53c9b
The multi-run logic for mips involves a bit of codegen and rewriting of files to include per-architecture prefixes. That can result in files with missing prototypes which cause compiler errors. In the case of mips-sde-elf targets, we have: $srcdir/m16run.c -> $builddir/m16mips64r2_run.c sim_engine_run -> m16mips64r2_engine_run $srcdir/micromipsrun.c -> micromipsmicromips_run.c sim_engine_run -> micromips64micromips_engine_run micromipsmicromips_run.c:80:1: error: no previous prototype for 'micromips64micromips_engine_run' [-Werror=missing-prototypes] 80 | micromips64micromips_engine_run (SIM_DESC sd, int next_cpu_nr, int nr_cpus, We generate headers for those prototypes in the configure script, but only include them in the generated multi-run.c file. Update the rewrite logic to turn the sim-engine.h include into the relevant generated engine include so these files also have their prototypes. $srcdir/m16run.c -> $builddir/m16mips64r2_run.c sim-engine.h -> m16mips64r2_engine.h $srcdir/micromipsrun.c -> micromipsmicromips_run.c sim-engine.h -> micromips64micromips_engine.h
78 lines
1.9 KiB
C
78 lines
1.9 KiB
C
/* This file is part of the program psim.
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Copyright (C) 1998, Andrew Cagney <cagney@highland.com.au>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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/* This must come before any other includes. */
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#include "defs.h"
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#include "sim-main.h"
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#include "m16_idecode.h"
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#include "m32_idecode.h"
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#include "bfd.h"
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#include "sim-engine.h"
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#define SD sd
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#define CPU cpu
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void
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sim_engine_run (SIM_DESC sd,
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int next_cpu_nr,
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int nr_cpus, /* ignore */
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int siggnal) /* ignore */
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{
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sim_cpu *cpu = STATE_CPU (sd, next_cpu_nr);
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address_word cia = CPU_PC_GET (cpu);
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while (1)
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{
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address_word nia;
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#if defined (ENGINE_ISSUE_PREFIX_HOOK)
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ENGINE_ISSUE_PREFIX_HOOK ();
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#endif
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if ((cia & 1))
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{
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m16_instruction_word instruction_0 = IMEM16 (cia);
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nia = m16_idecode_issue (sd, instruction_0, cia);
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}
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else
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{
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m32_instruction_word instruction_0 = IMEM32 (cia);
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nia = m32_idecode_issue (sd, instruction_0, cia);
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}
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#if defined (ENGINE_ISSUE_POSTFIX_HOOK)
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ENGINE_ISSUE_POSTFIX_HOOK ();
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#endif
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/* Update the instruction address */
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cia = nia;
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/* process any events */
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if (sim_events_tick (sd))
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{
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CPU_PC_SET (CPU, cia);
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sim_events_process (sd);
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cia = CPU_PC_GET (CPU);
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}
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}
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}
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