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0a129eb19a
These rules don't depend on the target compiler settings, so hoist the build logic up to the common builds for better parallelization. We have to extend the genmloop.sh logic a bit to allow outputting to a subdir since it always assumed cwd was the right place. We leave the cgen maintainer rules in the subdirs for now as they aren't normally run, and they rely on cgen logic that has not yet been generalized.
78 lines
2.4 KiB
Makefile
78 lines
2.4 KiB
Makefile
# Makefile template for Configure for the frv simulator
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# Copyright (C) 1998-2021 Free Software Foundation, Inc.
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# Contributed by Red Hat.
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program. If not, see <http://www.gnu.org/licenses/>.
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## COMMON_PRE_CONFIG_FRAG
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FRV_OBJS = frv.o cpu.o decode.o sem.o model.o mloop.o cgen-par.o
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SIM_OBJS = \
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$(SIM_NEW_COMMON_OBJS) \
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cgen-utils.o cgen-trace.o cgen-scache.o cgen-fpu.o cgen-accfp.o \
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cgen-run.o \
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sim-if.o arch.o \
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$(FRV_OBJS) \
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traps.o interrupts.o memory.o cache.o pipeline.o \
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profile.o profile-fr400.o profile-fr450.o profile-fr500.o profile-fr550.o options.o \
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reset.o registers.o
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# Extra headers included by sim-main.h.
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SIM_EXTRA_DEPS = \
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$(CGEN_INCLUDE_DEPS) \
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arch.h cpuall.h frv-sim.h $(srcdir)/../../opcodes/frv-desc.h cache.h \
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registers.h profile.h eng.h \
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$(sim-options_h)
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SIM_EXTRA_CFLAGS = @SIM_FRV_TRAPDUMP_FLAGS@
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SIM_EXTRA_CLEAN = frv-clean
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# Some modules don't build cleanly yet.
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memory.o sem.o: SIM_WERROR_CFLAGS =
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## COMMON_POST_CONFIG_FRAG
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arch = frv
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# FRV objs
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FRVBF_INCLUDE_DEPS = \
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$(CGEN_MAIN_CPU_DEPS) \
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$(SIM_EXTRA_DEPS) \
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cpu.h decode.h eng.h
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frv-clean:
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rm -f tmp-*
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rm -f stamp-arch stamp-cpu
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stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(srcdir)/../../cpu/frv.cpu
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$(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
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archfile=$(srcdir)/../../cpu/frv.cpu \
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FLAGS="with-scache"
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$(SILENCE) touch $@
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arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
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# @true
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stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srcdir)/../../cpu/frv.cpu
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$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
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cpu=frvbf mach=frv,fr550,fr500,fr450,fr400,tomcat,simple SUFFIX= \
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archfile=$(srcdir)/../../cpu/frv.cpu \
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FLAGS="with-scache with-profile=fn with-generic-write with-parallel-only" \
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EXTRAFILES="$(CGEN_CPU_SEM)"
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$(SILENCE) touch $@
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cpu.h sem.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
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# @true
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