mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-12-21 04:42:53 +08:00
4e6e8ba7c5
Move some unused funcs under existing #if 0 protection, mark a few local funcs as static, and add missing prototypes for the rest which are used from other files. This fixes all the fatal warnings in the mloop files so we can turn -Werror on here fully.
102 lines
3.5 KiB
Makefile
102 lines
3.5 KiB
Makefile
# Makefile template for Configure for the CRIS simulator, based on a mix
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# of the ones for m32r and i960.
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#
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# Copyright (C) 2004-2021 Free Software Foundation, Inc.
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# Contributed by Axis Communications.
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program. If not, see <http://www.gnu.org/licenses/>.
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## COMMON_PRE_CONFIG_FRAG
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CRISV10F_OBJS = crisv10f.o cpuv10.o decodev10.o modelv10.o mloopv10f.o
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CRISV32F_OBJS = crisv32f.o cpuv32.o decodev32.o modelv32.o mloopv32f.o
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SIM_OBJS = \
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$(SIM_NEW_COMMON_OBJS) \
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cgen-utils.o cgen-trace.o cgen-scache.o \
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cgen-run.o \
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sim-if.o arch.o \
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$(CRISV10F_OBJS) \
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$(CRISV32F_OBJS) \
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traps.o
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SIM_EXTRA_HW_DEVICES = rv cris cris_900000xx
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# Extra headers included by sim-main.h.
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# FIXME: $(srccom)/cgen-ops.h should be in CGEN_INCLUDE_DEPS.
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SIM_EXTRA_DEPS = \
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$(CGEN_INCLUDE_DEPS) $(srccom)/cgen-ops.h \
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arch.h cpuall.h cris-sim.h engv10.h engv32.h
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SIM_EXTRA_CLEAN = cris-clean
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## COMMON_POST_CONFIG_FRAG
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arch = cris
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# rvdummy is just used for testing. It does nothing if
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# --enable-sim-hardware isn't active.
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all: rvdummy$(EXEEXT)
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check: rvdummy$(EXEEXT)
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rvdummy$(EXEEXT): rvdummy.o $(EXTRA_LIBDEPS)
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$(CC) $(ALL_CFLAGS) -o rvdummy$(EXEEXT) rvdummy.o $(EXTRA_LIBS)
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rvdummy.o: rvdummy.c $(remote_sim_h) $(callback_h)
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# CRISV10 objs
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CRISV10F_INCLUDE_DEPS = \
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$(CGEN_MAIN_CPU_DEPS) \
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cpuv10.h decodev10.h engv10.h
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# CRISV32 objs
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CRISV32F_INCLUDE_DEPS = \
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$(CGEN_MAIN_CPU_DEPS) \
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cpuv32.h decodev32.h engv32.h
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cris-clean:
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-rm -f stamp-arch
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-rm -f tmp-*
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# Useful when making CGEN-generated files manually, without --enable-cgen-maint.
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stamps: stamp-arch stamp-v10fcpu stamp-v32fcpu
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stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/cris.cpu Makefile
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$(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=crisv10,crisv32 \
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archfile=$(CPU_DIR)/cris.cpu \
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FLAGS="with-scache with-profile=fn"
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$(SILENCE) touch $@
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arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
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# The sed-hack is supposed to be temporary, until we get CGEN to emit it.
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stamp-v10fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/cris.cpu Makefile
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$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
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archfile=$(CPU_DIR)/cris.cpu \
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cpu=crisv10f mach=crisv10 SUFFIX=v10 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
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$(SILENCE) $(SHELL) $(srcroot)/move-if-change $(srcdir)/semv10-switch.c $(srcdir)/semcrisv10f-switch.c
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$(SILENCE) touch $@
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cpuv10.h cpuv10.c semcrisv10f-switch.c modelv10.c decodev10.c decodev10.h: $(CGEN_MAINT) stamp-v10fcpu
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stamp-v32fcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/cris.cpu Makefile
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$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
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archfile=$(CPU_DIR)/cris.cpu \
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cpu=crisv32f mach=crisv32 SUFFIX=v32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
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$(SILENCE) $(SHELL) $(srcroot)/move-if-change $(srcdir)/semv32-switch.c $(srcdir)/semcrisv32f-switch.c
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$(SILENCE) touch $@
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cpuv32.h cpuv32.c semcrisv32f-switch.c modelv32.c decodev32.c decodev32.h: $(CGEN_MAINT) stamp-v32fcpu
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