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d414eb3e7f
This kills off another compile-time option by moving the setting to the individual arch runtimes. This will allow dynamic selection by the arch when doing a single build with multiple arches. The sim_model_init rework is a little funky. In the past it was disabled entirely if no default model was set. We maintain the spirit of the logic by gating the fallback logic on whether the port has defined any models.
244 lines
7.0 KiB
C
244 lines
7.0 KiB
C
/* Simulator pseudo baseclass.
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Copyright 1997-2021 Free Software Foundation, Inc.
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Contributed by Cygnus Support.
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This file is part of GDB, the GNU debugger.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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/* Simulator state pseudo baseclass.
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Each simulator is required to have the file ``sim-main.h''. That
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file includes ``sim-basics.h'', defines the base type ``sim_cia''
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(the data type that contains complete current instruction address
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information), include ``sim-base.h'':
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#include "sim-basics.h"
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/-* If `sim_cia' is not an integral value (e.g. a struct), define
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CIA_ADDR to return the integral value. *-/
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/-* typedef struct {...} sim_cia; *-/
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/-* #define CIA_ADDR(cia) (...) *-/
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#include "sim-base.h"
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finally, two data types `struct _sim_cpu' and `struct sim_state'
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are defined:
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struct _sim_cpu {
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... simulator specific members ...
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sim_cpu_base base;
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};
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If your sim needs to allocate sim-wide state, use STATE_ARCH_DATA. */
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#ifndef SIM_BASE_H
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#define SIM_BASE_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Pre-declare certain types. */
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/* typedef <target-dependant> sim_cia; */
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#ifndef NULL_CIA
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#define NULL_CIA ((sim_cia) 0)
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#endif
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/* Return the current instruction address as a number.
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Some targets treat the current instruction address as a struct
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(e.g. for delay slot handling). */
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#ifndef CIA_ADDR
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#define CIA_ADDR(cia) (cia)
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typedef address_word sim_cia;
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#endif
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#ifndef INVALID_INSTRUCTION_ADDRESS
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#define INVALID_INSTRUCTION_ADDRESS ((address_word)0 - 1)
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#endif
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/* TODO: Probably should just delete SIM_CPU. */
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typedef struct _sim_cpu SIM_CPU;
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typedef struct _sim_cpu sim_cpu;
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#include "sim-module.h"
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#include "sim-arange.h"
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#include "sim-trace.h"
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#include "sim-core.h"
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#include "sim-events.h"
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#include "sim-profile.h"
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#include "sim-model.h"
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#include "sim-io.h"
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#include "sim-engine.h"
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#include "sim-watch.h"
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#include "sim-memopt.h"
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#include "sim-cpu.h"
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#include "sim-assert.h"
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struct sim_state {
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/* All the cpus for this instance. */
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sim_cpu *cpu[MAX_NR_PROCESSORS];
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#if (WITH_SMP)
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# define STATE_CPU(sd, n) ((sd)->cpu[n])
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#else
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# define STATE_CPU(sd, n) ((sd)->cpu[0])
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#endif
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/* Simulator's argv[0]. */
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const char *my_name;
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#define STATE_MY_NAME(sd) ((sd)->my_name)
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/* Who opened the simulator. */
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SIM_OPEN_KIND open_kind;
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#define STATE_OPEN_KIND(sd) ((sd)->open_kind)
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/* The host callbacks. */
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struct host_callback_struct *callback;
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#define STATE_CALLBACK(sd) ((sd)->callback)
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/* The type of simulation environment (user/operating). */
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enum sim_environment environment;
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#define STATE_ENVIRONMENT(sd) ((sd)->environment)
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#if 0 /* FIXME: Not ready yet. */
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/* Stuff defined in sim-config.h. */
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struct sim_config config;
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#define STATE_CONFIG(sd) ((sd)->config)
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#endif
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/* List of installed module `init' handlers. */
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struct module_list *modules;
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#define STATE_MODULES(sd) ((sd)->modules)
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/* Supported options. */
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struct option_list *options;
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#define STATE_OPTIONS(sd) ((sd)->options)
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/* Non-zero if -v specified. */
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int verbose_p;
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#define STATE_VERBOSE_P(sd) ((sd)->verbose_p)
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/* Non cpu-specific trace data. See sim-trace.h. */
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TRACE_DATA trace_data;
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#define STATE_TRACE_DATA(sd) (& (sd)->trace_data)
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/* If non NULL, the BFD architecture specified on the command line */
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const struct bfd_arch_info *architecture;
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#define STATE_ARCHITECTURE(sd) ((sd)->architecture)
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/* If non NULL, the bfd target specified on the command line */
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const char *target;
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#define STATE_TARGET(sd) ((sd)->target)
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/* List of machs available. */
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const SIM_MACH * const *machs;
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#define STATE_MACHS(sd) ((sd)->machs)
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/* If non-NULL, the model to select for CPUs. */
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const char *model_name;
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#define STATE_MODEL_NAME(sd) ((sd)->model_name)
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/* In standalone simulator, this is the program's arguments passed
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on the command line. */
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char **prog_argv;
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#define STATE_PROG_ARGV(sd) ((sd)->prog_argv)
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/* The program's bfd. */
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struct bfd *prog_bfd;
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#define STATE_PROG_BFD(sd) ((sd)->prog_bfd)
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/* Symbol table for prog_bfd */
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struct bfd_symbol **prog_syms;
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#define STATE_PROG_SYMS(sd) ((sd)->prog_syms)
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/* Number of prog_syms symbols. */
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long prog_syms_count;
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#define STATE_PROG_SYMS_COUNT(sd) ((sd)->prog_syms_count)
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/* The program's text section. */
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struct bfd_section *text_section;
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/* Starting and ending text section addresses from the bfd. */
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bfd_vma text_start, text_end;
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#define STATE_TEXT_SECTION(sd) ((sd)->text_section)
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#define STATE_TEXT_START(sd) ((sd)->text_start)
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#define STATE_TEXT_END(sd) ((sd)->text_end)
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/* Start address, set when the program is loaded from the bfd. */
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bfd_vma start_addr;
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#define STATE_START_ADDR(sd) ((sd)->start_addr)
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/* Size of the simulator's cache, if any.
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This is not the target's cache. It is the cache the simulator uses
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to process instructions. */
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unsigned int scache_size;
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#define STATE_SCACHE_SIZE(sd) ((sd)->scache_size)
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/* core memory bus */
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#define STATE_CORE(sd) (&(sd)->core)
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sim_core core;
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/* Record of memory sections added via the memory-options interface. */
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#define STATE_MEMOPT(sd) ((sd)->memopt)
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sim_memopt *memopt;
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/* event handler */
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#define STATE_EVENTS(sd) (&(sd)->events)
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sim_events events;
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/* generic halt/resume engine */
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sim_engine engine;
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#define STATE_ENGINE(sd) (&(sd)->engine)
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/* generic watchpoint support */
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sim_watchpoints watchpoints;
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#define STATE_WATCHPOINTS(sd) (&(sd)->watchpoints)
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#if WITH_HW
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struct sim_hw *hw;
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#define STATE_HW(sd) ((sd)->hw)
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#endif
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/* Should image loads be performed using the LMA or VMA? Older
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simulators use the VMA while newer simulators prefer the LMA. */
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int load_at_lma_p;
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#define STATE_LOAD_AT_LMA_P(SD) ((SD)->load_at_lma_p)
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/* Pointer for sim target to store arbitrary state data. Normally the
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target should define a struct and use it here. */
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void *arch_data;
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#define STATE_ARCH_DATA(sd) ((sd)->arch_data)
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/* Marker for those wanting to do sanity checks.
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This should remain the last member of this struct to help catch
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miscompilation errors. */
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int magic;
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#define SIM_MAGIC_NUMBER 0x4242
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#define STATE_MAGIC(sd) ((sd)->magic)
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};
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/* Functions for allocating/freeing a sim_state. */
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SIM_DESC sim_state_alloc_extra (SIM_OPEN_KIND kind, host_callback *callback,
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size_t extra_bytes);
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#define sim_state_alloc(kind, callback) sim_state_alloc_extra(kind, callback, 0)
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void sim_state_free (SIM_DESC);
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#ifdef __cplusplus
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}
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#endif
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#endif /* SIM_BASE_H */
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