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binutils-gdb/sim
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Mike Frysinger 024120b6ee sim: sh: simplify testsuite a bit 
Switch from the centralized list in the exp file to each test declaring
its own requirements which they're already (mostly) doing.  This will
increase coverage slightly by running more tests in more configurations
since the hardcoded exp list was a little out of date.

We have to mark the psh* tests as shdsp only (to match what the exp
file was doing), mark the fsca & fsrra tests as failing (since they
weren't even being run by the exp file), and to fix the expected
output & status of the fail test.
2021-11-09 01:22:06 -05:00
..
aarch64 sim: rename ChangeLog files to ChangeLog-2021 2021-08-17 20:27:36 -04:00
arm sim: arm/bfin/rx: undefine page size from system headers 2021-11-06 20:40:20 -04:00
avr sim: rename ChangeLog files to ChangeLog-2021 2021-08-17 20:27:36 -04:00
bfin sim: arm/bfin/rx: undefine page size from system headers 2021-11-06 20:40:20 -04:00
bpf sim: hoist cgen mloop rules up to common builds 2021-11-02 22:59:07 -04:00
common sim: mloop: mark a few conditionally used funcs as unused 2021-11-03 01:19:43 -04:00
cr16 sim: hoist gencode & opc2c build rules up to common builds 2021-11-02 22:59:07 -04:00
cris sim: cris: clean up missing func prototype warnings 2021-11-08 22:48:55 -05:00
d10v sim: hoist gencode & opc2c build rules up to common builds 2021-11-02 22:59:07 -04:00
erc32 sim: erc32: reduce -Wno-error scope 2021-11-01 00:55:02 -04:00
example-synacor sim: rename ChangeLog files to ChangeLog-2021 2021-08-17 20:27:36 -04:00
frv sim: hoist cgen mloop rules up to common builds 2021-11-02 22:59:07 -04:00
ft32 sim: rename ChangeLog files to ChangeLog-2021 2021-08-17 20:27:36 -04:00
h8300 sim: rename ChangeLog files to ChangeLog-2021 2021-08-17 20:27:36 -04:00
igen sim: hoist mn10300 & v850 igen rules up to common builds 2021-11-02 22:59:07 -04:00
iq2000 sim: hoist cgen mloop rules up to common builds 2021-11-02 22:59:07 -04:00
lm32 sim: hoist cgen mloop rules up to common builds 2021-11-02 22:59:07 -04:00
m4 sim: bfin: add support for SDL2 2021-09-13 22:45:19 -04:00
m32c sim: hoist gencode & opc2c build rules up to common builds 2021-11-02 22:59:07 -04:00
m32r sim: hoist cgen mloop rules up to common builds 2021-11-02 22:59:07 -04:00
m68hc11 sim: hoist gencode & opc2c build rules up to common builds 2021-11-02 22:59:07 -04:00
mcore sim: rename ChangeLog files to ChangeLog-2021 2021-08-17 20:27:36 -04:00
microblaze sim: microblaze: replace custom basic types with common ones 2021-09-08 21:32:34 -04:00
mips sim: mips: use sim_fpu_to{32,64}u to fix build warnings 2021-11-06 12:19:58 -04:00
mn10300 sim: hoist mn10300 & v850 igen rules up to common builds 2021-11-02 22:59:07 -04:00
moxie sim: rename ChangeLog files to ChangeLog-2021 2021-08-17 20:27:36 -04:00
msp430 sim: drop unused targ-vals.h includes 2021-10-31 04:53:22 -04:00
or1k sim: hoist cgen mloop rules up to common builds 2021-11-02 22:59:07 -04:00
ppc sim: ppc: switch to libiberty environ.h 2021-11-06 20:35:52 -04:00
pru sim: rename ChangeLog files to ChangeLog-2021 2021-08-17 20:27:36 -04:00
riscv sim: drop unused targ-vals.h includes 2021-10-31 04:53:22 -04:00
rl78 sim: rl78: drop obsolete manual dependency rules 2021-10-31 05:09:09 -04:00
rx sim: arm/bfin/rx: undefine page size from system headers 2021-11-06 20:40:20 -04:00
sh sim: sh: fix conversion of PC to an integer 2021-11-06 21:09:08 -04:00
testsuite sim: sh: simplify testsuite a bit 2021-11-09 01:22:06 -05:00
v850 sim: hoist mn10300 & v850 igen rules up to common builds 2021-11-02 22:59:07 -04:00
.gitignore sim: rename ChangeLog files to ChangeLog-2021 2021-08-17 20:27:36 -04:00
aclocal.m4 sim: unify reserved instruction bits settings 2021-07-01 20:53:00 -04:00
arch-subdir.mk.in sim: ppc: fallback when ln is not available [PR sim/18864] 2021-10-03 11:36:30 -04:00
ChangeLog-2021 sim: rename ChangeLog files to ChangeLog-2021 2021-08-17 20:27:36 -04:00
config.h.in sim: bfin: add support for SDL2 2021-09-13 22:45:19 -04:00
configure sim: add arch-specific conditional logic 2021-10-31 02:03:16 -04:00
configure.ac sim: add arch-specific conditional logic 2021-10-31 02:03:16 -04:00
COPYING sim: clarify license text via COPYING file 2021-11-06 01:44:06 -04:00
MAINTAINERS gdb/sim: update my email address 2021-11-02 09:20:24 +00:00
Makefile.am sim: hoist cgen mloop rules up to common builds 2021-11-02 22:59:07 -04:00
Makefile.in sim: hoist cgen mloop rules up to common builds 2021-11-02 22:59:07 -04:00
README-HACKING sim: hw: rework configure option & device selection 2021-06-21 21:36:51 -04:00