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1368b914e9
Now that all port tests live under testsuite/sim/*/, and none live in testsuite/ directly, flatten the structure by moving all of the dirs under testsuite/sim/ to testsuite/ directly. We need to stop passing --tool to dejagnu so that it searches all dirs and not just ones that start with "sim". Since we have no other dirs in this tree, and no plans to add any, should be fine.
56 lines
1.3 KiB
ArmAsm
56 lines
1.3 KiB
ArmAsm
# Test that unsigned widening multiplication of 32-bit operands to produce a
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# 64-bit result is simulated correctly, when using 32-bit or F5series hardware
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# multiply functionality.
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# 0xffff fffc * 0x2 = 0x1 ffff fff8
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# mach: msp430
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# 32-bit hwmult register addresses
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.set MPY32L, 0x0140
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.set MPY32H, 0x0142
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.set OP2L, 0x0150
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.set OP2H, 0x0152
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.set RES0, 0x0154
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.set RES1, 0x0156
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.set RES2, 0x0158
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.set RES3, 0x015A
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# F5series hwmult register addresses
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.set MPY32L_F5, 0x04D0
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.set MPY32H_F5, 0x04D2
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.set OP2L_F5, 0x04E0
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.set OP2H_F5, 0x04E2
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.set RES0_F5, 0x04E4
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.set RES1_F5, 0x04E6
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.set RES2_F5, 0x04E8
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.set RES3_F5, 0x04EA
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.include "testutils.inc"
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start
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; Test 32bit hwmult
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MOV.W #2, &MPY32L ; Load operand 1 Low into multiplier
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MOV.W #0, &MPY32H ; Load operand 1 High into multiplier
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MOV.W #-4, &OP2L ; Load operand 2 Low into multiplier
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MOV.W #-1, &OP2H ; Load operand 2 High, trigger MPY
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CMP.W #-8, &RES0 { JNE .L5
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CMP.W #-1, &RES1 { JNE .L5
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CMP.W #1, &RES2 { JNE .L5
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CMP.W #0, &RES3 { JNE .L5
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; Test f5series hwmult
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MOV.W #2, &MPY32L_F5
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MOV.W #0, &MPY32H_F5
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MOV.W #-4, &OP2L_F5
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MOV.W #-1, &OP2H_F5
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CMP.W #-8, &RES0_F5 { JNE .L5
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CMP.W #-1, &RES1_F5 { JNE .L5
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CMP.W #1, &RES2_F5 { JNE .L5
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CMP.W #0, &RES3_F5 { JEQ .L6
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.L5:
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fail
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.L6:
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pass
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