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1368b914e9
Now that all port tests live under testsuite/sim/*/, and none live in testsuite/ directly, flatten the structure by moving all of the dirs under testsuite/sim/ to testsuite/ directly. We need to stop passing --tool to dejagnu so that it searches all dirs and not just ones that start with "sim". Since we have no other dirs in this tree, and no plans to add any, should be fine.
168 lines
3.1 KiB
Plaintext
168 lines
3.1 KiB
Plaintext
# mach: crisv32
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.include "testutils.inc"
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; Check for various non-arithmetic insns that C and V are not affected
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; on v32 (where they were on v10), as the generic tests don't cover
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; that; they are cleared before testing.
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; First, a macro testing that VC are unaffected, not counting previous
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; register contents.
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.macro nonvc0 insn op
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move.d $r0,$r3
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setf vc
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.ifnc \insn,swapnwbr
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\insn \op,$r3
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.else
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\insn $r3
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.endif
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bcc 9f
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nop
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bvc 9f
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nop
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move.d $r0,$r3
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clearf vc
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.ifnc \insn,swapnwbr
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\insn \op,$r3
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.else
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\insn $r3
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.endif
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bcs 9f
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nop
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bvc 8f
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nop
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9:
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fail
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8:
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.endm
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; Use the above, but initialize the non-parameter operand to a value.
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.macro nonvc1 insn val op
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move.d \val,$r0
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nonvc0 \insn,\op
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.endm
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; Use the above, iterating over various values.
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.macro nonvc2 insn op
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.irp p,0,1,2,31,32,63,64,127,128,255,256,32767,32768,65535,65536,0x7fffffff,0x80000000
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nonvc1 \insn,\p,\op
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nonvc1 \insn,-\p,\op
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.endr
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.endm
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.macro nonvc2q insn op min=-63 max=63
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.if (\op >= \min) && (\op <= \max)
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nonvc2 \insn,\op
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.endif
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.endm
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; The above, for each .b .w .d insn variant.
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.macro nonvcbwd insn op
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.irp s,.b,.w,.d
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nonvc2 \insn\s,\op
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.endr
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.endm
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; For various insns with register, dword constant and memory operands.
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.macro nonvcitermcd op=[$r4]
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nonvc2 and.d,\op
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nonvc2 move.d,\op
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nonvc2 or.d,\op
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.endm
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; Similar, for various insns with register, word constant and memory operands.
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.macro nonvcitermcw op=[$r4]
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nonvcitermcd \op
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nonvc2 and.w,\op
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nonvc2 move.w,\op
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nonvc2 or.w,\op
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nonvc2 movs.w,\op
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nonvc2 movu.w,\op
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.endm
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; Similar, for various insns with register, byte constant and memory operands.
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.macro nonvcitermcb op=[$r4]
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nonvcitermcw \op
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nonvc2 and.b,\op
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nonvc2 move.b,\op
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nonvc2 or.b,\op
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nonvc2 movs.b,\op
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nonvc2 movu.b,\op
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.endm
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; Similar, for insns with quick constant operands.
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.macro nonvciterq op
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nonvcitermcb \op
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nonvc2 bound.b,\op
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nonvc2q andq,\op,min=-32,max=31
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nonvc2q asrq,\op,min=0,max=31
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nonvc2q lsrq,\op,min=0,max=31
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nonvc2q orq,\op,min=-32,max=31
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nonvc2q moveq,\op,min=-32,max=31
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.endm
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; Similar, for insns with register operands.
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.macro nonvciterr op
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nonvcitermcb \op
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nonvcbwd bound,\op
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nonvc2 abs,\op
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nonvcbwd asr,\op
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nonvc2 dstep,\op
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nonvcbwd lsr,\op
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nonvcbwd lsl,\op
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nonvc2 lz,\op
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nonvc2 swapnwbr
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nonvc2 xor,\op
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.endm
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; Test all applicable constant, register and memory variants of a value.
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.macro tst op
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; Constants
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.if (\op <= 31) && (\op >= -32)
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nonvciterq \op
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.elseif (\op <= 255) && (\op >= -128)
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nonvcitermcb \op
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nonvcbwd bound,\op
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.elseif (\op <= 65535) && (\op >= -32767)
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nonvcitermcw \op
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nonvc2 bound.w,\op
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nonvc2 bound.d,\op
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.else
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nonvcitermcd \op
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nonvc2 bound.d,\op
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.endif
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; Registers
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move.d \op,$r4
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nonvciterr $r4
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; Memory
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nonvcitermcb [$r5]
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addq 4,$r5
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.section .rodata
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.dword \op
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.previous
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.endm
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; As above but negation too.
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.macro tstpm op
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tst \op
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tst -\op
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.endm
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; Set up for the actual test.
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start
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move.d c0,$r5
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.section .rodata
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c0:
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.previous
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; Finally, test.
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.irp x,0,1,2,31,32,63,64,127,128,255,256,32767,32768,65535,65536,0x7fffffff,0x80000000
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tstpm \x
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.endr
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pass
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