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2e7e5e2890
sim/aarch64/ * simulator.c (do_vec_ADDV): Mov val declaration inside each case, with type set to input type size. (do_vec_xtl): Change bias from 3 to 4 for byte case. sim/testsuite/sim/aarch64/ * bit.s: Change cmp immediates to account for addv bug fix. * cmtst.s, ldn_single.s, stn_single.s: Likewise. * xtl.s: New. |
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.. | ||
common | ||
config | ||
d10v-elf | ||
frv-elf | ||
lib | ||
m32r-elf | ||
mips64el-elf | ||
sim | ||
.gitignore | ||
ChangeLog | ||
configure | ||
configure.ac | ||
Makefile.in |