mirror of
https://sourceware.org/git/binutils-gdb.git
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2be64de603
ld/testsuite/ld-loongarch-elf * ld-loongarch-elf.exp: Test LoongArch32 and LoongArch64 testcases respectively. * jmp_op.d: Fix bug in test LoongArch32. * disas-jirl-32.d: New test case for LoongArch32. * disas-jirl-32.s: New test case for LoongArch32. * disas-jirl.d: Skip test case LoongArch32. * macro_op_32.d: New test case for LoongArch32. * macro_op_32.s: New test case for LoongArch32. * macro_op.d: Skip test case LoongArch32.
69 lines
3.4 KiB
D
69 lines
3.4 KiB
D
#as:
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#objdump: -dr
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.*:[ ]+file format .*
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Disassembly of section .text:
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0+0 <.text>:
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[ ]+0:[ ]+03400000 [ ]+andi[ ]+[ ]+\$zero, \$zero, 0x0
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[ ]+4:[ ]+60000004 [ ]+bgtz[ ]+[ ]+\$a0, 0[ ]+# 0x4
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[ ]+[ ]+[ ]+4: R_LARCH_SOP_PUSH_PCREL[ ]+L1
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[ ]+[ ]+[ ]+4: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\*
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[ ]+8:[ ]+64000080 [ ]+bgez[ ]+[ ]+\$a0, 0[ ]+# 0x8
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[ ]+[ ]+[ ]+8: R_LARCH_SOP_PUSH_PCREL[ ]+L1
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[ ]+[ ]+[ ]+8: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\*
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[ ]+c:[ ]+64000004 [ ]+blez[ ]+[ ]+\$a0, 0[ ]+# 0xc
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[ ]+[ ]+[ ]+c: R_LARCH_SOP_PUSH_PCREL[ ]+L1
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[ ]+[ ]+[ ]+c: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\*
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[ ]+10:[ ]+40000080 [ ]+beqz[ ]+[ ]+\$a0, 0[ ]+# 0x10
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[ ]+[ ]+[ ]+10: R_LARCH_SOP_PUSH_PCREL[ ]+L1
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[ ]+[ ]+[ ]+10: R_LARCH_SOP_POP_32_S_0_5_10_16_S2[ ]+\*ABS\*
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[ ]+14:[ ]+44000080 [ ]+bnez[ ]+[ ]+\$a0, 0[ ]+# 0x14
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[ ]+[ ]+[ ]+14: R_LARCH_SOP_PUSH_PCREL[ ]+L1
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[ ]+[ ]+[ ]+14: R_LARCH_SOP_POP_32_S_0_5_10_16_S2[ ]+\*ABS\*
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[ ]+18:[ ]+48000000 [ ]+bceqz[ ]+[ ]+\$fcc0, 0[ ]+# 0x18
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[ ]+[ ]+[ ]+18: R_LARCH_SOP_PUSH_PCREL[ ]+L1
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[ ]+[ ]+[ ]+18: R_LARCH_SOP_POP_32_S_0_5_10_16_S2[ ]+\*ABS\*
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[ ]+1c:[ ]+48000100 [ ]+bcnez[ ]+[ ]+\$fcc0, 0[ ]+# 0x1c
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[ ]+[ ]+[ ]+1c: R_LARCH_SOP_PUSH_PCREL[ ]+L1
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[ ]+[ ]+[ ]+1c: R_LARCH_SOP_POP_32_S_0_5_10_16_S2[ ]+\*ABS\*
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[ ]+20:[ ]+4c000080 [ ]+jirl[ ]+[ ]+\$zero, \$a0, 0
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[ ]+24:[ ]+50000000 [ ]+b[ ]+[ ]+0[ ]+# 0x24
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[ ]+[ ]+[ ]+24: R_LARCH_SOP_PUSH_PCREL[ ]+L1
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[ ]+[ ]+[ ]+24: R_LARCH_SOP_POP_32_S_0_10_10_16_S2[ ]+\*ABS\*
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[ ]+28:[ ]+54000000 [ ]+bl[ ]+[ ]+0[ ]+# 0x28
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[ ]+[ ]+[ ]+28: R_LARCH_SOP_PUSH_PCREL[ ]+L1
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[ ]+[ ]+[ ]+28: R_LARCH_SOP_POP_32_S_0_10_10_16_S2[ ]+\*ABS\*
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[ ]+2c:[ ]+58000085 [ ]+beq[ ]+[ ]+\$a0, \$a1, 0[ ]+# 0x2c
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[ ]+[ ]+[ ]+2c: R_LARCH_SOP_PUSH_PCREL[ ]+L1
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[ ]+[ ]+[ ]+2c: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\*
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[ ]+30:[ ]+5c000085 [ ]+bne[ ]+[ ]+\$a0, \$a1, 0[ ]+# 0x30
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[ ]+[ ]+[ ]+30: R_LARCH_SOP_PUSH_PCREL[ ]+L1
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[ ]+[ ]+[ ]+30: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\*
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[ ]+34:[ ]+60000085 [ ]+blt[ ]+[ ]+\$a0, \$a1, 0[ ]+# 0x34
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[ ]+[ ]+[ ]+34: R_LARCH_SOP_PUSH_PCREL[ ]+L1
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[ ]+[ ]+[ ]+34: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\*
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[ ]+38:[ ]+600000a4 [ ]+blt[ ]+[ ]+\$a1, \$a0, 0[ ]+# 0x38
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[ ]+[ ]+[ ]+38: R_LARCH_SOP_PUSH_PCREL[ ]+L1
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[ ]+[ ]+[ ]+38: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\*
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[ ]+3c:[ ]+64000085 [ ]+bge[ ]+[ ]+\$a0, \$a1, 0[ ]+# 0x3c
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[ ]+[ ]+[ ]+3c: R_LARCH_SOP_PUSH_PCREL[ ]+L1
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[ ]+[ ]+[ ]+3c: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\*
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[ ]+40:[ ]+640000a4 [ ]+bge[ ]+[ ]+\$a1, \$a0, 0[ ]+# 0x40
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[ ]+[ ]+[ ]+40: R_LARCH_SOP_PUSH_PCREL[ ]+L1
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[ ]+[ ]+[ ]+40: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\*
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[ ]+44:[ ]+68000085 [ ]+bltu[ ]+[ ]+\$a0, \$a1, 0[ ]+# 0x44
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[ ]+[ ]+[ ]+44: R_LARCH_SOP_PUSH_PCREL[ ]+L1
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[ ]+[ ]+[ ]+44: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\*
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[ ]+48:[ ]+680000a4 [ ]+bltu[ ]+[ ]+\$a1, \$a0, 0[ ]+# 0x48
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[ ]+[ ]+[ ]+48: R_LARCH_SOP_PUSH_PCREL[ ]+L1
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[ ]+[ ]+[ ]+48: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\*
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[ ]+4c:[ ]+6c000085 [ ]+bgeu[ ]+[ ]+\$a0, \$a1, 0[ ]+# 0x4c
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[ ]+[ ]+[ ]+4c: R_LARCH_SOP_PUSH_PCREL[ ]+L1
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[ ]+[ ]+[ ]+4c: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\*
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[ ]+50:[ ]+6c0000a4 [ ]+bgeu[ ]+[ ]+\$a1, \$a0, 0[ ]+# 0x50
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[ ]+[ ]+[ ]+50: R_LARCH_SOP_PUSH_PCREL[ ]+L1
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[ ]+[ ]+[ ]+50: R_LARCH_SOP_POP_32_S_10_16_S2[ ]+\*ABS\*
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