mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-12-03 04:12:10 +08:00
56be38147c
(struct target_ops): Add REGCACHE parameter to to_fetch_registers and to_store_registers target operations. (target_fetch_registers, target_store_registers): Update. * regcache.c (regcache_raw_read): Replace register_cached by regcache_valid_p. Pass regcache to target_fetch_registers. (regcache_raw_write): Pass regcache to target_store_registers. * arm-linux-nat.c (store_fpregister, store_fpregs, store_register, store_regs, store_wmmx_regs): Replace register_cached by regcache_valid_p. * bsd-kvm.c (bsd_kvm_open, bsd_kvm_proc_cmd): Pass current_regcache to target_fetch_registers calls. * corelow.c (core_open): Likewise. * linux-nat.c (linux_nat_corefile_thread_callback): Likewise. * proc-service.c (ps_lgetregs, ps_lsetregs, ps_lgetfpregs, ps_lsetfpregs): Likewise. * sol-thread.c (ps_lgetregs, ps_lsetregs, ps_lgetfpregs, ps_lsetfpregs): Likewise. * win32-nat.c (win32_resume): Likewise. * ia64-tdep.c (ia64_store_return_value): Pass current_regcache to target_store_registers call. * rs6000-tdep.c (rs6000_push_dummy_call): Likewise. * inferior.h (store_inferior_registers): Update prototype. (fetch_inferior_registers): Likewise. * gnu-nat.c (gnu_store_registers, gnu_fetch_registers): Likewise. * mips-linux-nat.c (super_fetch_registers, super_store_registers): Update function pointer signatures. * aix-thread.c (aix_thread_fetch_registers): Add REGCACHE parameter, use it instead of current_regcache, update calls. (aix_thread_store_registers): Likewise. * alphabsd-nat.c (alphabsd_fetch_inferior_registers): Likewise. (alphabsd_store_inferior_registers): Likewise. * amd64bsd-nat.c (amd64bsd_fetch_inferior_registers): Likewise. (amd64bsd_store_inferior_registers): Likewise. * amd64-linux-nat.c (amd64_linux_fetch_inferior_registers): Likewise. (amd64_linux_store_inferior_registers): Likewise. * arm-linux-nat.c (fetch_fpregister, fetch_fpregs, store_fpregister, store_fpregs, fetch_register, fetch_regs, store_register, store_regs, fetch_wmmx_regs, store_wmmx_regs): Likewise. (arm_linux_fetch_inferior_registers): Likewise. (arm_linux_store_inferior_registers): Likewise. * armnbsd-nat.c (fetch_register, fetch_regs, fetch_fp_register, fetch_fp_regs, armnbsd_fetch_registers): Likewise. (store_register, store_regs, store_fp_register, store_fp_regs, armnbsd_store_registers): Likewise. * bsd-kvm.c (bsd_kvm_fetch_pcb, bsd_kvm_fetch_registers): Likewise. * bsd-uthread.c (bsd_uthread_fetch_registers): Likewise. (bsd_uthread_store_registers): Likewise. * corelow.c (get_core_registers): Likewise. * go32-nat.c (fetch_register, go32_fetch_registers, store_register, go32_store_registers): Likewise. * hppabsd-nat.c (hppabsd_fetch_registers): Likewise. (hppabsd_store_registers): Likewise. * hppa-hpux-nat.c (hppa_hpux_fetch_register): Likewise. (hppa_hpux_fetch_inferior_registers): Likewise. (hppa_hpux_store_register): Likewise. (hppa_hpux_store_inferior_registers): Likewise. * hppa-linux-nat.c (fetch_register, store_register): Likewise. (hppa_linux_fetch_inferior_registers): Likewise. (hppa_linux_store_inferior_registers): Likewise. * hpux-thread.c (hpux_thread_fetch_registers): Likewise. (hpux_thread_store_registers): Likewise. * i386bsd-nat.c (i386bsd_fetch_inferior_registers): Likewise. (i386bsd_store_inferior_registers): Likewise. * i386gnu-nat.c (fetch_fpregs, gnu_fetch_registers, store_fpregs, gnu_store_registers): Likewise. * i386-linux-nat.c (fetch_register, store_register, fetch_regs, store_regs, fetch_fpregs, store_fpregs, fetch_fpxregs, store_fpxregs): Likewise. (i386_linux_fetch_inferior_registers): Likewise. (i386_linux_store_inferior_registers): Likewise. * ia64-linux-nat.c (ia64_linux_fetch_register): Likewise. (ia64_linux_fetch_registers): Likewise. (ia64_linux_store_register): Likewise. (ia64_linux_store_registers): Likewise. * inf-child.c (inf_child_fetch_inferior_registers): Likewise. (inf_child_store_inferior_registers): Likewise. * inf-ptrace.c (inf_ptrace_fetch_register): Likewise. (inf_ptrace_fetch_registers): Likewise. (inf_ptrace_store_register): Likewise. (inf_ptrace_store_registers): Likewise. * infptrace.c (fetch_register, store_register): Likewise. (fetch_inferior_registers, store_inferior_registers): Likewise. * m32r-linux-nat.c (fetch_regs, store_regs): Likewise. (m32r_linux_fetch_inferior_registers): Likewise. (m32r_linux_store_inferior_registers): Likewise. * m68kbsd-nat.c (m68kbsd_fetch_inferior_registers): Likewise. (m68kbsd_store_inferior_registers): Likewise. * m68klinux-nat.c (fetch_register, old_fetch_inferior_registers, store_register, old_store_inferior_registers, fetch_regs, store_regs, fetch_fpregs, store_fpregs): Likewise. (m68k_linux_fetch_inferior_registers): Likewise. (m68k_linux_store_inferior_registers): Likewise. * m88kbsd-nat.c (m88kbsd_fetch_inferior_registers): Likewise. (m88kbsd_store_inferior_registers): Likewise. * mips64obsd-nat.c (mips64obsd_fetch_inferior_registers): Likewise. (mips64obsd_store_inferior_registers): Likewise. * mips-linux-nat.c (mips64_linux_regsets_fetch_registers): Likewise. (mips64_linux_regsets_store_registers): Likewise. (mips64_linux_fetch_registers): Likewise. (mips64_linux_store_registers): Likewise. * mipsnbsd-nat.c (mipsnbsd_fetch_inferior_registers): Likewise. (mipsnbsd_store_inferior_registers): Likewise. * monitor.c (monitor_fetch_register, monitor_store_register): Likewise. (monitor_fetch_registers, monitor_store_registers): Likewise. * nto-procfs.c (procfs_fetch_registers): Likewise. (procfs_store_registers): Likewise. * ppc-linux-nat.c (fetch_altivec_register, fetch_spe_register, fetch_register, supply_vrregset, fetch_altivec_registers, fetch_ppc_registers, ppc_linux_fetch_inferior_registers): Likewise. (store_altivec_register, store_spe_register, store_register, fill_vrregset, store_altivec_registers, store_ppc_registers, ppc_linux_store_inferior_registers): Likewise. * ppcnbsd-nat.c (ppcnbsd_fetch_inferior_registers): Likewise. (ppcnbsd_store_inferior_registers): Likewise. * ppcobsd-nat.c (ppcobsd_fetch_registers): Likewise. (ppcobsd_store_registers): Likewise. * procfs.c (procfs_fetch_registers, procfs_store_registers): Likewise. * remote.c (fetch_register_using_p, process_g_packet, fetch_registers_using_g, remote_fetch_registers): Likewise. (store_register_using_P, store_registers_using_G, remote_store_registers): Likewise. * remote-m32r-sdi.c (m32r_fetch_registers, m32r_fetch_register, m32r_store_register, m32r_store_register): Likewise. * remote-mips.c (mips_fetch_registers, mips_store_registers): Likewise. * remote-sim.c (gdbsim_fetch_register): Likewise. (gdbsim_store_register): Likewise. * rs6000-nat.c (fetch_register, store_register): Likewise. (rs6000_fetch_inferior_registers): Likewise. (rs6000_store_inferior_registers): Likewise. * s390-nat.c (fetch_regs, store_regs): Likewise. (fetch_fpregs, store_fpregs): Likewise. (s390_linux_fetch_inferior_registers): Likewise. (s390_linux_store_inferior_registers): Likewise. * shnbsd-nat.c (shnbsd_fetch_inferior_registers): Likewise. (shnbsd_store_inferior_registers): Likewise. * sol-thread.c (sol_thread_fetch_registers): Likewise. (sol_thread_store_registers): Likewise. * sparc-nat.c (fetch_inferior_registers): Likewise. (store_inferior_registers): Likewise. * spu-linux-nat.c (spu_fetch_inferior_registers): Likewise. (spu_store_inferior_registers): Likewise. * target.c (debug_print_register): Likewise. (debug_to_fetch_registers, debug_to_store_registers): Likewise. * vaxbsd-nat.c (vaxbsd_fetch_inferior_registers): Likewise. (vaxbsd_store_inferior_registers): Likewise. * win32-nat.c (do_win32_fetch_inferior_registers): Likewise. (win32_fetch_inferior_registers): Likewise. (win32_store_inferior_registers): Likewise.
500 lines
12 KiB
C
500 lines
12 KiB
C
/* Native-dependent code for BSD Unix running on ARM's, for GDB.
|
|
|
|
Copyright (C) 1988, 1989, 1991, 1992, 1994, 1996, 1999, 2002, 2004, 2007
|
|
Free Software Foundation, Inc.
|
|
|
|
This file is part of GDB.
|
|
|
|
This program is free software; you can redistribute it and/or modify
|
|
it under the terms of the GNU General Public License as published by
|
|
the Free Software Foundation; either version 2 of the License, or
|
|
(at your option) any later version.
|
|
|
|
This program is distributed in the hope that it will be useful,
|
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
GNU General Public License for more details.
|
|
|
|
You should have received a copy of the GNU General Public License
|
|
along with this program; if not, write to the Free Software
|
|
Foundation, Inc., 51 Franklin Street, Fifth Floor,
|
|
Boston, MA 02110-1301, USA. */
|
|
|
|
#include "defs.h"
|
|
#include "gdbcore.h"
|
|
#include "inferior.h"
|
|
#include "regcache.h"
|
|
#include "target.h"
|
|
|
|
#include "gdb_string.h"
|
|
#include <sys/types.h>
|
|
#include <sys/ptrace.h>
|
|
#include <machine/reg.h>
|
|
#include <machine/frame.h>
|
|
|
|
#include "arm-tdep.h"
|
|
#include "inf-ptrace.h"
|
|
|
|
extern int arm_apcs_32;
|
|
|
|
static void
|
|
arm_supply_gregset (struct regcache *regcache, struct reg *gregset)
|
|
{
|
|
int regno;
|
|
CORE_ADDR r_pc;
|
|
|
|
/* Integer registers. */
|
|
for (regno = ARM_A1_REGNUM; regno < ARM_SP_REGNUM; regno++)
|
|
regcache_raw_supply (regcache, regno, (char *) &gregset->r[regno]);
|
|
|
|
regcache_raw_supply (regcache, ARM_SP_REGNUM,
|
|
(char *) &gregset->r_sp);
|
|
regcache_raw_supply (regcache, ARM_LR_REGNUM,
|
|
(char *) &gregset->r_lr);
|
|
/* This is ok: we're running native... */
|
|
r_pc = ADDR_BITS_REMOVE (gregset->r_pc);
|
|
regcache_raw_supply (regcache, ARM_PC_REGNUM, (char *) &r_pc);
|
|
|
|
if (arm_apcs_32)
|
|
regcache_raw_supply (regcache, ARM_PS_REGNUM,
|
|
(char *) &gregset->r_cpsr);
|
|
else
|
|
regcache_raw_supply (regcache, ARM_PS_REGNUM,
|
|
(char *) &gregset->r_pc);
|
|
}
|
|
|
|
static void
|
|
arm_supply_fparegset (struct regcache *regcache, struct fpreg *fparegset)
|
|
{
|
|
int regno;
|
|
|
|
for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
|
|
regcache_raw_supply (regcache, regno,
|
|
(char *) &fparegset->fpr[regno - ARM_F0_REGNUM]);
|
|
|
|
regcache_raw_supply (regcache, ARM_FPS_REGNUM,
|
|
(char *) &fparegset->fpr_fpsr);
|
|
}
|
|
|
|
static void
|
|
fetch_register (struct regcache *regcache, int regno)
|
|
{
|
|
struct reg inferior_registers;
|
|
int ret;
|
|
|
|
ret = ptrace (PT_GETREGS, PIDGET (inferior_ptid),
|
|
(PTRACE_TYPE_ARG3) &inferior_registers, 0);
|
|
|
|
if (ret < 0)
|
|
{
|
|
warning (_("unable to fetch general register"));
|
|
return;
|
|
}
|
|
|
|
switch (regno)
|
|
{
|
|
case ARM_SP_REGNUM:
|
|
regcache_raw_supply (regcache, ARM_SP_REGNUM,
|
|
(char *) &inferior_registers.r_sp);
|
|
break;
|
|
|
|
case ARM_LR_REGNUM:
|
|
regcache_raw_supply (regcache, ARM_LR_REGNUM,
|
|
(char *) &inferior_registers.r_lr);
|
|
break;
|
|
|
|
case ARM_PC_REGNUM:
|
|
/* This is ok: we're running native... */
|
|
inferior_registers.r_pc = ADDR_BITS_REMOVE (inferior_registers.r_pc);
|
|
regcache_raw_supply (regcache, ARM_PC_REGNUM,
|
|
(char *) &inferior_registers.r_pc);
|
|
break;
|
|
|
|
case ARM_PS_REGNUM:
|
|
if (arm_apcs_32)
|
|
regcache_raw_supply (regcache, ARM_PS_REGNUM,
|
|
(char *) &inferior_registers.r_cpsr);
|
|
else
|
|
regcache_raw_supply (regcache, ARM_PS_REGNUM,
|
|
(char *) &inferior_registers.r_pc);
|
|
break;
|
|
|
|
default:
|
|
regcache_raw_supply (regcache, regno,
|
|
(char *) &inferior_registers.r[regno]);
|
|
break;
|
|
}
|
|
}
|
|
|
|
static void
|
|
fetch_regs (struct regcache *regcache)
|
|
{
|
|
struct reg inferior_registers;
|
|
int ret;
|
|
int regno;
|
|
|
|
ret = ptrace (PT_GETREGS, PIDGET (inferior_ptid),
|
|
(PTRACE_TYPE_ARG3) &inferior_registers, 0);
|
|
|
|
if (ret < 0)
|
|
{
|
|
warning (_("unable to fetch general registers"));
|
|
return;
|
|
}
|
|
|
|
arm_supply_gregset (regcache, &inferior_registers);
|
|
}
|
|
|
|
static void
|
|
fetch_fp_register (struct regcache *regcache, int regno)
|
|
{
|
|
struct fpreg inferior_fp_registers;
|
|
int ret;
|
|
|
|
ret = ptrace (PT_GETFPREGS, PIDGET (inferior_ptid),
|
|
(PTRACE_TYPE_ARG3) &inferior_fp_registers, 0);
|
|
|
|
if (ret < 0)
|
|
{
|
|
warning (_("unable to fetch floating-point register"));
|
|
return;
|
|
}
|
|
|
|
switch (regno)
|
|
{
|
|
case ARM_FPS_REGNUM:
|
|
regcache_raw_supply (regcache, ARM_FPS_REGNUM,
|
|
(char *) &inferior_fp_registers.fpr_fpsr);
|
|
break;
|
|
|
|
default:
|
|
regcache_raw_supply (regcache, regno,
|
|
(char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]);
|
|
break;
|
|
}
|
|
}
|
|
|
|
static void
|
|
fetch_fp_regs (struct regcache *regcache)
|
|
{
|
|
struct fpreg inferior_fp_registers;
|
|
int ret;
|
|
int regno;
|
|
|
|
ret = ptrace (PT_GETFPREGS, PIDGET (inferior_ptid),
|
|
(PTRACE_TYPE_ARG3) &inferior_fp_registers, 0);
|
|
|
|
if (ret < 0)
|
|
{
|
|
warning (_("unable to fetch general registers"));
|
|
return;
|
|
}
|
|
|
|
arm_supply_fparegset (regcache, &inferior_fp_registers);
|
|
}
|
|
|
|
static void
|
|
armnbsd_fetch_registers (struct regcache *regcache, int regno)
|
|
{
|
|
if (regno >= 0)
|
|
{
|
|
if (regno < ARM_F0_REGNUM || regno > ARM_FPS_REGNUM)
|
|
fetch_register (regcache, regno);
|
|
else
|
|
fetch_fp_register (regcache, regno);
|
|
}
|
|
else
|
|
{
|
|
fetch_regs (regcache);
|
|
fetch_fp_regs (regcache);
|
|
}
|
|
}
|
|
|
|
|
|
static void
|
|
store_register (const struct regcache *regcache, int regno)
|
|
{
|
|
struct reg inferior_registers;
|
|
int ret;
|
|
|
|
ret = ptrace (PT_GETREGS, PIDGET (inferior_ptid),
|
|
(PTRACE_TYPE_ARG3) &inferior_registers, 0);
|
|
|
|
if (ret < 0)
|
|
{
|
|
warning (_("unable to fetch general registers"));
|
|
return;
|
|
}
|
|
|
|
switch (regno)
|
|
{
|
|
case ARM_SP_REGNUM:
|
|
regcache_raw_collect (regcache, ARM_SP_REGNUM,
|
|
(char *) &inferior_registers.r_sp);
|
|
break;
|
|
|
|
case ARM_LR_REGNUM:
|
|
regcache_raw_collect (regcache, ARM_LR_REGNUM,
|
|
(char *) &inferior_registers.r_lr);
|
|
break;
|
|
|
|
case ARM_PC_REGNUM:
|
|
if (arm_apcs_32)
|
|
regcache_raw_collect (regcache, ARM_PC_REGNUM,
|
|
(char *) &inferior_registers.r_pc);
|
|
else
|
|
{
|
|
unsigned pc_val;
|
|
|
|
regcache_raw_collect (regcache, ARM_PC_REGNUM,
|
|
(char *) &pc_val);
|
|
|
|
pc_val = ADDR_BITS_REMOVE (pc_val);
|
|
inferior_registers.r_pc
|
|
^= ADDR_BITS_REMOVE (inferior_registers.r_pc);
|
|
inferior_registers.r_pc |= pc_val;
|
|
}
|
|
break;
|
|
|
|
case ARM_PS_REGNUM:
|
|
if (arm_apcs_32)
|
|
regcache_raw_collect (regcache, ARM_PS_REGNUM,
|
|
(char *) &inferior_registers.r_cpsr);
|
|
else
|
|
{
|
|
unsigned psr_val;
|
|
|
|
regcache_raw_collect (regcache, ARM_PS_REGNUM,
|
|
(char *) &psr_val);
|
|
|
|
psr_val ^= ADDR_BITS_REMOVE (psr_val);
|
|
inferior_registers.r_pc = ADDR_BITS_REMOVE (inferior_registers.r_pc);
|
|
inferior_registers.r_pc |= psr_val;
|
|
}
|
|
break;
|
|
|
|
default:
|
|
regcache_raw_collect (regcache, regno,
|
|
(char *) &inferior_registers.r[regno]);
|
|
break;
|
|
}
|
|
|
|
ret = ptrace (PT_SETREGS, PIDGET (inferior_ptid),
|
|
(PTRACE_TYPE_ARG3) &inferior_registers, 0);
|
|
|
|
if (ret < 0)
|
|
warning (_("unable to write register %d to inferior"), regno);
|
|
}
|
|
|
|
static void
|
|
store_regs (const struct regcache *regcache)
|
|
{
|
|
struct reg inferior_registers;
|
|
int ret;
|
|
int regno;
|
|
|
|
|
|
for (regno = ARM_A1_REGNUM; regno < ARM_SP_REGNUM; regno++)
|
|
regcache_raw_collect (regcache, regno,
|
|
(char *) &inferior_registers.r[regno]);
|
|
|
|
regcache_raw_collect (regcache, ARM_SP_REGNUM,
|
|
(char *) &inferior_registers.r_sp);
|
|
regcache_raw_collect (regcache, ARM_LR_REGNUM,
|
|
(char *) &inferior_registers.r_lr);
|
|
|
|
if (arm_apcs_32)
|
|
{
|
|
regcache_raw_collect (regcache, ARM_PC_REGNUM,
|
|
(char *) &inferior_registers.r_pc);
|
|
regcache_raw_collect (regcache, ARM_PS_REGNUM,
|
|
(char *) &inferior_registers.r_cpsr);
|
|
}
|
|
else
|
|
{
|
|
unsigned pc_val;
|
|
unsigned psr_val;
|
|
|
|
regcache_raw_collect (regcache, ARM_PC_REGNUM,
|
|
(char *) &pc_val);
|
|
regcache_raw_collect (regcache, ARM_PS_REGNUM,
|
|
(char *) &psr_val);
|
|
|
|
pc_val = ADDR_BITS_REMOVE (pc_val);
|
|
psr_val ^= ADDR_BITS_REMOVE (psr_val);
|
|
|
|
inferior_registers.r_pc = pc_val | psr_val;
|
|
}
|
|
|
|
ret = ptrace (PT_SETREGS, PIDGET (inferior_ptid),
|
|
(PTRACE_TYPE_ARG3) &inferior_registers, 0);
|
|
|
|
if (ret < 0)
|
|
warning (_("unable to store general registers"));
|
|
}
|
|
|
|
static void
|
|
store_fp_register (const struct regcache *regcache, int regno)
|
|
{
|
|
struct fpreg inferior_fp_registers;
|
|
int ret;
|
|
|
|
ret = ptrace (PT_GETFPREGS, PIDGET (inferior_ptid),
|
|
(PTRACE_TYPE_ARG3) &inferior_fp_registers, 0);
|
|
|
|
if (ret < 0)
|
|
{
|
|
warning (_("unable to fetch floating-point registers"));
|
|
return;
|
|
}
|
|
|
|
switch (regno)
|
|
{
|
|
case ARM_FPS_REGNUM:
|
|
regcache_raw_collect (regcache, ARM_FPS_REGNUM,
|
|
(char *) &inferior_fp_registers.fpr_fpsr);
|
|
break;
|
|
|
|
default:
|
|
regcache_raw_collect (regcache, regno,
|
|
(char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]);
|
|
break;
|
|
}
|
|
|
|
ret = ptrace (PT_SETFPREGS, PIDGET (inferior_ptid),
|
|
(PTRACE_TYPE_ARG3) &inferior_fp_registers, 0);
|
|
|
|
if (ret < 0)
|
|
warning (_("unable to write register %d to inferior"), regno);
|
|
}
|
|
|
|
static void
|
|
store_fp_regs (const struct regcache *regcache)
|
|
{
|
|
struct fpreg inferior_fp_registers;
|
|
int ret;
|
|
int regno;
|
|
|
|
|
|
for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
|
|
regcache_raw_collect (regcache, regno,
|
|
(char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]);
|
|
|
|
regcache_raw_collect (regcache, ARM_FPS_REGNUM,
|
|
(char *) &inferior_fp_registers.fpr_fpsr);
|
|
|
|
ret = ptrace (PT_SETFPREGS, PIDGET (inferior_ptid),
|
|
(PTRACE_TYPE_ARG3) &inferior_fp_registers, 0);
|
|
|
|
if (ret < 0)
|
|
warning (_("unable to store floating-point registers"));
|
|
}
|
|
|
|
static void
|
|
armnbsd_store_registers (struct regcache *regcache, int regno)
|
|
{
|
|
if (regno >= 0)
|
|
{
|
|
if (regno < ARM_F0_REGNUM || regno > ARM_FPS_REGNUM)
|
|
store_register (regcache, regno);
|
|
else
|
|
store_fp_register (regcache, regno);
|
|
}
|
|
else
|
|
{
|
|
store_regs (regcache);
|
|
store_fp_regs (regcache);
|
|
}
|
|
}
|
|
|
|
struct md_core
|
|
{
|
|
struct reg intreg;
|
|
struct fpreg freg;
|
|
};
|
|
|
|
static void
|
|
fetch_core_registers (struct regcache *regcache,
|
|
char *core_reg_sect, unsigned core_reg_size,
|
|
int which, CORE_ADDR ignore)
|
|
{
|
|
struct md_core *core_reg = (struct md_core *) core_reg_sect;
|
|
int regno;
|
|
CORE_ADDR r_pc;
|
|
|
|
arm_supply_gregset (regcache, &core_reg->intreg);
|
|
arm_supply_fparegset (regcache, &core_reg->freg);
|
|
}
|
|
|
|
static void
|
|
fetch_elfcore_registers (struct regcache *regcache,
|
|
char *core_reg_sect, unsigned core_reg_size,
|
|
int which, CORE_ADDR ignore)
|
|
{
|
|
struct reg gregset;
|
|
struct fpreg fparegset;
|
|
|
|
switch (which)
|
|
{
|
|
case 0: /* Integer registers. */
|
|
if (core_reg_size != sizeof (struct reg))
|
|
warning (_("wrong size of register set in core file"));
|
|
else
|
|
{
|
|
/* The memcpy may be unnecessary, but we can't really be sure
|
|
of the alignment of the data in the core file. */
|
|
memcpy (&gregset, core_reg_sect, sizeof (gregset));
|
|
arm_supply_gregset (regcache, &gregset);
|
|
}
|
|
break;
|
|
|
|
case 2:
|
|
if (core_reg_size != sizeof (struct fpreg))
|
|
warning (_("wrong size of FPA register set in core file"));
|
|
else
|
|
{
|
|
/* The memcpy may be unnecessary, but we can't really be sure
|
|
of the alignment of the data in the core file. */
|
|
memcpy (&fparegset, core_reg_sect, sizeof (fparegset));
|
|
arm_supply_fparegset (regcache, &fparegset);
|
|
}
|
|
break;
|
|
|
|
default:
|
|
/* Don't know what kind of register request this is; just ignore it. */
|
|
break;
|
|
}
|
|
}
|
|
|
|
static struct core_fns arm_netbsd_core_fns =
|
|
{
|
|
bfd_target_unknown_flavour, /* core_flovour. */
|
|
default_check_format, /* check_format. */
|
|
default_core_sniffer, /* core_sniffer. */
|
|
fetch_core_registers, /* core_read_registers. */
|
|
NULL
|
|
};
|
|
|
|
static struct core_fns arm_netbsd_elfcore_fns =
|
|
{
|
|
bfd_target_elf_flavour, /* core_flovour. */
|
|
default_check_format, /* check_format. */
|
|
default_core_sniffer, /* core_sniffer. */
|
|
fetch_elfcore_registers, /* core_read_registers. */
|
|
NULL
|
|
};
|
|
|
|
void
|
|
_initialize_arm_netbsd_nat (void)
|
|
{
|
|
struct target_ops *t;
|
|
|
|
t = inf_ptrace_target ();
|
|
t->to_fetch_registers = armnbsd_fetch_registers;
|
|
t->to_store_registers = armnbsd_store_registers;
|
|
add_target (t);
|
|
|
|
deprecated_add_core_fns (&arm_netbsd_core_fns);
|
|
deprecated_add_core_fns (&arm_netbsd_elfcore_fns);
|
|
}
|