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This commit brings all the changes made by running gdb/copyright.py as per GDB's Start of New Year Procedure. For the avoidance of doubt, all changes in this commits were performed by the script.
330 lines
7.7 KiB
C
330 lines
7.7 KiB
C
/* eBPF simulator support code
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Copyright (C) 2020-2022 Free Software Foundation, Inc.
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This file is part of GDB, the GNU debugger.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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/* This must come before any other includes. */
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#include "defs.h"
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#define WANT_CPU_BPFBF
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#define WANT_CPU bpfbf
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#include "sim-main.h"
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#include "sim-fpu.h"
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#include "sim-signal.h"
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#include "cgen-mem.h"
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#include "cgen-ops.h"
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#include "cpuall.h"
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#include "decode.h"
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#include "decode-be.h"
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#include "decode-le.h"
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#include "defs-le.h" /* For SCACHE */
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#include "bpf-helpers.h"
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uint64_t skb_data_offset;
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IDESC *bpf_idesc_le;
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IDESC *bpf_idesc_be;
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int
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bpfbf_fetch_register (SIM_CPU *current_cpu,
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int rn,
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unsigned char *buf,
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int len)
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{
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if (rn == 11)
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SETTDI (buf, CPU_PC_GET (current_cpu));
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else if (0 <= rn && rn < 10)
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SETTDI (buf, GET_H_GPR (rn));
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else
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return 0;
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return len;
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}
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int
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bpfbf_store_register (SIM_CPU *current_cpu,
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int rn,
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unsigned char *buf,
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int len)
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{
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if (rn == 11)
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CPU_PC_SET (current_cpu, GETTDI (buf));
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else if (0 <= rn && rn < 10)
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SET_H_GPR (rn, GETTDI (buf));
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else
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return 0;
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return len;
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}
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void
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bpfbf_model_insn_before (SIM_CPU *current_cpu, int first_p)
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{
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/* XXX */
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}
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void
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bpfbf_model_insn_after (SIM_CPU *current_cpu, int first_p, int cycles)
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{
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/* XXX */
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}
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/***** Instruction helpers. *****/
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/* The semantic routines for most instructions are expressed in RTL in
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the cpu/bpf.cpu file, and automatically translated to C in the
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sem-*.c files in this directory.
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However, some of the semantic routines make use of helper C
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functions. This happens when the semantics of the instructions
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can't be expressed in RTL alone in a satisfactory way, or not at
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all.
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The following functions implement these C helpers. */
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DI
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bpfbf_endle (SIM_CPU *current_cpu, DI value, UINT bitsize)
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{
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switch (bitsize)
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{
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case 16: return endian_h2le_2(endian_t2h_2(value));
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case 32: return endian_h2le_4(endian_t2h_4(value));
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case 64: return endian_h2le_8(endian_t2h_8(value));
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default: assert(0);
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}
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return value;
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}
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DI
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bpfbf_endbe (SIM_CPU *current_cpu, DI value, UINT bitsize)
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{
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switch (bitsize)
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{
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case 16: return endian_h2be_2(endian_t2h_2(value));
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case 32: return endian_h2be_4(endian_t2h_4(value));
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case 64: return endian_h2be_8(endian_t2h_8(value));
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default: assert(0);
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}
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return value;
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}
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DI
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bpfbf_skb_data_offset (SIM_CPU *current_cpu)
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{
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/* Simply return the user-configured value.
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This will be 0 if it has not been set. */
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return skb_data_offset;
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}
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VOID
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bpfbf_call (SIM_CPU *current_cpu, INT disp32, UINT src)
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{
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/* eBPF supports two kind of CALL instructions: the so called pseudo
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calls ("bpf to bpf") and external calls ("bpf to helper").
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Both kind of calls use the same instruction (CALL). However,
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external calls are constructed by passing a constant argument to
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the instruction, that identifies the helper, whereas pseudo calls
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result from expressions involving symbols.
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We distinguish calls from pseudo-calls with the later having a 1
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stored in the SRC field of the instruction. */
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if (src == 1)
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{
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/* This is a pseudo-call. */
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/* XXX allocate a new stack frame and transfer control. For
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that we need to analyze the target function, like the kernel
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verifier does. We better populate a cache
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(function_start_address -> frame_size) so we avoid
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calculating this more than once. */
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/* XXX note that disp32 is PC-relative in number of 64-bit
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words, _minus one_. */
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}
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else
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{
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/* This is a call to a helper.
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DISP32 contains the helper number. Dispatch to the
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corresponding helper emulator in bpf-helpers.c. */
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switch (disp32) {
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/* case TRACE_PRINTK: */
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case 7:
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bpf_trace_printk (current_cpu);
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break;
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default:;
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}
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}
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}
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VOID
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bpfbf_exit (SIM_CPU *current_cpu)
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{
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SIM_DESC sd = CPU_STATE (current_cpu);
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/* r0 holds "return code" */
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DI r0 = GET_H_GPR (0);
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printf ("exit %" PRId64 " (0x%" PRIx64 ")\n", r0, r0);
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sim_engine_halt (sd, current_cpu, NULL, CPU_PC_GET (current_cpu),
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sim_exited, 0 /* sigrc */);
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}
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VOID
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bpfbf_breakpoint (SIM_CPU *current_cpu)
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{
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SIM_DESC sd = CPU_STATE (current_cpu);
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sim_engine_halt (sd, current_cpu, NULL, CPU_PC_GET (current_cpu),
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sim_stopped, SIM_SIGTRAP);
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}
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/* We use the definitions below instead of the cgen-generated model.c,
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because the later is not really able to work with cpus featuring
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several ISAs. This should be fixed in CGEN. */
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static void
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bpf_def_model_init (SIM_CPU *cpu)
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{
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/* Do nothing. */
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}
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static void
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bpfbf_prepare_run (SIM_CPU *cpu)
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{
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/* Nothing. */
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}
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static void
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bpf_engine_run_full (SIM_CPU *cpu)
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{
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if (CURRENT_TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE)
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{
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if (!bpf_idesc_le)
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{
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bpfbf_ebpfle_init_idesc_table (cpu);
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bpf_idesc_le = CPU_IDESC (cpu);
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}
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else
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CPU_IDESC (cpu) = bpf_idesc_le;
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bpfbf_ebpfle_engine_run_full (cpu);
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}
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else
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{
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if (!bpf_idesc_be)
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{
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bpfbf_ebpfbe_init_idesc_table (cpu);
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bpf_idesc_be = CPU_IDESC (cpu);
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}
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else
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CPU_IDESC (cpu) = bpf_idesc_be;
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bpfbf_ebpfbe_engine_run_full (cpu);
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}
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}
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#if WITH_FAST
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void
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bpf_engine_run_fast (SIM_CPU *cpu)
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{
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if (CURRENT_TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE)
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{
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if (!bpf_idesc_le)
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{
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bpfbf_ebpfle_init_idesc_table (cpu);
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bpf_idesc_le = CPU_IDESC (cpu);
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}
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else
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CPU_IDESC (cpu) = bpf_idesc_le;
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bpfbf_ebpfle_engine_run_fast (cpu);
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}
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else
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{
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if (!bpf_idesc_be)
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{
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bpfbf_ebpfbe_init_idesc_table (cpu);
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bpf_idesc_be = CPU_IDESC (cpu);
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}
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else
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CPU_IDESC (cpu) = bpf_idesc_be;
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bpfbf_ebpfbe_engine_run_fast (cpu);
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}
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}
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#endif /* WITH_FAST */
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static const CGEN_INSN *
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bpfbf_get_idata (SIM_CPU *cpu, int inum)
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{
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return CPU_IDESC (cpu) [inum].idata;
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}
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static void
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bpf_init_cpu (SIM_CPU *cpu)
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{
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CPU_REG_FETCH (cpu) = bpfbf_fetch_register;
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CPU_REG_STORE (cpu) = bpfbf_store_register;
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CPU_PC_FETCH (cpu) = bpfbf_h_pc_get;
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CPU_PC_STORE (cpu) = bpfbf_h_pc_set;
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CPU_GET_IDATA (cpu) = bpfbf_get_idata;
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/* Only used by profiling. 0 disables it. */
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CPU_MAX_INSNS (cpu) = 0;
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CPU_INSN_NAME (cpu) = cgen_insn_name;
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CPU_FULL_ENGINE_FN (cpu) = bpf_engine_run_full;
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#if WITH_FAST
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CPU_FAST_ENGINE_FN (cpu) = bpf_engine_run_fast;
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#else
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CPU_FAST_ENGINE_FN (cpu) = bpf_engine_run_full;
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#endif
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}
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static const SIM_MODEL bpf_models[] =
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{
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{ "bpf-def", & bpf_mach, MODEL_BPF_DEF, NULL, bpf_def_model_init },
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{ 0 }
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};
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static const SIM_MACH_IMP_PROPERTIES bpfbf_imp_properties =
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{
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sizeof (SIM_CPU),
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#if WITH_SCACHE
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sizeof (SCACHE)
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#else
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0
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#endif
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};
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const SIM_MACH bpf_mach =
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{
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"bpf", "bpf", MACH_BPF,
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32, 32, & bpf_models[0], & bpfbf_imp_properties,
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bpf_init_cpu,
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bpfbf_prepare_run
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};
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