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c3f72de4f5
This adds some annotation to Power10 pcrel instructions, displaying the target address (ie. pc + D34 field) plus a symbol if there is one at exactly that target address. pld from the .got or .plt will also look up the entry and display it, symbolically if there is a dynamic relocation on the entry. include/ * dis-asm.h (struct disassemble_info): Add dynrelbuf and dynrelcount. binutils/ * objdump.c (struct objdump_disasm_info): Delete dynrelbuf and dynrelcount. (find_symbol_for_address): Adjust for dynrelbuf and dynrelcount move. (disassemble_section, disassemble_data): Likewise. opcodes/ * ppc-dis.c (struct dis_private): Add "special". (POWERPC_DIALECT): Delete. Replace uses with.. (private_data): ..this. New inline function. (disassemble_init_powerpc): Init "special" names. (skip_optional_operands): Add is_pcrel arg, set when detecting R field of prefix instructions. (bsearch_reloc, print_got_plt): New functions. (print_insn_powerpc): For pcrel instructions, print target address and symbol if known, and decode plt and got loads too. gas/ * testsuite/gas/ppc/prefix-pcrel.d: Update expected output. * testsuite/gas/ppc/prefix-reloc.d: Likewise. * gas/testsuite/gas/ppc/vsx_32byte.d: Likewise. ld/ * testsuite/ld-powerpc/inlinepcrel-1.d: Update expected output. * testsuite/ld-powerpc/inlinepcrel-2.d: Likewise. * testsuite/ld-powerpc/notoc2.d: Likewise. * testsuite/ld-powerpc/notoc3.d: Likewise. * testsuite/ld-powerpc/pcrelopt.d: Likewise. * testsuite/ld-powerpc/startstop.d: Likewise. * testsuite/ld-powerpc/tlsget.d: Likewise. * testsuite/ld-powerpc/tlsget2.d: Likewise. * testsuite/ld-powerpc/tlsld.d: Likewise. * testsuite/ld-powerpc/weak1.d: Likewise. * testsuite/ld-powerpc/weak1so.d: Likewise.
91 lines
3.4 KiB
Makefile
91 lines
3.4 KiB
Makefile
#source: tlsget.s
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#as: -a64 -mpower10
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#ld: -shared --plt-align=0 tlsdll.so
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#objdump: -dr
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#target: powerpc64*-*-*
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.*: file format .*
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Disassembly of section \.text:
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.* <.*\.plt_call\.__tls_get_addr_opt.*>:
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.*: (e8 03 00 00|00 00 03 e8) ld r0,0\(r3\)
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.*: (e9 83 00 08|08 00 83 e9) ld r12,8\(r3\)
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.*: (2c 20 00 00|00 00 20 2c) cmpdi r0,0
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.*: (7c 60 1b 78|78 1b 60 7c) mr r0,r3
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.*: (7c 6c 6a 14|14 6a 6c 7c) add r3,r12,r13
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.*: (4d 82 00 20|20 00 82 4d) beqlr
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.*: (7c 03 03 78|78 03 03 7c) mr r3,r0
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.*: (60 00 00 00|00 00 00 60) nop
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.*: (04 10 .. ..|.. .. 10 04) pld r12,.*
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.*: (e5 80 .. ..|.. .. 80 e5)
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.*: (7d 89 03 a6|a6 03 89 7d) mtctr r12
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.*: (4e 80 04 20|20 04 80 4e) bctr
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.*: (e8 03 00 00|00 00 03 e8) ld r0,0\(r3\)
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.*: (e9 83 00 08|08 00 83 e9) ld r12,8\(r3\)
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.*: (2c 20 00 00|00 00 20 2c) cmpdi r0,0
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.*: (7c 60 1b 78|78 1b 60 7c) mr r0,r3
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.*: (7c 6c 6a 14|14 6a 6c 7c) add r3,r12,r13
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.*: (4d 82 00 20|20 00 82 4d) beqlr
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.*: (7c 03 03 78|78 03 03 7c) mr r3,r0
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.*: (7c 08 02 a6|a6 02 08 7c) mflr r0
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.*: (f8 01 00 08|08 00 01 f8) std r0,8\(r1\)
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.*: (f8 41 00 18|18 00 41 f8) std r2,24\(r1\)
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.*: (e9 82 .. ..|.. .. 82 e9) ld r12,.*\(r2\)
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.*: (7d 89 03 a6|a6 03 89 7d) mtctr r12
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.*: (4e 80 04 21|21 04 80 4e) bctrl
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.*: (e8 41 00 18|18 00 41 e8) ld r2,24\(r1\)
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.*: (e8 01 00 08|08 00 01 e8) ld r0,8\(r1\)
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.*: (7c 08 03 a6|a6 03 08 7c) mtlr r0
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.*: (4e 80 00 20|20 00 80 4e) blr
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.* <.*\.plt_call\..*>:
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.*: (60 00 00 00|00 00 00 60) nop
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.*: (04 10 .. ..|.. .. 10 04) pld r12,.*
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.*: (e5 80 .. ..|.. .. 80 e5)
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.*: (7d 89 03 a6|a6 03 89 7d) mtctr r12
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.*: (4e 80 04 20|20 04 80 4e) bctr
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.*: (f8 41 00 18|18 00 41 f8) std r2,24\(r1\)
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.*: (e9 82 .. ..|.. .. 82 e9) ld r12,.*\(r2\)
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.*: (7d 89 03 a6|a6 03 89 7d) mtctr r12
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.*: (4e 80 04 20|20 04 80 4e) bctr
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#...
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.* <_start>:
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.*: (06 10 .. ..|.. .. 10 06) pla r3,.*
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.*: (38 60 .. ..|.. .. 60 38)
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.*: (4b ff .. ..|.. .. ff 4b) bl .* <.*\.plt_call\.__tls_get_addr_opt[^\+]*>
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.*: (60 00 00 00|00 00 00 60) nop
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.*: (38 62 .. ..|.. .. 62 38) addi r3,r2,.*
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.*: (4b ff .. ..|.. .. ff 4b) bl .* <.*\.plt_call\.__tls_get_addr_opt.*\+0x30>
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.*: (60 00 00 00|00 00 00 60) nop
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.*: (4b ff .. ..|.. .. ff 4b) bl .* <.*\.plt_call\..*:[^\+]*>
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.*: (4b ff .. ..|.. .. ff 4b) bl .* <.*.plt_call\..*:.*\+0x14>
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.*: (e8 41 00 18|18 00 41 e8) ld r2,24\(r1\)
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.* <fun>:
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.*: (06 10 00 00|00 00 10 06) pla r3,8.*
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.*: (38 60 00 08|08 00 60 38)
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.*: (4e 80 00 20|20 00 80 4e) blr
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.*: (60 00 00 00|00 00 00 60) nop
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.*: (00 00 00 00|90 02 01 00) .*
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.*: (00 01 02 90|00 00 00 00) .*
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.* <__glink_PLTresolve>:
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.*: (7c 08 02 a6|a6 02 08 7c) mflr r0
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.*: (42 9f 00 05|05 00 9f 42) bcl 20,4\*cr7\+so,.* <__glink_PLTresolve\+0x8>
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.*: (7d 68 02 a6|a6 02 68 7d) mflr r11
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.*: (7c 08 03 a6|a6 03 08 7c) mtlr r0
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.*: (e8 0b ff f0|f0 ff 0b e8) ld r0,-16\(r11\)
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.*: (7d 8b 60 50|50 60 8b 7d) subf r12,r11,r12
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.*: (7d 60 5a 14|14 5a 60 7d) add r11,r0,r11
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.*: (38 0c ff d4|d4 ff 0c 38) addi r0,r12,-44
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.*: (e9 8b 00 00|00 00 8b e9) ld r12,0\(r11\)
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.*: (78 00 f0 82|82 f0 00 78) rldicl r0,r0,62,2
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.*: (7d 89 03 a6|a6 03 89 7d) mtctr r12
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.*: (e9 6b 00 08|08 00 6b e9) ld r11,8\(r11\)
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.*: (4e 80 04 20|20 04 80 4e) bctr
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.* <__tls_get_addr_opt@plt>:
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.*: (4b ff .. ..|.. .. ff 4b) b .* <__glink_PLTresolve>
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