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01f9f808e2
This patch adds support for the Intel(R) Advanced Vector Extensions 512 (Intel(R) AVX-512) registers. Native and remote debugging are covered by this patch. Intel(R) AVX-512 is an extension to AVX to support 512-bit wide SIMD registers in 64-bit mode (XMM0-XMM31, YMM0-YMM31, ZMM0-ZMM31). The number of available registers in 32-bit mode is still 8 (XMM0-7, YMM0-7, ZMM0-7). The lower 256-bits of the ZMM registers are aliased to the respective 256-bit YMM registers. The lower 128-bits are aliased to the respective 128-bit XMM registers. There are also 8 new, dedicated mask registers (K0-K7) in both 32-bit mode and 64-bit mode. For more information please see Intel(R) Developer Zone: Intel(R) AVX http://software.intel.com/en-us/intel-isa-extensions#pid-16007-1495 Intel(R) Architecture Instruction Set Extensions Programming Reference: http://software.intel.com/en-us/file/319433-017pdf 2014-04-24 Michael Sturm <michael.sturm@mintel.com> Walfred Tedeschi <walfred.tedeschi@intel.com> * amd64-linux-nat.c (amd64_linux_gregset32_reg_offset): Add AVX512 registers. (amd64_linux_read_description): Add code to handle AVX512 xstate mask and return respective tdesc. * amd64-linux-tdep.c: Include features/i386/amd64-avx512-linux.c and features/i386/x32-avx512-linux.c. (amd64_linux_gregset_reg_offset): Add AVX512 registers. (amd64_linux_core_read_description): Add code to handle AVX512 xstate mask and return respective tdesc. (_initialize_amd64_linux_tdep): Initialize AVX512 tdesc. * amd64-linux-tdep.h (AMD64_LINUX_ORIG_RAX_REGNUM): Adjust regnum calculation. (AMD64_LINUX_NUM_REGS): Adjust to new number of registers. (tdesc_amd64_avx512_linux): New prototype. (tdesc_x32_avx512_linux): Likewise. * amd64-tdep.c: Include features/i386/amd64-avx512.c and features/i386/x32-avx512.c. (amd64_ymm_avx512_names): New register names for pseudo registers YMM16-31. (amd64_ymmh_avx512_names): New register names for raw registers YMMH16-31. (amd64_k_names): New register names for K registers. (amd64_zmmh_names): New register names for ZMM raw registers. (amd64_zmm_names): New registers names for ZMM pseudo registers. (amd64_xmm_avx512_names): New register names for XMM16-31 registers. (amd64_pseudo_register_name): Add code to return AVX512 pseudo registers. (amd64_init_abi): Add code to intitialize AVX512 tdep variables if feature is present. (_initialize_amd64_tdep): Call AVX512 tdesc initializers. * amd64-tdep.h (enum amd64_regnum): Add AVX512 registers. (AMD64_NUM_REGS): Adjust to new number of registers. * i386-linux-nat.c (GETXSTATEREGS_SUPPLIES): Extend range of registers supplied via XSTATE by AVX512 registers. (i386_linux_read_description): Add case for AVX512. * i386-linux-tdep.c: Include i386-avx512-linux.c. (i386_linux_gregset_reg_offset): Add AVX512 registers. (i386_linux_core_read_description): Add case for AVX512. (i386_linux_init_abi): Install supported register note section for AVX512. (_initialize_i386_linux_tdep): Add call to tdesc init function for AVX512. * i386-linux-tdep.h (I386_LINUX_NUM_REGS): Set number of registers to be number of zmm7h + 1. (tdesc_i386_avx512_linux): Add tdesc for AVX512 registers. * i386-tdep.c: Include features/i386/i386-avx512.c. (i386_zmm_names): Add ZMM pseudo register names array. (i386_zmmh_names): Add ZMM raw register names array. (i386_k_names): Add K raw register names array. (num_lower_zmm_regs): Add constant for the number of lower ZMM registers. AVX512 has 16 more ZMM registers than there are YMM registers. (i386_zmmh_regnum_p): Add function to look up register number of ZMM raw registers. (i386_zmm_regnum_p): Likewise for ZMM pseudo registers. (i386_k_regnum_p): Likewise for K raw registers. (i386_ymmh_avx512_regnum_p): Likewise for additional YMM raw registers added by AVX512. (i386_ymm_avx512_regnum_p): Likewise for additional YMM pseudo registers added by AVX512. (i386_xmm_avx512_regnum_p): Likewise for additional XMM registers added by AVX512. (i386_register_name): Add code to hide YMMH16-31 and ZMMH0-31. (i386_pseudo_register_name): Add ZMM pseudo registers. (i386_zmm_type): Construct and return vector registers type for ZMM registers. (i386_pseudo_register_type): Return appropriate type for YMM16-31, ZMM0-31 pseudo registers and K registers. (i386_pseudo_register_read_into_value): Add code to read K, ZMM and YMM16-31 registers from register cache. (i386_pseudo_register_write): Add code to write K, ZMM and YMM16-31 registers. (i386_register_reggroup_p): Add code to include/exclude AVX512 registers in/from respective register groups. (i386_validate_tdesc_p): Handle AVX512 feature, add AVX512 registers if feature is present in xcr0. (i386_gdbarch_init): Add code to initialize AVX512 feature variables in tdep structure, wire in pseudo registers and call initialize_tdesc_i386_avx512. * i386-tdep.h (struct gdbarch_tdep): Add AVX512 related variables. (i386_regnum): Add AVX512 registers. (I386_SSE_NUM_REGS): New define for number of SSE registers. (I386_AVX_NUM_REGS): Likewise for AVX registers. (I386_AVX512_NUM_REGS): Likewise for AVX512 registers. (I386_MAX_REGISTER_SIZE): Change to 64 bytes, ZMM registers are 512 bits wide. (i386_xmm_avx512_regnum_p): New prototype for register look up. (i386_ymm_avx512_regnum_p): Likewise. (i386_k_regnum_p): Likewise. (i386_zmm_regnum_p): Likewise. (i386_zmmh_regnum_p): Likewise. * i387-tdep.c : Update year in copyright notice. (xsave_ymm_avx512_offset): New table for YMM16-31 offsets in XSAVE buffer. (XSAVE_YMM_AVX512_ADDR): New macro. (xsave_xmm_avx512_offset): New table for XMM16-31 offsets in XSAVE buffer. (XSAVE_XMM_AVX512_ADDR): New macro. (xsave_avx512_k_offset): New table for K register offsets in XSAVE buffer. (XSAVE_AVX512_K_ADDR): New macro. (xsave_avx512_zmm_h_offset): New table for ZMM register offsets in XSAVE buffer. (XSAVE_AVX512_ZMM_H_ADDR): New macro. (i387_supply_xsave): Add code to supply AVX512 registers to XSAVE buffer. (i387_collect_xsave): Add code to collect AVX512 registers from XSAVE buffer. * i387-tdep.h (I387_NUM_XMM_AVX512_REGS): New define for number of XMM16-31 registers. (I387_NUM_K_REGS): New define for number of K registers. (I387_K0_REGNUM): New define for K0 register number. (I387_NUM_ZMMH_REGS): New define for number of ZMMH registers. (I387_ZMM0H_REGNUM): New define for ZMM0H register number. (I387_NUM_YMM_AVX512_REGS): New define for number of YMM16-31 registers. (I387_YMM16H_REGNUM): New define for YMM16H register number. (I387_XMM16_REGNUM): New define for XMM16 register number. (I387_YMM0_REGNUM): New define for YMM0 register number. (I387_KEND_REGNUM): New define for last K register number. (I387_ZMMENDH_REGNUM): New define for last ZMMH register number. (I387_YMMH_AVX512_END_REGNUM): New define for YMM31 register number. (I387_XMM_AVX512_END_REGNUM): New define for XMM31 register number. * common/i386-xstate.h: Add AVX 3.1 feature bits, mask and XSTATE size. * features/Makefile: Add AVX512 related files. * features/i386/32bit-avx512.xml: New file. * features/i386/64bit-avx512.xml: Likewise. * features/i386/amd64-avx512-linux.c: Likewise. * features/i386/amd64-avx512-linux.xml: Likewise. * features/i386/amd64-avx512.c: Likewise. * features/i386/amd64-avx512.xml: Likewise. * features/i386/i386-avx512-linux.c: Likewise. * features/i386/i386-avx512-linux.xml: Likewise. * features/i386/i386-avx512.c: Likewise. * features/i386/i386-avx512.xml: Likewise. * features/i386/x32-avx512-linux.c: Likewise. * features/i386/x32-avx512-linux.xml: Likewise. * features/i386/x32-avx512.c: Likewise. * features/i386/x32-avx512.xml: Likewise. * regformats/i386/amd64-avx512-linux.dat: New file. * regformats/i386/amd64-avx512.dat: Likewise. * regformats/i386/i386-avx512-linux.dat: Likewise. * regformats/i386/i386-avx512.dat: Likewise. * regformats/i386/x32-avx512-linux.dat: Likewise. * regformats/i386/x32-avx512.dat: Likewise. * NEWS: Add note about new support for AVX512. testsuite/ * Makefile.in (EXECUTABLES): Added i386-avx512. * gdb.arch/i386-avx512.c: New file. * gdb.arch/i386-avx512.exp: Likewise. gdbserver/ * Makefile.in: Added rules to handle new files i386-avx512.c i386-avx512-linux.c amd64-avx512.c amd64-avx512-linux.c x32-avx512.c x32-avx512-linux.c. * configure.srv (srv_i386_regobj): Add i386-avx512.o. (srv_i386_linux_regobj): Add i386-avx512-linux.o. (srv_amd64_regobj): Add amd64-avx512.o and x32-avx512.o. (srv_amd64_linux_regobj): Add amd64-avx512-linux.o and x32-avx512-linux.o. (srv_i386_32bit_xmlfiles): Add i386/32bit-avx512.xml. (srv_i386_64bit_xmlfiles): Add i386/64bit-avx512.xml. (srv_amd64_xmlfiles): Add i386/amd64-avx512.xml and i386/x32-avx512.xml. (srv_i386_linux_xmlfiles): Add i386/i386-avx512-linux.xml. (srv_amd64_linux_xmlfiles): Add i386/amd64-avx512-linux.xml and i386/x32-avx512-linux.xml. * i387-fp.c (num_avx512_k_registers): New constant for number of K registers. (num_avx512_zmmh_low_registers): New constant for number of lower ZMM registers (0-15). (num_avx512_zmmh_high_registers): New constant for number of higher ZMM registers (16-31). (num_avx512_ymmh_registers): New contant for number of higher YMM registers (ymm16-31 added by avx521 on x86_64). (num_avx512_xmm_registers): New constant for number of higher XMM registers (xmm16-31 added by AVX512 on x86_64). (struct i387_xsave): Add space for AVX512 registers. (i387_cache_to_xsave): Change raw buffer size to 64 characters. Add code to handle AVX512 registers. (i387_xsave_to_cache): Add code to handle AVX512 registers. * linux-x86-low.c (init_registers_amd64_avx512_linux): New prototypei from generated file. (tdesc_amd64_avx512_linux): Likewise. (init_registers_x32_avx512_linux): Likewise. (tdesc_x32_avx512_linux): Likewise. (init_registers_i386_avx512_linux): Likewise. (tdesc_i386_avx512_linux): Likewise. (x86_64_regmap): Add AVX512 registers. (x86_linux_read_description): Add code to handle AVX512 XSTATE mask. (initialize_low_arch): Add code to initialize AVX512 registers. doc/ * gdb.texinfo (i386 Features): Add description of AVX512 registers. Change-Id: Ifc4c08c76b85dbec18d02efdbe6182e851584438 Signed-off-by: Michael Sturm <michael.sturm@intel.com>
448 lines
14 KiB
C
448 lines
14 KiB
C
/* Target-dependent code for the i386.
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Copyright (C) 2001-2014 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#ifndef I386_TDEP_H
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#define I386_TDEP_H
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struct frame_info;
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struct gdbarch;
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struct reggroup;
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struct regset;
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struct regcache;
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/* GDB's i386 target supports both the 32-bit Intel Architecture
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(IA-32) and the 64-bit AMD x86-64 architecture. Internally it uses
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a similar register layout for both.
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- General purpose registers
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- FPU data registers
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- FPU control registers
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- SSE data registers
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- SSE control register
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The general purpose registers for the x86-64 architecture are quite
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different from IA-32. Therefore, gdbarch_fp0_regnum
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determines the register number at which the FPU data registers
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start. The number of FPU data and control registers is the same
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for both architectures. The number of SSE registers however,
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differs and is determined by the num_xmm_regs member of `struct
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gdbarch_tdep'. */
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/* Convention for returning structures. */
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enum struct_return
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{
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pcc_struct_return, /* Return "short" structures in memory. */
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reg_struct_return /* Return "short" structures in registers. */
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};
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/* i386 architecture specific information. */
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struct gdbarch_tdep
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{
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/* General-purpose registers. */
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struct regset *gregset;
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int *gregset_reg_offset;
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int gregset_num_regs;
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size_t sizeof_gregset;
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/* Floating-point registers. */
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struct regset *fpregset;
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size_t sizeof_fpregset;
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/* XSAVE extended state. */
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struct regset *xstateregset;
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/* Register number for %st(0). The register numbers for the other
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registers follow from this one. Set this to -1 to indicate the
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absence of an FPU. */
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int st0_regnum;
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/* Number of MMX registers. */
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int num_mmx_regs;
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/* Register number for %mm0. Set this to -1 to indicate the absence
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of MMX support. */
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int mm0_regnum;
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/* Number of pseudo YMM registers. */
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int num_ymm_regs;
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/* Register number for %ymm0. Set this to -1 to indicate the absence
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of pseudo YMM register support. */
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int ymm0_regnum;
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/* Number of AVX512 OpMask registers (K-registers) */
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int num_k_regs;
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/* Register number for %k0. Set this to -1 to indicate the absence
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of AVX512 OpMask register support. */
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int k0_regnum;
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/* Number of pseudo ZMM registers ($zmm0-$zmm31). */
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int num_zmm_regs;
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/* Register number for %zmm0. Set this to -1 to indicate the absence
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of pseudo ZMM register support. */
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int zmm0_regnum;
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/* Number of byte registers. */
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int num_byte_regs;
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/* Register pseudo number for %al. */
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int al_regnum;
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/* Number of pseudo word registers. */
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int num_word_regs;
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/* Register number for %ax. */
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int ax_regnum;
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/* Number of pseudo dword registers. */
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int num_dword_regs;
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/* Register number for %eax. Set this to -1 to indicate the absence
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of pseudo dword register support. */
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int eax_regnum;
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/* Number of core registers. */
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int num_core_regs;
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/* Number of SSE registers. */
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int num_xmm_regs;
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/* Number of SSE registers added in AVX512. */
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int num_xmm_avx512_regs;
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/* Register number of XMM16, the first XMM register added in AVX512. */
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int xmm16_regnum;
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/* Number of YMM registers added in AVX512. */
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int num_ymm_avx512_regs;
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/* Register number of YMM16, the first YMM register added in AVX512. */
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int ymm16_regnum;
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/* Bits of the extended control register 0 (the XFEATURE_ENABLED_MASK
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register), excluding the x87 bit, which are supported by this GDB. */
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uint64_t xcr0;
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/* Offset of XCR0 in XSAVE extended state. */
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int xsave_xcr0_offset;
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/* Register names. */
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const char **register_names;
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/* Register number for %ymm0h. Set this to -1 to indicate the absence
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of upper YMM register support. */
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int ymm0h_regnum;
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/* Upper YMM register names. Only used for tdesc_numbered_register. */
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const char **ymmh_register_names;
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/* Register number for %ymm16h. Set this to -1 to indicate the absence
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of support for YMM16-31. */
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int ymm16h_regnum;
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/* YMM16-31 register names. Only used for tdesc_numbered_register. */
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const char **ymm16h_register_names;
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/* Register number for %bnd0r. Set this to -1 to indicate the absence
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bound registers. */
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int bnd0r_regnum;
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/* Register number for pseudo register %bnd0. Set this to -1 to indicate the absence
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bound registers. */
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int bnd0_regnum;
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/* Register number for %bndcfgu. Set this to -1 to indicate the absence
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bound control registers. */
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int bndcfgu_regnum;
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/* MPX register names. Only used for tdesc_numbered_register. */
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const char **mpx_register_names;
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/* Register number for %zmm0h. Set this to -1 to indicate the absence
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of ZMM_HI256 register support. */
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int zmm0h_regnum;
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/* OpMask register names. */
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const char **k_register_names;
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/* ZMM register names. Only used for tdesc_numbered_register. */
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const char **zmmh_register_names;
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/* XMM16-31 register names. Only used for tdesc_numbered_register. */
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const char **xmm_avx512_register_names;
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/* YMM16-31 register names. Only used for tdesc_numbered_register. */
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const char **ymm_avx512_register_names;
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/* Target description. */
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const struct target_desc *tdesc;
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/* Register group function. */
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const void *register_reggroup_p;
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/* Offset of saved PC in jmp_buf. */
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int jb_pc_offset;
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/* Convention for returning structures. */
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enum struct_return struct_return;
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/* Address range where sigtramp lives. */
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CORE_ADDR sigtramp_start;
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CORE_ADDR sigtramp_end;
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/* Detect sigtramp. */
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int (*sigtramp_p) (struct frame_info *);
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/* Get address of sigcontext for sigtramp. */
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CORE_ADDR (*sigcontext_addr) (struct frame_info *);
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/* Offset of registers in `struct sigcontext'. */
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int *sc_reg_offset;
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int sc_num_regs;
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/* Offset of saved PC and SP in `struct sigcontext'. Usage of these
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is deprecated, please use `sc_reg_offset' instead. */
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int sc_pc_offset;
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int sc_sp_offset;
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/* ISA-specific data types. */
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struct type *i386_mmx_type;
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struct type *i386_ymm_type;
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struct type *i386_zmm_type;
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struct type *i387_ext_type;
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struct type *i386_bnd_type;
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/* Process record/replay target. */
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/* The map for registers because the AMD64's registers order
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in GDB is not same as I386 instructions. */
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const int *record_regmap;
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/* Parse intx80 args. */
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int (*i386_intx80_record) (struct regcache *regcache);
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/* Parse sysenter args. */
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int (*i386_sysenter_record) (struct regcache *regcache);
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/* Parse syscall args. */
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int (*i386_syscall_record) (struct regcache *regcache);
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};
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/* Floating-point registers. */
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/* All FPU control regusters (except for FIOFF and FOOFF) are 16-bit
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(at most) in the FPU, but are zero-extended to 32 bits in GDB's
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register cache. */
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/* Return non-zero if REGNUM matches the FP register and the FP
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register set is active. */
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extern int i386_fp_regnum_p (struct gdbarch *, int);
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extern int i386_fpc_regnum_p (struct gdbarch *, int);
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/* Register numbers of various important registers. */
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enum i386_regnum
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{
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I386_EAX_REGNUM, /* %eax */
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I386_ECX_REGNUM, /* %ecx */
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I386_EDX_REGNUM, /* %edx */
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I386_EBX_REGNUM, /* %ebx */
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I386_ESP_REGNUM, /* %esp */
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I386_EBP_REGNUM, /* %ebp */
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I386_ESI_REGNUM, /* %esi */
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I386_EDI_REGNUM, /* %edi */
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I386_EIP_REGNUM, /* %eip */
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I386_EFLAGS_REGNUM, /* %eflags */
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I386_CS_REGNUM, /* %cs */
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I386_SS_REGNUM, /* %ss */
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I386_DS_REGNUM, /* %ds */
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I386_ES_REGNUM, /* %es */
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I386_FS_REGNUM, /* %fs */
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I386_GS_REGNUM, /* %gs */
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I386_ST0_REGNUM, /* %st(0) */
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I386_MXCSR_REGNUM = 40, /* %mxcsr */
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I386_YMM0H_REGNUM, /* %ymm0h */
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I386_YMM7H_REGNUM = I386_YMM0H_REGNUM + 7,
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I386_BND0R_REGNUM,
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I386_BND3R_REGNUM = I386_BND0R_REGNUM + 3,
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I386_BNDCFGU_REGNUM,
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I386_BNDSTATUS_REGNUM,
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I386_K0_REGNUM, /* %k0 */
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I386_K7_REGNUM = I386_K0_REGNUM + 7,
|
||
I386_ZMM0H_REGNUM, /* %zmm0h */
|
||
I386_ZMM7H_REGNUM = I386_ZMM0H_REGNUM + 7
|
||
};
|
||
|
||
/* Register numbers of RECORD_REGMAP. */
|
||
|
||
enum record_i386_regnum
|
||
{
|
||
X86_RECORD_REAX_REGNUM,
|
||
X86_RECORD_RECX_REGNUM,
|
||
X86_RECORD_REDX_REGNUM,
|
||
X86_RECORD_REBX_REGNUM,
|
||
X86_RECORD_RESP_REGNUM,
|
||
X86_RECORD_REBP_REGNUM,
|
||
X86_RECORD_RESI_REGNUM,
|
||
X86_RECORD_REDI_REGNUM,
|
||
X86_RECORD_R8_REGNUM,
|
||
X86_RECORD_R9_REGNUM,
|
||
X86_RECORD_R10_REGNUM,
|
||
X86_RECORD_R11_REGNUM,
|
||
X86_RECORD_R12_REGNUM,
|
||
X86_RECORD_R13_REGNUM,
|
||
X86_RECORD_R14_REGNUM,
|
||
X86_RECORD_R15_REGNUM,
|
||
X86_RECORD_REIP_REGNUM,
|
||
X86_RECORD_EFLAGS_REGNUM,
|
||
X86_RECORD_CS_REGNUM,
|
||
X86_RECORD_SS_REGNUM,
|
||
X86_RECORD_DS_REGNUM,
|
||
X86_RECORD_ES_REGNUM,
|
||
X86_RECORD_FS_REGNUM,
|
||
X86_RECORD_GS_REGNUM,
|
||
};
|
||
|
||
#define I386_NUM_GREGS 16
|
||
#define I386_NUM_XREGS 9
|
||
|
||
#define I386_SSE_NUM_REGS (I386_MXCSR_REGNUM + 1)
|
||
#define I386_AVX_NUM_REGS (I386_YMM7H_REGNUM + 1)
|
||
#define I386_MPX_NUM_REGS (I386_BNDSTATUS_REGNUM + 1)
|
||
#define I386_AVX512_NUM_REGS (I386_ZMM7H_REGNUM + 1)
|
||
|
||
/* Size of the largest register. */
|
||
#define I386_MAX_REGISTER_SIZE 64
|
||
|
||
/* Types for i386-specific registers. */
|
||
extern struct type *i387_ext_type (struct gdbarch *gdbarch);
|
||
|
||
/* Checks of different pseudo-registers. */
|
||
extern int i386_byte_regnum_p (struct gdbarch *gdbarch, int regnum);
|
||
extern int i386_word_regnum_p (struct gdbarch *gdbarch, int regnum);
|
||
extern int i386_dword_regnum_p (struct gdbarch *gdbarch, int regnum);
|
||
extern int i386_xmm_regnum_p (struct gdbarch *gdbarch, int regnum);
|
||
extern int i386_xmm_avx512_regnum_p (struct gdbarch * gdbarch, int regnum);
|
||
extern int i386_ymm_regnum_p (struct gdbarch *gdbarch, int regnum);
|
||
extern int i386_ymm_avx512_regnum_p (struct gdbarch *gdbarch, int regnum);
|
||
extern int i386_bnd_regnum_p (struct gdbarch *gdbarch, int regnum);
|
||
extern int i386_k_regnum_p (struct gdbarch *gdbarch, int regnum);
|
||
extern int i386_zmm_regnum_p (struct gdbarch *gdbarch, int regnum);
|
||
extern int i386_zmmh_regnum_p (struct gdbarch *gdbarch, int regnum);
|
||
|
||
extern const char *i386_pseudo_register_name (struct gdbarch *gdbarch,
|
||
int regnum);
|
||
extern struct type *i386_pseudo_register_type (struct gdbarch *gdbarch,
|
||
int regnum);
|
||
|
||
extern void i386_pseudo_register_read_into_value (struct gdbarch *gdbarch,
|
||
struct regcache *regcache,
|
||
int regnum,
|
||
struct value *result);
|
||
|
||
extern void i386_pseudo_register_write (struct gdbarch *gdbarch,
|
||
struct regcache *regcache,
|
||
int regnum, const gdb_byte *buf);
|
||
|
||
/* Segment selectors. */
|
||
#define I386_SEL_RPL 0x0003 /* Requester's Privilege Level mask. */
|
||
#define I386_SEL_UPL 0x0003 /* User Privilige Level. */
|
||
#define I386_SEL_KPL 0x0000 /* Kernel Privilige Level. */
|
||
|
||
/* The length of the longest i386 instruction (according to
|
||
include/asm-i386/kprobes.h in Linux 2.6. */
|
||
#define I386_MAX_INSN_LEN (16)
|
||
|
||
/* Functions exported from i386-tdep.c. */
|
||
extern CORE_ADDR i386_pe_skip_trampoline_code (struct frame_info *frame,
|
||
CORE_ADDR pc, char *name);
|
||
extern CORE_ADDR i386_skip_main_prologue (struct gdbarch *gdbarch,
|
||
CORE_ADDR pc);
|
||
|
||
/* Return whether the THIS_FRAME corresponds to a sigtramp routine. */
|
||
extern int i386_sigtramp_p (struct frame_info *this_frame);
|
||
|
||
/* Return non-zero if REGNUM is a member of the specified group. */
|
||
extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
|
||
struct reggroup *group);
|
||
|
||
/* Supply register REGNUM from the general-purpose register set REGSET
|
||
to register cache REGCACHE. If REGNUM is -1, do this for all
|
||
registers in REGSET. */
|
||
extern void i386_supply_gregset (const struct regset *regset,
|
||
struct regcache *regcache, int regnum,
|
||
const void *gregs, size_t len);
|
||
|
||
/* Collect register REGNUM from the register cache REGCACHE and store
|
||
it in the buffer specified by GREGS and LEN as described by the
|
||
general-purpose register set REGSET. If REGNUM is -1, do this for
|
||
all registers in REGSET. */
|
||
extern void i386_collect_gregset (const struct regset *regset,
|
||
const struct regcache *regcache,
|
||
int regnum, void *gregs, size_t len);
|
||
|
||
/* Return the appropriate register set for the core section identified
|
||
by SECT_NAME and SECT_SIZE. */
|
||
extern const struct regset *
|
||
i386_regset_from_core_section (struct gdbarch *gdbarch,
|
||
const char *sect_name, size_t sect_size);
|
||
|
||
|
||
extern struct displaced_step_closure *i386_displaced_step_copy_insn
|
||
(struct gdbarch *gdbarch, CORE_ADDR from, CORE_ADDR to,
|
||
struct regcache *regs);
|
||
extern void i386_displaced_step_fixup (struct gdbarch *gdbarch,
|
||
struct displaced_step_closure *closure,
|
||
CORE_ADDR from, CORE_ADDR to,
|
||
struct regcache *regs);
|
||
|
||
/* Initialize a basic ELF architecture variant. */
|
||
extern void i386_elf_init_abi (struct gdbarch_info, struct gdbarch *);
|
||
|
||
/* Initialize a SVR4 architecture variant. */
|
||
extern void i386_svr4_init_abi (struct gdbarch_info, struct gdbarch *);
|
||
|
||
extern int i386_process_record (struct gdbarch *gdbarch,
|
||
struct regcache *regcache, CORE_ADDR addr);
|
||
|
||
|
||
|
||
/* Functions and variables exported from i386bsd-tdep.c. */
|
||
|
||
extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *);
|
||
extern CORE_ADDR i386fbsd_sigtramp_start_addr;
|
||
extern CORE_ADDR i386fbsd_sigtramp_end_addr;
|
||
extern CORE_ADDR i386obsd_sigtramp_start_addr;
|
||
extern CORE_ADDR i386obsd_sigtramp_end_addr;
|
||
extern int i386fbsd4_sc_reg_offset[];
|
||
extern int i386fbsd_sc_reg_offset[];
|
||
extern int i386nbsd_sc_reg_offset[];
|
||
extern int i386obsd_sc_reg_offset[];
|
||
extern int i386bsd_sc_reg_offset[];
|
||
|
||
/* SystemTap related functions. */
|
||
|
||
extern int i386_stap_is_single_operand (struct gdbarch *gdbarch,
|
||
const char *s);
|
||
|
||
extern int i386_stap_parse_special_token (struct gdbarch *gdbarch,
|
||
struct stap_parse_info *p);
|
||
|
||
#endif /* i386-tdep.h */
|