mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-12-27 04:52:05 +08:00
4de283e4b5
Andreas Schwab and John Baldwin pointed out some bugs in the header sorting patch; and I noticed that the output was not correct when limited to a subset of files (a bug in my script). So, I'm reverting the patch. I may try again after fixing the issues pointed out. gdb/ChangeLog 2019-04-05 Tom Tromey <tom@tromey.com> Revert the header-sorting patch. * ft32-tdep.c: Revert. * frv-tdep.c: Revert. * frv-linux-tdep.c: Revert. * frame.c: Revert. * frame-unwind.c: Revert. * frame-base.c: Revert. * fork-child.c: Revert. * findvar.c: Revert. * findcmd.c: Revert. * filesystem.c: Revert. * filename-seen-cache.h: Revert. * filename-seen-cache.c: Revert. * fbsd-tdep.c: Revert. * fbsd-nat.h: Revert. * fbsd-nat.c: Revert. * f-valprint.c: Revert. * f-typeprint.c: Revert. * f-lang.c: Revert. * extension.h: Revert. * extension.c: Revert. * extension-priv.h: Revert. * expprint.c: Revert. * exec.h: Revert. * exec.c: Revert. * exceptions.c: Revert. * event-top.c: Revert. * event-loop.c: Revert. * eval.c: Revert. * elfread.c: Revert. * dwarf2read.h: Revert. * dwarf2read.c: Revert. * dwarf2loc.c: Revert. * dwarf2expr.h: Revert. * dwarf2expr.c: Revert. * dwarf2-frame.c: Revert. * dwarf2-frame-tailcall.c: Revert. * dwarf-index-write.h: Revert. * dwarf-index-write.c: Revert. * dwarf-index-common.c: Revert. * dwarf-index-cache.h: Revert. * dwarf-index-cache.c: Revert. * dummy-frame.c: Revert. * dtrace-probe.c: Revert. * disasm.h: Revert. * disasm.c: Revert. * disasm-selftests.c: Revert. * dictionary.c: Revert. * dicos-tdep.c: Revert. * demangle.c: Revert. * dcache.h: Revert. * dcache.c: Revert. * darwin-nat.h: Revert. * darwin-nat.c: Revert. * darwin-nat-info.c: Revert. * d-valprint.c: Revert. * d-namespace.c: Revert. * d-lang.c: Revert. * ctf.c: Revert. * csky-tdep.c: Revert. * csky-linux-tdep.c: Revert. * cris-tdep.c: Revert. * cris-linux-tdep.c: Revert. * cp-valprint.c: Revert. * cp-support.c: Revert. * cp-namespace.c: Revert. * cp-abi.c: Revert. * corelow.c: Revert. * corefile.c: Revert. * continuations.c: Revert. * completer.h: Revert. * completer.c: Revert. * complaints.c: Revert. * coffread.c: Revert. * coff-pe-read.c: Revert. * cli-out.h: Revert. * cli-out.c: Revert. * charset.c: Revert. * c-varobj.c: Revert. * c-valprint.c: Revert. * c-typeprint.c: Revert. * c-lang.c: Revert. * buildsym.c: Revert. * buildsym-legacy.c: Revert. * build-id.h: Revert. * build-id.c: Revert. * btrace.c: Revert. * bsd-uthread.c: Revert. * breakpoint.h: Revert. * breakpoint.c: Revert. * break-catch-throw.c: Revert. * break-catch-syscall.c: Revert. * break-catch-sig.c: Revert. * blockframe.c: Revert. * block.c: Revert. * bfin-tdep.c: Revert. * bfin-linux-tdep.c: Revert. * bfd-target.c: Revert. * bcache.c: Revert. * ax-general.c: Revert. * ax-gdb.h: Revert. * ax-gdb.c: Revert. * avr-tdep.c: Revert. * auxv.c: Revert. * auto-load.c: Revert. * arm-wince-tdep.c: Revert. * arm-tdep.c: Revert. * arm-symbian-tdep.c: Revert. * arm-pikeos-tdep.c: Revert. * arm-obsd-tdep.c: Revert. * arm-nbsd-tdep.c: Revert. * arm-nbsd-nat.c: Revert. * arm-linux-tdep.c: Revert. * arm-linux-nat.c: Revert. * arm-fbsd-tdep.c: Revert. * arm-fbsd-nat.c: Revert. * arm-bsd-tdep.c: Revert. * arch-utils.c: Revert. * arc-tdep.c: Revert. * arc-newlib-tdep.c: Revert. * annotate.h: Revert. * annotate.c: Revert. * amd64-windows-tdep.c: Revert. * amd64-windows-nat.c: Revert. * amd64-tdep.c: Revert. * amd64-sol2-tdep.c: Revert. * amd64-obsd-tdep.c: Revert. * amd64-obsd-nat.c: Revert. * amd64-nbsd-tdep.c: Revert. * amd64-nbsd-nat.c: Revert. * amd64-nat.c: Revert. * amd64-linux-tdep.c: Revert. * amd64-linux-nat.c: Revert. * amd64-fbsd-tdep.c: Revert. * amd64-fbsd-nat.c: Revert. * amd64-dicos-tdep.c: Revert. * amd64-darwin-tdep.c: Revert. * amd64-bsd-nat.c: Revert. * alpha-tdep.c: Revert. * alpha-obsd-tdep.c: Revert. * alpha-nbsd-tdep.c: Revert. * alpha-mdebug-tdep.c: Revert. * alpha-linux-tdep.c: Revert. * alpha-linux-nat.c: Revert. * alpha-bsd-tdep.c: Revert. * alpha-bsd-nat.c: Revert. * aix-thread.c: Revert. * agent.c: Revert. * addrmap.c: Revert. * ada-varobj.c: Revert. * ada-valprint.c: Revert. * ada-typeprint.c: Revert. * ada-tasks.c: Revert. * ada-lang.c: Revert. * aarch64-tdep.c: Revert. * aarch64-ravenscar-thread.c: Revert. * aarch64-newlib-tdep.c: Revert. * aarch64-linux-tdep.c: Revert. * aarch64-linux-nat.c: Revert. * aarch64-fbsd-tdep.c: Revert. * aarch64-fbsd-nat.c: Revert. * aarch32-linux-nat.c: Revert.
841 lines
23 KiB
C
841 lines
23 KiB
C
/* Target-dependent code for Analog Devices Blackfin processor, for GDB.
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Copyright (C) 2005-2019 Free Software Foundation, Inc.
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Contributed by Analog Devices, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "inferior.h"
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#include "gdbcore.h"
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#include "arch-utils.h"
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#include "regcache.h"
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#include "frame.h"
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#include "frame-unwind.h"
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#include "frame-base.h"
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#include "trad-frame.h"
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#include "dis-asm.h"
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#include "sim-regno.h"
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#include "gdb/sim-bfin.h"
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#include "dwarf2-frame.h"
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#include "symtab.h"
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#include "elf-bfd.h"
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#include "elf/bfin.h"
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#include "osabi.h"
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#include "infcall.h"
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#include "xml-syscall.h"
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#include "bfin-tdep.h"
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/* Macros used by prologue functions. */
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#define P_LINKAGE 0xE800
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#define P_MINUS_SP1 0x0140
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#define P_MINUS_SP2 0x05C0
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#define P_MINUS_SP3 0x0540
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#define P_MINUS_SP4 0x04C0
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#define P_SP_PLUS 0x6C06
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#define P_P2_LOW 0xE10A
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#define P_P2_HIGH 0XE14A
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#define P_SP_EQ_SP_PLUS_P2 0X5BB2
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#define P_SP_EQ_P2_PLUS_SP 0x5B96
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#define P_MINUS_MINUS_SP_EQ_RETS 0x0167
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/* Macros used for program flow control. */
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/* 16 bit instruction, max */
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#define P_16_BIT_INSR_MAX 0xBFFF
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/* 32 bit instruction, min */
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#define P_32_BIT_INSR_MIN 0xC000
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/* 32 bit instruction, max */
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#define P_32_BIT_INSR_MAX 0xE801
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/* jump (preg), 16-bit, min */
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#define P_JUMP_PREG_MIN 0x0050
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/* jump (preg), 16-bit, max */
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#define P_JUMP_PREG_MAX 0x0057
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/* jump (pc+preg), 16-bit, min */
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#define P_JUMP_PC_PLUS_PREG_MIN 0x0080
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/* jump (pc+preg), 16-bit, max */
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#define P_JUMP_PC_PLUS_PREG_MAX 0x0087
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/* jump.s pcrel13m2, 16-bit, min */
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#define P_JUMP_S_MIN 0x2000
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/* jump.s pcrel13m2, 16-bit, max */
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#define P_JUMP_S_MAX 0x2FFF
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/* jump.l pcrel25m2, 32-bit, min */
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#define P_JUMP_L_MIN 0xE200
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/* jump.l pcrel25m2, 32-bit, max */
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#define P_JUMP_L_MAX 0xE2FF
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/* conditional jump pcrel11m2, 16-bit, min */
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#define P_IF_CC_JUMP_MIN 0x1800
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/* conditional jump pcrel11m2, 16-bit, max */
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#define P_IF_CC_JUMP_MAX 0x1BFF
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/* conditional jump(bp) pcrel11m2, 16-bit, min */
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#define P_IF_CC_JUMP_BP_MIN 0x1C00
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/* conditional jump(bp) pcrel11m2, 16-bit, max */
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#define P_IF_CC_JUMP_BP_MAX 0x1FFF
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/* conditional !jump pcrel11m2, 16-bit, min */
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#define P_IF_NOT_CC_JUMP_MIN 0x1000
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/* conditional !jump pcrel11m2, 16-bit, max */
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#define P_IF_NOT_CC_JUMP_MAX 0x13FF
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/* conditional jump(bp) pcrel11m2, 16-bit, min */
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#define P_IF_NOT_CC_JUMP_BP_MIN 0x1400
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/* conditional jump(bp) pcrel11m2, 16-bit, max */
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#define P_IF_NOT_CC_JUMP_BP_MAX 0x17FF
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/* call (preg), 16-bit, min */
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#define P_CALL_PREG_MIN 0x0060
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/* call (preg), 16-bit, max */
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#define P_CALL_PREG_MAX 0x0067
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/* call (pc+preg), 16-bit, min */
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#define P_CALL_PC_PLUS_PREG_MIN 0x0070
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/* call (pc+preg), 16-bit, max */
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#define P_CALL_PC_PLUS_PREG_MAX 0x0077
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/* call pcrel25m2, 32-bit, min */
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#define P_CALL_MIN 0xE300
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/* call pcrel25m2, 32-bit, max */
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#define P_CALL_MAX 0xE3FF
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/* RTS */
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#define P_RTS 0x0010
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/* MNOP */
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#define P_MNOP 0xC803
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/* EXCPT, 16-bit, min */
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#define P_EXCPT_MIN 0x00A0
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/* EXCPT, 16-bit, max */
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#define P_EXCPT_MAX 0x00AF
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/* multi instruction mask 1, 16-bit */
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#define P_BIT_MULTI_INS_1 0xC000
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/* multi instruction mask 2, 16-bit */
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#define P_BIT_MULTI_INS_2 0x0800
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/* The maximum bytes we search to skip the prologue. */
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#define UPPER_LIMIT 40
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/* ASTAT bits */
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#define ASTAT_CC_POS 5
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#define ASTAT_CC (1 << ASTAT_CC_POS)
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/* Initial value: Register names used in BFIN's ISA documentation. */
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static const char * const bfin_register_name_strings[] =
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{
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
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"p0", "p1", "p2", "p3", "p4", "p5", "sp", "fp",
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"i0", "i1", "i2", "i3", "m0", "m1", "m2", "m3",
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"b0", "b1", "b2", "b3", "l0", "l1", "l2", "l3",
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"a0x", "a0w", "a1x", "a1w", "astat", "rets",
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"lc0", "lt0", "lb0", "lc1", "lt1", "lb1", "cycles", "cycles2",
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"usp", "seqstat", "syscfg", "reti", "retx", "retn", "rete",
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"pc", "cc",
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};
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#define NUM_BFIN_REGNAMES ARRAY_SIZE (bfin_register_name_strings)
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/* In this diagram successive memory locations increase downwards or the
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stack grows upwards with negative indices. (PUSH analogy for stack.)
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The top frame is the "frame" of the current function being executed.
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+--------------+ SP -
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| local vars | ^
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+--------------+ |
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| save regs | |
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+--------------+ FP |
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| old FP -|-- top
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+--------------+ | frame
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| RETS | | |
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+--------------+ | |
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| param 1 | | |
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| param 2 | | |
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| ... | | V
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+--------------+ | -
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| local vars | | ^
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+--------------+ | |
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| save regs | | |
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+--------------+<- |
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| old FP -|-- next
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+--------------+ | frame
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| RETS | | |
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+--------------+ | |
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| param 1 | | |
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| param 2 | | |
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| ... | | V
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+--------------+ | -
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| local vars | | ^
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+--------------+ | |
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| save regs | | |
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+--------------+<- next frame
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| old FP | |
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+--------------+ |
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| RETS | V
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+--------------+ -
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The frame chain is formed as following:
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FP has the topmost frame.
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FP + 4 has the previous FP and so on. */
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/* Map from DWARF2 register number to GDB register number. */
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static const int map_gcc_gdb[] =
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{
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BFIN_R0_REGNUM,
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BFIN_R1_REGNUM,
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BFIN_R2_REGNUM,
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BFIN_R3_REGNUM,
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BFIN_R4_REGNUM,
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BFIN_R5_REGNUM,
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BFIN_R6_REGNUM,
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BFIN_R7_REGNUM,
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BFIN_P0_REGNUM,
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BFIN_P1_REGNUM,
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BFIN_P2_REGNUM,
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BFIN_P3_REGNUM,
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BFIN_P4_REGNUM,
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BFIN_P5_REGNUM,
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BFIN_SP_REGNUM,
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BFIN_FP_REGNUM,
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BFIN_I0_REGNUM,
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BFIN_I1_REGNUM,
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BFIN_I2_REGNUM,
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BFIN_I3_REGNUM,
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BFIN_B0_REGNUM,
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BFIN_B1_REGNUM,
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BFIN_B2_REGNUM,
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BFIN_B3_REGNUM,
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BFIN_L0_REGNUM,
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BFIN_L1_REGNUM,
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BFIN_L2_REGNUM,
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BFIN_L3_REGNUM,
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BFIN_M0_REGNUM,
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BFIN_M1_REGNUM,
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BFIN_M2_REGNUM,
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BFIN_M3_REGNUM,
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BFIN_A0_DOT_X_REGNUM,
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BFIN_A1_DOT_X_REGNUM,
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BFIN_CC_REGNUM,
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BFIN_RETS_REGNUM,
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BFIN_RETI_REGNUM,
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BFIN_RETX_REGNUM,
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BFIN_RETN_REGNUM,
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BFIN_RETE_REGNUM,
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BFIN_ASTAT_REGNUM,
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BFIN_SEQSTAT_REGNUM,
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BFIN_USP_REGNUM,
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BFIN_LT0_REGNUM,
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BFIN_LT1_REGNUM,
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BFIN_LC0_REGNUM,
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BFIN_LC1_REGNUM,
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BFIN_LB0_REGNUM,
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BFIN_LB1_REGNUM
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};
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/* Big enough to hold the size of the largest register in bytes. */
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#define BFIN_MAX_REGISTER_SIZE 4
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struct bfin_frame_cache
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{
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/* Base address. */
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CORE_ADDR base;
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CORE_ADDR sp_offset;
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CORE_ADDR pc;
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int frameless_pc_value;
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/* Saved registers. */
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CORE_ADDR saved_regs[BFIN_NUM_REGS];
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CORE_ADDR saved_sp;
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/* Stack space reserved for local variables. */
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long locals;
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};
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/* Allocate and initialize a frame cache. */
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static struct bfin_frame_cache *
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bfin_alloc_frame_cache (void)
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{
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struct bfin_frame_cache *cache;
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int i;
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cache = FRAME_OBSTACK_ZALLOC (struct bfin_frame_cache);
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/* Base address. */
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cache->base = 0;
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cache->sp_offset = -4;
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cache->pc = 0;
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cache->frameless_pc_value = 0;
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/* Saved registers. We initialize these to -1 since zero is a valid
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offset (that's where fp is supposed to be stored). */
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for (i = 0; i < BFIN_NUM_REGS; i++)
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cache->saved_regs[i] = -1;
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/* Frameless until proven otherwise. */
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cache->locals = -1;
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return cache;
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}
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static struct bfin_frame_cache *
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bfin_frame_cache (struct frame_info *this_frame, void **this_cache)
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{
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struct bfin_frame_cache *cache;
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int i;
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if (*this_cache)
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return (struct bfin_frame_cache *) *this_cache;
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cache = bfin_alloc_frame_cache ();
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*this_cache = cache;
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cache->base = get_frame_register_unsigned (this_frame, BFIN_FP_REGNUM);
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if (cache->base == 0)
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return cache;
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/* For normal frames, PC is stored at [FP + 4]. */
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cache->saved_regs[BFIN_PC_REGNUM] = 4;
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cache->saved_regs[BFIN_FP_REGNUM] = 0;
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/* Adjust all the saved registers such that they contain addresses
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instead of offsets. */
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for (i = 0; i < BFIN_NUM_REGS; i++)
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if (cache->saved_regs[i] != -1)
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cache->saved_regs[i] += cache->base;
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cache->pc = get_frame_func (this_frame) ;
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if (cache->pc == 0 || cache->pc == get_frame_pc (this_frame))
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{
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/* Either there is no prologue (frameless function) or we are at
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the start of a function. In short we do not have a frame.
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PC is stored in rets register. FP points to previous frame. */
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cache->saved_regs[BFIN_PC_REGNUM] =
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get_frame_register_unsigned (this_frame, BFIN_RETS_REGNUM);
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cache->frameless_pc_value = 1;
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cache->base = get_frame_register_unsigned (this_frame, BFIN_FP_REGNUM);
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cache->saved_regs[BFIN_FP_REGNUM] = cache->base;
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cache->saved_sp = cache->base;
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}
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else
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{
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cache->frameless_pc_value = 0;
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/* Now that we have the base address for the stack frame we can
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calculate the value of SP in the calling frame. */
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cache->saved_sp = cache->base + 8;
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}
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return cache;
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}
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static void
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bfin_frame_this_id (struct frame_info *this_frame,
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void **this_cache,
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struct frame_id *this_id)
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{
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struct bfin_frame_cache *cache = bfin_frame_cache (this_frame, this_cache);
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/* This marks the outermost frame. */
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if (cache->base == 0)
|
|
return;
|
|
|
|
/* See the end of bfin_push_dummy_call. */
|
|
*this_id = frame_id_build (cache->base + 8, cache->pc);
|
|
}
|
|
|
|
static struct value *
|
|
bfin_frame_prev_register (struct frame_info *this_frame,
|
|
void **this_cache,
|
|
int regnum)
|
|
{
|
|
struct gdbarch *gdbarch = get_frame_arch (this_frame);
|
|
struct bfin_frame_cache *cache = bfin_frame_cache (this_frame, this_cache);
|
|
|
|
if (regnum == gdbarch_sp_regnum (gdbarch) && cache->saved_sp)
|
|
return frame_unwind_got_constant (this_frame, regnum, cache->saved_sp);
|
|
|
|
if (regnum < BFIN_NUM_REGS && cache->saved_regs[regnum] != -1)
|
|
return frame_unwind_got_memory (this_frame, regnum,
|
|
cache->saved_regs[regnum]);
|
|
|
|
return frame_unwind_got_register (this_frame, regnum, regnum);
|
|
}
|
|
|
|
static const struct frame_unwind bfin_frame_unwind =
|
|
{
|
|
NORMAL_FRAME,
|
|
default_frame_unwind_stop_reason,
|
|
bfin_frame_this_id,
|
|
bfin_frame_prev_register,
|
|
NULL,
|
|
default_frame_sniffer
|
|
};
|
|
|
|
/* Check for "[--SP] = <reg>;" insns. These are appear in function
|
|
prologues to save misc registers onto the stack. */
|
|
|
|
static int
|
|
is_minus_minus_sp (int op)
|
|
{
|
|
op &= 0xFFC0;
|
|
|
|
if ((op == P_MINUS_SP1) || (op == P_MINUS_SP2)
|
|
|| (op == P_MINUS_SP3) || (op == P_MINUS_SP4))
|
|
return 1;
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* Skip all the insns that appear in generated function prologues. */
|
|
|
|
static CORE_ADDR
|
|
bfin_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
|
|
{
|
|
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
|
int op = read_memory_unsigned_integer (pc, 2, byte_order);
|
|
CORE_ADDR orig_pc = pc;
|
|
int done = 0;
|
|
|
|
/* The new gcc prologue generates the register saves BEFORE the link
|
|
or RETS saving instruction.
|
|
So, our job is to stop either at those instructions or some upper
|
|
limit saying there is no frame! */
|
|
|
|
while (!done)
|
|
{
|
|
if (is_minus_minus_sp (op))
|
|
{
|
|
while (is_minus_minus_sp (op))
|
|
{
|
|
pc += 2;
|
|
op = read_memory_unsigned_integer (pc, 2, byte_order);
|
|
}
|
|
|
|
if (op == P_LINKAGE)
|
|
pc += 4;
|
|
|
|
done = 1;
|
|
}
|
|
else if (op == P_LINKAGE)
|
|
{
|
|
pc += 4;
|
|
done = 1;
|
|
}
|
|
else if (op == P_MINUS_MINUS_SP_EQ_RETS)
|
|
{
|
|
pc += 2;
|
|
done = 1;
|
|
}
|
|
else if (op == P_RTS)
|
|
{
|
|
done = 1;
|
|
}
|
|
else if ((op >= P_JUMP_PREG_MIN && op <= P_JUMP_PREG_MAX)
|
|
|| (op >= P_JUMP_PC_PLUS_PREG_MIN
|
|
&& op <= P_JUMP_PC_PLUS_PREG_MAX)
|
|
|| (op == P_JUMP_S_MIN && op <= P_JUMP_S_MAX))
|
|
{
|
|
done = 1;
|
|
}
|
|
else if (pc - orig_pc >= UPPER_LIMIT)
|
|
{
|
|
warning (_("Function Prologue not recognised; "
|
|
"pc will point to ENTRY_POINT of the function"));
|
|
pc = orig_pc + 2;
|
|
done = 1;
|
|
}
|
|
else
|
|
{
|
|
pc += 2; /* Not a terminating instruction go on. */
|
|
op = read_memory_unsigned_integer (pc, 2, byte_order);
|
|
}
|
|
}
|
|
|
|
/* TODO:
|
|
Dwarf2 uses entry point value AFTER some register initializations.
|
|
We should perhaps skip such asssignments as well (R6 = R1, ...). */
|
|
|
|
return pc;
|
|
}
|
|
|
|
/* Return the GDB type object for the "standard" data type of data in
|
|
register N. This should be void pointer for P0-P5, SP, FP;
|
|
void pointer to function for PC; int otherwise. */
|
|
|
|
static struct type *
|
|
bfin_register_type (struct gdbarch *gdbarch, int regnum)
|
|
{
|
|
if ((regnum >= BFIN_P0_REGNUM && regnum <= BFIN_FP_REGNUM)
|
|
|| regnum == BFIN_USP_REGNUM)
|
|
return builtin_type (gdbarch)->builtin_data_ptr;
|
|
|
|
if (regnum == BFIN_PC_REGNUM || regnum == BFIN_RETS_REGNUM
|
|
|| regnum == BFIN_RETI_REGNUM || regnum == BFIN_RETX_REGNUM
|
|
|| regnum == BFIN_RETN_REGNUM || regnum == BFIN_RETE_REGNUM
|
|
|| regnum == BFIN_LT0_REGNUM || regnum == BFIN_LB0_REGNUM
|
|
|| regnum == BFIN_LT1_REGNUM || regnum == BFIN_LB1_REGNUM)
|
|
return builtin_type (gdbarch)->builtin_func_ptr;
|
|
|
|
return builtin_type (gdbarch)->builtin_int32;
|
|
}
|
|
|
|
static CORE_ADDR
|
|
bfin_push_dummy_call (struct gdbarch *gdbarch,
|
|
struct value *function,
|
|
struct regcache *regcache,
|
|
CORE_ADDR bp_addr,
|
|
int nargs,
|
|
struct value **args,
|
|
CORE_ADDR sp,
|
|
function_call_return_method return_method,
|
|
CORE_ADDR struct_addr)
|
|
{
|
|
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
|
int i;
|
|
long reg_r0, reg_r1, reg_r2;
|
|
int total_len = 0;
|
|
|
|
for (i = nargs - 1; i >= 0; i--)
|
|
{
|
|
struct type *value_type = value_enclosing_type (args[i]);
|
|
|
|
total_len += (TYPE_LENGTH (value_type) + 3) & ~3;
|
|
}
|
|
|
|
/* At least twelve bytes of stack space must be allocated for the function's
|
|
arguments, even for functions that have less than 12 bytes of argument
|
|
data. */
|
|
|
|
if (total_len < 12)
|
|
sp -= 12 - total_len;
|
|
|
|
/* Push arguments in reverse order. */
|
|
|
|
for (i = nargs - 1; i >= 0; i--)
|
|
{
|
|
struct type *value_type = value_enclosing_type (args[i]);
|
|
struct type *arg_type = check_typedef (value_type);
|
|
int container_len = (TYPE_LENGTH (arg_type) + 3) & ~3;
|
|
|
|
sp -= container_len;
|
|
write_memory (sp, value_contents (args[i]), container_len);
|
|
}
|
|
|
|
/* Initialize R0, R1, and R2 to the first 3 words of parameters. */
|
|
|
|
reg_r0 = read_memory_integer (sp, 4, byte_order);
|
|
regcache_cooked_write_unsigned (regcache, BFIN_R0_REGNUM, reg_r0);
|
|
reg_r1 = read_memory_integer (sp + 4, 4, byte_order);
|
|
regcache_cooked_write_unsigned (regcache, BFIN_R1_REGNUM, reg_r1);
|
|
reg_r2 = read_memory_integer (sp + 8, 4, byte_order);
|
|
regcache_cooked_write_unsigned (regcache, BFIN_R2_REGNUM, reg_r2);
|
|
|
|
/* Store struct value address. */
|
|
|
|
if (return_method == return_method_struct)
|
|
regcache_cooked_write_unsigned (regcache, BFIN_P0_REGNUM, struct_addr);
|
|
|
|
/* Set the dummy return value to bp_addr.
|
|
A dummy breakpoint will be setup to execute the call. */
|
|
|
|
regcache_cooked_write_unsigned (regcache, BFIN_RETS_REGNUM, bp_addr);
|
|
|
|
/* Finally, update the stack pointer. */
|
|
|
|
regcache_cooked_write_unsigned (regcache, BFIN_SP_REGNUM, sp);
|
|
|
|
return sp;
|
|
}
|
|
|
|
/* Convert DWARF2 register number REG to the appropriate register number
|
|
used by GDB. */
|
|
|
|
static int
|
|
bfin_reg_to_regnum (struct gdbarch *gdbarch, int reg)
|
|
{
|
|
if (reg < 0 || reg >= ARRAY_SIZE (map_gcc_gdb))
|
|
return -1;
|
|
|
|
return map_gcc_gdb[reg];
|
|
}
|
|
|
|
/* Implement the breakpoint_kind_from_pc gdbarch method. */
|
|
|
|
static int
|
|
bfin_breakpoint_kind_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr)
|
|
{
|
|
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
|
unsigned short iw;
|
|
|
|
iw = read_memory_unsigned_integer (*pcptr, 2, byte_order);
|
|
|
|
if ((iw & 0xf000) >= 0xc000)
|
|
/* 32-bit instruction. */
|
|
return 4;
|
|
else
|
|
return 2;
|
|
}
|
|
|
|
/* Implement the sw_breakpoint_from_kind gdbarch method. */
|
|
|
|
static const gdb_byte *
|
|
bfin_sw_breakpoint_from_kind (struct gdbarch *gdbarch, int kind, int *size)
|
|
{
|
|
static unsigned char bfin_breakpoint[] = {0xa1, 0x00, 0x00, 0x00};
|
|
static unsigned char bfin_sim_breakpoint[] = {0x25, 0x00, 0x00, 0x00};
|
|
|
|
*size = kind;
|
|
|
|
if (strcmp (target_shortname, "sim") == 0)
|
|
return bfin_sim_breakpoint;
|
|
else
|
|
return bfin_breakpoint;
|
|
}
|
|
|
|
static void
|
|
bfin_extract_return_value (struct type *type,
|
|
struct regcache *regs,
|
|
gdb_byte *dst)
|
|
{
|
|
struct gdbarch *gdbarch = regs->arch ();
|
|
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
|
bfd_byte *valbuf = dst;
|
|
int len = TYPE_LENGTH (type);
|
|
ULONGEST tmp;
|
|
int regno = BFIN_R0_REGNUM;
|
|
|
|
gdb_assert (len <= 8);
|
|
|
|
while (len > 0)
|
|
{
|
|
regcache_cooked_read_unsigned (regs, regno++, &tmp);
|
|
store_unsigned_integer (valbuf, (len > 4 ? 4 : len), byte_order, tmp);
|
|
len -= 4;
|
|
valbuf += 4;
|
|
}
|
|
}
|
|
|
|
/* Write into appropriate registers a function return value of type
|
|
TYPE, given in virtual format. */
|
|
|
|
static void
|
|
bfin_store_return_value (struct type *type,
|
|
struct regcache *regs,
|
|
const gdb_byte *src)
|
|
{
|
|
const bfd_byte *valbuf = src;
|
|
|
|
/* Integral values greater than one word are stored in consecutive
|
|
registers starting with R0. This will always be a multiple of
|
|
the register size. */
|
|
|
|
int len = TYPE_LENGTH (type);
|
|
int regno = BFIN_R0_REGNUM;
|
|
|
|
gdb_assert (len <= 8);
|
|
|
|
while (len > 0)
|
|
{
|
|
regs->cooked_write (regno++, valbuf);
|
|
len -= 4;
|
|
valbuf += 4;
|
|
}
|
|
}
|
|
|
|
/* Determine, for architecture GDBARCH, how a return value of TYPE
|
|
should be returned. If it is supposed to be returned in registers,
|
|
and READBUF is nonzero, read the appropriate value from REGCACHE,
|
|
and copy it into READBUF. If WRITEBUF is nonzero, write the value
|
|
from WRITEBUF into REGCACHE. */
|
|
|
|
static enum return_value_convention
|
|
bfin_return_value (struct gdbarch *gdbarch,
|
|
struct value *function,
|
|
struct type *type,
|
|
struct regcache *regcache,
|
|
gdb_byte *readbuf,
|
|
const gdb_byte *writebuf)
|
|
{
|
|
if (TYPE_LENGTH (type) > 8)
|
|
return RETURN_VALUE_STRUCT_CONVENTION;
|
|
|
|
if (readbuf)
|
|
bfin_extract_return_value (type, regcache, readbuf);
|
|
|
|
if (writebuf)
|
|
bfin_store_return_value (type, regcache, writebuf);
|
|
|
|
return RETURN_VALUE_REGISTER_CONVENTION;
|
|
}
|
|
|
|
/* Return the BFIN register name corresponding to register I. */
|
|
|
|
static const char *
|
|
bfin_register_name (struct gdbarch *gdbarch, int i)
|
|
{
|
|
return bfin_register_name_strings[i];
|
|
}
|
|
|
|
static enum register_status
|
|
bfin_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache,
|
|
int regnum, gdb_byte *buffer)
|
|
{
|
|
gdb_byte buf[BFIN_MAX_REGISTER_SIZE];
|
|
enum register_status status;
|
|
|
|
if (regnum != BFIN_CC_REGNUM)
|
|
internal_error (__FILE__, __LINE__,
|
|
_("invalid register number %d"), regnum);
|
|
|
|
/* Extract the CC bit from the ASTAT register. */
|
|
status = regcache->raw_read (BFIN_ASTAT_REGNUM, buf);
|
|
if (status == REG_VALID)
|
|
{
|
|
buffer[1] = buffer[2] = buffer[3] = 0;
|
|
buffer[0] = !!(buf[0] & ASTAT_CC);
|
|
}
|
|
return status;
|
|
}
|
|
|
|
static void
|
|
bfin_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
|
|
int regnum, const gdb_byte *buffer)
|
|
{
|
|
gdb_byte buf[BFIN_MAX_REGISTER_SIZE];
|
|
|
|
if (regnum != BFIN_CC_REGNUM)
|
|
internal_error (__FILE__, __LINE__,
|
|
_("invalid register number %d"), regnum);
|
|
|
|
/* Overlay the CC bit in the ASTAT register. */
|
|
regcache->raw_read (BFIN_ASTAT_REGNUM, buf);
|
|
buf[0] = (buf[0] & ~ASTAT_CC) | ((buffer[0] & 1) << ASTAT_CC_POS);
|
|
regcache->raw_write (BFIN_ASTAT_REGNUM, buf);
|
|
}
|
|
|
|
static CORE_ADDR
|
|
bfin_frame_base_address (struct frame_info *this_frame, void **this_cache)
|
|
{
|
|
struct bfin_frame_cache *cache = bfin_frame_cache (this_frame, this_cache);
|
|
|
|
return cache->base;
|
|
}
|
|
|
|
static CORE_ADDR
|
|
bfin_frame_local_address (struct frame_info *this_frame, void **this_cache)
|
|
{
|
|
struct bfin_frame_cache *cache = bfin_frame_cache (this_frame, this_cache);
|
|
|
|
return cache->base - 4;
|
|
}
|
|
|
|
static CORE_ADDR
|
|
bfin_frame_args_address (struct frame_info *this_frame, void **this_cache)
|
|
{
|
|
struct bfin_frame_cache *cache = bfin_frame_cache (this_frame, this_cache);
|
|
|
|
return cache->base + 8;
|
|
}
|
|
|
|
static const struct frame_base bfin_frame_base =
|
|
{
|
|
&bfin_frame_unwind,
|
|
bfin_frame_base_address,
|
|
bfin_frame_local_address,
|
|
bfin_frame_args_address
|
|
};
|
|
|
|
static CORE_ADDR
|
|
bfin_frame_align (struct gdbarch *gdbarch, CORE_ADDR address)
|
|
{
|
|
return (address & ~0x3);
|
|
}
|
|
|
|
enum bfin_abi
|
|
bfin_abi (struct gdbarch *gdbarch)
|
|
{
|
|
return gdbarch_tdep (gdbarch)->bfin_abi;
|
|
}
|
|
|
|
/* Initialize the current architecture based on INFO. If possible,
|
|
re-use an architecture from ARCHES, which is a list of
|
|
architectures already created during this debugging session.
|
|
|
|
Called e.g. at program startup, when reading a core file, and when
|
|
reading a binary file. */
|
|
|
|
static struct gdbarch *
|
|
bfin_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
|
|
{
|
|
struct gdbarch_tdep *tdep;
|
|
struct gdbarch *gdbarch;
|
|
enum bfin_abi abi;
|
|
|
|
abi = BFIN_ABI_FLAT;
|
|
|
|
/* If there is already a candidate, use it. */
|
|
|
|
for (arches = gdbarch_list_lookup_by_info (arches, &info);
|
|
arches != NULL;
|
|
arches = gdbarch_list_lookup_by_info (arches->next, &info))
|
|
{
|
|
if (gdbarch_tdep (arches->gdbarch)->bfin_abi != abi)
|
|
continue;
|
|
return arches->gdbarch;
|
|
}
|
|
|
|
tdep = XCNEW (struct gdbarch_tdep);
|
|
gdbarch = gdbarch_alloc (&info, tdep);
|
|
|
|
tdep->bfin_abi = abi;
|
|
|
|
set_gdbarch_num_regs (gdbarch, BFIN_NUM_REGS);
|
|
set_gdbarch_pseudo_register_read (gdbarch, bfin_pseudo_register_read);
|
|
set_gdbarch_pseudo_register_write (gdbarch, bfin_pseudo_register_write);
|
|
set_gdbarch_num_pseudo_regs (gdbarch, BFIN_NUM_PSEUDO_REGS);
|
|
set_gdbarch_sp_regnum (gdbarch, BFIN_SP_REGNUM);
|
|
set_gdbarch_pc_regnum (gdbarch, BFIN_PC_REGNUM);
|
|
set_gdbarch_ps_regnum (gdbarch, BFIN_ASTAT_REGNUM);
|
|
set_gdbarch_dwarf2_reg_to_regnum (gdbarch, bfin_reg_to_regnum);
|
|
set_gdbarch_register_name (gdbarch, bfin_register_name);
|
|
set_gdbarch_register_type (gdbarch, bfin_register_type);
|
|
set_gdbarch_push_dummy_call (gdbarch, bfin_push_dummy_call);
|
|
set_gdbarch_believe_pcc_promotion (gdbarch, 1);
|
|
set_gdbarch_return_value (gdbarch, bfin_return_value);
|
|
set_gdbarch_skip_prologue (gdbarch, bfin_skip_prologue);
|
|
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
|
|
set_gdbarch_breakpoint_kind_from_pc (gdbarch, bfin_breakpoint_kind_from_pc);
|
|
set_gdbarch_sw_breakpoint_from_kind (gdbarch, bfin_sw_breakpoint_from_kind);
|
|
set_gdbarch_decr_pc_after_break (gdbarch, 2);
|
|
set_gdbarch_frame_args_skip (gdbarch, 8);
|
|
set_gdbarch_frame_align (gdbarch, bfin_frame_align);
|
|
|
|
/* Hook in ABI-specific overrides, if they have been registered. */
|
|
gdbarch_init_osabi (info, gdbarch);
|
|
|
|
dwarf2_append_unwinders (gdbarch);
|
|
|
|
frame_base_set_default (gdbarch, &bfin_frame_base);
|
|
|
|
frame_unwind_append_unwinder (gdbarch, &bfin_frame_unwind);
|
|
|
|
return gdbarch;
|
|
}
|
|
|
|
void
|
|
_initialize_bfin_tdep (void)
|
|
{
|
|
register_gdbarch_init (bfd_arch_bfin, bfin_gdbarch_init);
|
|
}
|