binutils-gdb/ld/testsuite/ld-arm/arm-call.d
Matthew Gretton-Dann 1f4e495053 * gas/testsuite/gas/arm/thumb-eabi.d: Add case for divided syntax encoding of movs.
* gas/testsuite/gas/arm/thumb.d: Likewise.
	* gas/testsuite/gas/arm/thumb.s: Likewise.
	* gas/testsuite/gas/arm/thumb2_it.d: Update for change in lsls/movs disassembly.
	* gas/testsuite/gas/arm/thumb2_it_auto.d: Liekwise.
	* gas/testsuite/gas/arm/thumb32.d: Likewise.
	* ld/testsuite/ld-arm/arm-call.d: Handle change in lsls/movs disassembly.
	* ld/testsuite/ld-arm/farcall-thumb-arm-short.d: Likewise.
	* ld/testsuite/ld-arm/farcall-thumb-thumb-blx-pic-veneer.d: Likewise.
	* ld/testsuite/ld-arm/farcall-thumb-thumb-blx.d: Likewise.
	* ld/testsuite/ld-arm/farcall-thumb-thumb-m-pic-veneer.d: Likewise.
	* ld/testsuite/ld-arm/farcall-thumb-thumb-m.d: Likewise.
	* ld/testsuite/ld-arm/farcall-thumb-thumb-pic-veneer.d: Likewise.
	* ld/testsuite/ld-arm/farcall-thumb-thumb.d: Likewise.
	* ld/testsuite/ld-arm/thumb2-bl-as-thumb1-bad-noeabi.d: Likewise.
	* ld/testsuite/ld-arm/thumb2-bl-as-thumb1-bad.d: Likewise.
	* ld/testsuite/ld-arm/thumb2-bl-bad-noeabi.d: Likewise.
	* ld/testsuite/ld-arm/thumb2-bl-bad.d: Likewise.
	* opcodes/arm-dis.c (thumb-opcodes): Add disassembly for movs.
2010-06-07 10:43:52 +00:00

59 lines
1.4 KiB
Makefile

.*: file format.*
Disassembly of section .text:
00008000 <_start>:
8000: eb00000d bl 803c <arm>
8004: fa00000d blx 8040 <t1>
8008: fb00000c blx 8042 <t2>
800c: fb00000d blx 804a <t5>
8010: fa00000a blx 8040 <t1>
8014: fb000009 blx 8042 <t2>
8018: ea000010 b 8060 <__t1_from_arm>
801c: ea000011 b 8068 <__t2_from_arm>
8020: 1b00000e blne 8060 <__t1_from_arm>
8024: 1b00000f blne 8068 <__t2_from_arm>
8028: 1b000003 blne 803c <arm>
802c: eb000002 bl 803c <arm>
8030: faffffff blx 8034 <thumblocal>
00008034 <thumblocal>:
8034: 4770 bx lr
00008036 <t3>:
8036: 4770 bx lr
00008038 <t4>:
8038: 4770 bx lr
803a: 46c0 nop ; \(mov r8, r8\)
0000803c <arm>:
803c: e12fff1e bx lr
00008040 <t1>:
8040: 4770 bx lr
00008042 <t2>:
8042: f7ff fff8 bl 8036 <t3>
8046: f7ff fff7 bl 8038 <t4>
0000804a <t5>:
804a: f000 f801 bl 8050 <local_thumb>
804e: 46c0 nop ; \(mov r8, r8\)
00008050 <local_thumb>:
8050: f7ff fff1 bl 8036 <t3>
8054: f7ff efd4 blx 8000 <_start>
8058: f7ff efd2 blx 8000 <_start>
805c: 0000 movs r0, r0
...
00008060 <__t1_from_arm>:
8060: e51ff004 ldr pc, \[pc, #-4\] ; 8064 <__t1_from_arm\+0x4>
8064: 00008041 .word 0x00008041
00008068 <__t2_from_arm>:
8068: e51ff004 ldr pc, \[pc, #-4\] ; 806c <__t2_from_arm\+0x4>
806c: 00008043 .word 0x00008043