mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-11-21 01:12:32 +08:00
be3e27bb55
Extends commit 898ade12ee to cover other targets.
* elf32-arm.c (elf32_arm_nabi_write_core_note): Disable
-Wstringop-truncation warning for gcc-8.0 too.
* elf32-ppc.c (ppc_elf_write_core_note): Likewise.
* elf64-ppc.c (ppc64_elf_write_core_note): Likewise.
* elfxx-aarch64.c (_bfd_aarch64_elf_write_core_note): Likewise.
* elf32-s390.c (elf_s390_write_core_note): Comment fix.
* elf64-s390.c (elf_s390_write_core_note): Likewise.
684 lines
21 KiB
C
684 lines
21 KiB
C
/* AArch64-specific support for ELF.
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Copyright (C) 2009-2018 Free Software Foundation, Inc.
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Contributed by ARM Ltd.
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This file is part of BFD, the Binary File Descriptor library.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; see the file COPYING3. If not,
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see <http://www.gnu.org/licenses/>. */
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#include "sysdep.h"
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#include "elfxx-aarch64.h"
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#include <stdarg.h>
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#include <string.h>
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#define MASK(n) ((1u << (n)) - 1)
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/* Sign-extend VALUE, which has the indicated number of BITS. */
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bfd_signed_vma
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_bfd_aarch64_sign_extend (bfd_vma value, int bits)
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{
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if (value & ((bfd_vma) 1 << (bits - 1)))
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/* VALUE is negative. */
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value |= ((bfd_vma) - 1) << bits;
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return value;
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}
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/* Decode the IMM field of ADRP. */
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uint32_t
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_bfd_aarch64_decode_adrp_imm (uint32_t insn)
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{
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return (((insn >> 5) & MASK (19)) << 2) | ((insn >> 29) & MASK (2));
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}
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/* Reencode the imm field of add immediate. */
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static inline uint32_t
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reencode_add_imm (uint32_t insn, uint32_t imm)
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{
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return (insn & ~(MASK (12) << 10)) | ((imm & MASK (12)) << 10);
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}
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/* Reencode the IMM field of ADR. */
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uint32_t
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_bfd_aarch64_reencode_adr_imm (uint32_t insn, uint32_t imm)
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{
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return (insn & ~((MASK (2) << 29) | (MASK (19) << 5)))
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| ((imm & MASK (2)) << 29) | ((imm & (MASK (19) << 2)) << 3);
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}
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/* Reencode the imm field of ld/st pos immediate. */
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static inline uint32_t
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reencode_ldst_pos_imm (uint32_t insn, uint32_t imm)
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{
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return (insn & ~(MASK (12) << 10)) | ((imm & MASK (12)) << 10);
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}
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/* Encode the 26-bit offset of unconditional branch. */
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static inline uint32_t
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reencode_branch_ofs_26 (uint32_t insn, uint32_t ofs)
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{
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return (insn & ~MASK (26)) | (ofs & MASK (26));
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}
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/* Encode the 19-bit offset of conditional branch and compare & branch. */
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static inline uint32_t
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reencode_cond_branch_ofs_19 (uint32_t insn, uint32_t ofs)
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{
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return (insn & ~(MASK (19) << 5)) | ((ofs & MASK (19)) << 5);
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}
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/* Decode the 19-bit offset of load literal. */
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static inline uint32_t
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reencode_ld_lit_ofs_19 (uint32_t insn, uint32_t ofs)
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{
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return (insn & ~(MASK (19) << 5)) | ((ofs & MASK (19)) << 5);
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}
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/* Encode the 14-bit offset of test & branch. */
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static inline uint32_t
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reencode_tst_branch_ofs_14 (uint32_t insn, uint32_t ofs)
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{
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return (insn & ~(MASK (14) << 5)) | ((ofs & MASK (14)) << 5);
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}
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/* Reencode the imm field of move wide. */
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static inline uint32_t
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reencode_movw_imm (uint32_t insn, uint32_t imm)
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{
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return (insn & ~(MASK (16) << 5)) | ((imm & MASK (16)) << 5);
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}
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/* Reencode mov[zn] to movz. */
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static inline uint32_t
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reencode_movzn_to_movz (uint32_t opcode)
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{
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return opcode | (1 << 30);
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}
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/* Reencode mov[zn] to movn. */
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static inline uint32_t
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reencode_movzn_to_movn (uint32_t opcode)
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{
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return opcode & ~(1 << 30);
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}
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/* Return non-zero if the indicated VALUE has overflowed the maximum
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range expressible by a unsigned number with the indicated number of
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BITS. */
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static bfd_reloc_status_type
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aarch64_unsigned_overflow (bfd_vma value, unsigned int bits)
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{
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bfd_vma lim;
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if (bits >= sizeof (bfd_vma) * 8)
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return bfd_reloc_ok;
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lim = (bfd_vma) 1 << bits;
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if (value >= lim)
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return bfd_reloc_overflow;
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return bfd_reloc_ok;
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}
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/* Return non-zero if the indicated VALUE has overflowed the maximum
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range expressible by an signed number with the indicated number of
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BITS. */
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static bfd_reloc_status_type
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aarch64_signed_overflow (bfd_vma value, unsigned int bits)
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{
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bfd_signed_vma svalue = (bfd_signed_vma) value;
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bfd_signed_vma lim;
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if (bits >= sizeof (bfd_vma) * 8)
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return bfd_reloc_ok;
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lim = (bfd_signed_vma) 1 << (bits - 1);
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if (svalue < -lim || svalue >= lim)
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return bfd_reloc_overflow;
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return bfd_reloc_ok;
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}
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/* Insert the addend/value into the instruction or data object being
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relocated. */
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bfd_reloc_status_type
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_bfd_aarch64_elf_put_addend (bfd *abfd,
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bfd_byte *address, bfd_reloc_code_real_type r_type,
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reloc_howto_type *howto, bfd_signed_vma addend)
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{
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bfd_reloc_status_type status = bfd_reloc_ok;
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bfd_signed_vma old_addend = addend;
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bfd_vma contents;
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int size;
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size = bfd_get_reloc_size (howto);
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switch (size)
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{
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case 0:
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return status;
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case 2:
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contents = bfd_get_16 (abfd, address);
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break;
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case 4:
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if (howto->src_mask != 0xffffffff)
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/* Must be 32-bit instruction, always little-endian. */
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contents = bfd_getl32 (address);
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else
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/* Must be 32-bit data (endianness dependent). */
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contents = bfd_get_32 (abfd, address);
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break;
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case 8:
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contents = bfd_get_64 (abfd, address);
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break;
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default:
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abort ();
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}
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switch (howto->complain_on_overflow)
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{
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case complain_overflow_dont:
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break;
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case complain_overflow_signed:
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status = aarch64_signed_overflow (addend,
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howto->bitsize + howto->rightshift);
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break;
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case complain_overflow_unsigned:
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status = aarch64_unsigned_overflow (addend,
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howto->bitsize + howto->rightshift);
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break;
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case complain_overflow_bitfield:
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default:
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abort ();
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}
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addend >>= howto->rightshift;
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switch (r_type)
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{
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case BFD_RELOC_AARCH64_CALL26:
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case BFD_RELOC_AARCH64_JUMP26:
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contents = reencode_branch_ofs_26 (contents, addend);
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break;
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case BFD_RELOC_AARCH64_BRANCH19:
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contents = reencode_cond_branch_ofs_19 (contents, addend);
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break;
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case BFD_RELOC_AARCH64_TSTBR14:
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contents = reencode_tst_branch_ofs_14 (contents, addend);
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break;
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case BFD_RELOC_AARCH64_GOT_LD_PREL19:
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case BFD_RELOC_AARCH64_LD_LO19_PCREL:
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case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
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case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
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if (old_addend & ((1 << howto->rightshift) - 1))
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return bfd_reloc_overflow;
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contents = reencode_ld_lit_ofs_19 (contents, addend);
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break;
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case BFD_RELOC_AARCH64_TLSDESC_CALL:
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break;
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case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
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case BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL:
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case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
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case BFD_RELOC_AARCH64_ADR_LO21_PCREL:
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case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
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case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
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case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
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case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
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case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
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case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
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case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
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contents = _bfd_aarch64_reencode_adr_imm (contents, addend);
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break;
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case BFD_RELOC_AARCH64_ADD_LO12:
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case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12:
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case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
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case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12:
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case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
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case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC:
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case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
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case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12:
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case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12:
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case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
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/* Corresponds to: add rd, rn, #uimm12 to provide the low order
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12 bits of the page offset following
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BFD_RELOC_AARCH64_ADR_HI21_PCREL which computes the
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(pc-relative) page base. */
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contents = reencode_add_imm (contents, addend);
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break;
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case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14:
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case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
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case BFD_RELOC_AARCH64_LD64_GOTOFF_LO15:
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case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15:
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case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
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case BFD_RELOC_AARCH64_LDST128_LO12:
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case BFD_RELOC_AARCH64_LDST16_LO12:
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case BFD_RELOC_AARCH64_LDST32_LO12:
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case BFD_RELOC_AARCH64_LDST64_LO12:
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case BFD_RELOC_AARCH64_LDST8_LO12:
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case BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC:
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case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12:
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case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
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case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
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case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12:
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case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC:
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case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12:
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case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC:
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case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12:
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case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC:
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case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12:
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case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC:
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case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12:
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case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC:
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case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12:
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case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC:
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case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12:
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case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC:
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case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12:
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case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC:
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if (old_addend & ((1 << howto->rightshift) - 1))
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return bfd_reloc_overflow;
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/* Used for ldr*|str* rt, [rn, #uimm12] to provide the low order
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12 bits address offset. */
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contents = reencode_ldst_pos_imm (contents, addend);
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break;
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/* Group relocations to create high bits of a 16, 32, 48 or 64
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bit signed data or abs address inline. Will change
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instruction to MOVN or MOVZ depending on sign of calculated
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value. */
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case BFD_RELOC_AARCH64_MOVW_G0_S:
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case BFD_RELOC_AARCH64_MOVW_G1_S:
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case BFD_RELOC_AARCH64_MOVW_G2_S:
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case BFD_RELOC_AARCH64_MOVW_PREL_G0:
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case BFD_RELOC_AARCH64_MOVW_PREL_G1:
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case BFD_RELOC_AARCH64_MOVW_PREL_G2:
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case BFD_RELOC_AARCH64_MOVW_PREL_G3:
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case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
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case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
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case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2:
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case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0:
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case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1:
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case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2:
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/* NOTE: We can only come here with movz or movn. */
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if (addend < 0)
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{
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/* Force use of MOVN. */
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addend = ~addend;
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contents = reencode_movzn_to_movn (contents);
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}
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else
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{
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/* Force use of MOVZ. */
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contents = reencode_movzn_to_movz (contents);
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}
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/* Fall through. */
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/* Group relocations to create a 16, 32, 48 or 64 bit unsigned
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data or abs address inline. */
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case BFD_RELOC_AARCH64_MOVW_G0:
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case BFD_RELOC_AARCH64_MOVW_G0_NC:
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case BFD_RELOC_AARCH64_MOVW_G1:
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case BFD_RELOC_AARCH64_MOVW_G1_NC:
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case BFD_RELOC_AARCH64_MOVW_G2:
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case BFD_RELOC_AARCH64_MOVW_G2_NC:
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case BFD_RELOC_AARCH64_MOVW_G3:
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case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
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case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
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case BFD_RELOC_AARCH64_MOVW_PREL_G0_NC:
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case BFD_RELOC_AARCH64_MOVW_PREL_G1_NC:
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case BFD_RELOC_AARCH64_MOVW_PREL_G2_NC:
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case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
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case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
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case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
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case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
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case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC:
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case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1:
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case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC:
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case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC:
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case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC:
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case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC:
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contents = reencode_movw_imm (contents, addend);
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break;
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default:
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/* Repack simple data */
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if (howto->dst_mask & (howto->dst_mask + 1))
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return bfd_reloc_notsupported;
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contents = ((contents & ~howto->dst_mask) | (addend & howto->dst_mask));
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break;
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}
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switch (size)
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{
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case 2:
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bfd_put_16 (abfd, contents, address);
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break;
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case 4:
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if (howto->dst_mask != 0xffffffff)
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/* must be 32-bit instruction, always little-endian */
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bfd_putl32 (contents, address);
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else
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/* must be 32-bit data (endianness dependent) */
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bfd_put_32 (abfd, contents, address);
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break;
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case 8:
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bfd_put_64 (abfd, contents, address);
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break;
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default:
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abort ();
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}
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return status;
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}
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bfd_vma
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_bfd_aarch64_elf_resolve_relocation (bfd_reloc_code_real_type r_type,
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bfd_vma place, bfd_vma value,
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bfd_vma addend, bfd_boolean weak_undef_p)
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{
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switch (r_type)
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{
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case BFD_RELOC_AARCH64_NONE:
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case BFD_RELOC_AARCH64_TLSDESC_CALL:
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break;
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case BFD_RELOC_AARCH64_16_PCREL:
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case BFD_RELOC_AARCH64_32_PCREL:
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case BFD_RELOC_AARCH64_64_PCREL:
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case BFD_RELOC_AARCH64_ADR_LO21_PCREL:
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case BFD_RELOC_AARCH64_BRANCH19:
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case BFD_RELOC_AARCH64_LD_LO19_PCREL:
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case BFD_RELOC_AARCH64_MOVW_PREL_G0:
|
|
case BFD_RELOC_AARCH64_MOVW_PREL_G0_NC:
|
|
case BFD_RELOC_AARCH64_MOVW_PREL_G1:
|
|
case BFD_RELOC_AARCH64_MOVW_PREL_G1_NC:
|
|
case BFD_RELOC_AARCH64_MOVW_PREL_G2:
|
|
case BFD_RELOC_AARCH64_MOVW_PREL_G2_NC:
|
|
case BFD_RELOC_AARCH64_MOVW_PREL_G3:
|
|
case BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21:
|
|
case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
|
|
case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
|
|
case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
|
|
case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
|
|
case BFD_RELOC_AARCH64_TSTBR14:
|
|
if (weak_undef_p)
|
|
value = place;
|
|
value = value + addend - place;
|
|
break;
|
|
|
|
case BFD_RELOC_AARCH64_CALL26:
|
|
case BFD_RELOC_AARCH64_JUMP26:
|
|
value = value + addend - place;
|
|
break;
|
|
|
|
case BFD_RELOC_AARCH64_16:
|
|
case BFD_RELOC_AARCH64_32:
|
|
case BFD_RELOC_AARCH64_MOVW_G0:
|
|
case BFD_RELOC_AARCH64_MOVW_G0_NC:
|
|
case BFD_RELOC_AARCH64_MOVW_G0_S:
|
|
case BFD_RELOC_AARCH64_MOVW_G1:
|
|
case BFD_RELOC_AARCH64_MOVW_G1_NC:
|
|
case BFD_RELOC_AARCH64_MOVW_G1_S:
|
|
case BFD_RELOC_AARCH64_MOVW_G2:
|
|
case BFD_RELOC_AARCH64_MOVW_G2_NC:
|
|
case BFD_RELOC_AARCH64_MOVW_G2_S:
|
|
case BFD_RELOC_AARCH64_MOVW_G3:
|
|
case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
|
|
case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
|
|
case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
|
|
case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
|
|
case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12:
|
|
case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
|
|
case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC:
|
|
case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12:
|
|
case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12:
|
|
case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12:
|
|
case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12:
|
|
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
|
|
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC:
|
|
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
|
|
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC:
|
|
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2:
|
|
case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12:
|
|
case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12:
|
|
case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12:
|
|
case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12:
|
|
value = value + addend;
|
|
break;
|
|
|
|
case BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL:
|
|
case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
|
|
if (weak_undef_p)
|
|
value = PG (place);
|
|
value = PG (value + addend) - PG (place);
|
|
break;
|
|
|
|
case BFD_RELOC_AARCH64_GOT_LD_PREL19:
|
|
value = value + addend - place;
|
|
break;
|
|
|
|
case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
|
|
case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
|
|
case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
|
|
case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
|
|
case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
|
|
value = PG (value + addend) - PG (place);
|
|
break;
|
|
|
|
/* Caller must make sure addend is the base address of .got section. */
|
|
case BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14:
|
|
case BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15:
|
|
addend = PG (addend);
|
|
/* Fall through. */
|
|
case BFD_RELOC_AARCH64_LD64_GOTOFF_LO15:
|
|
case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
|
|
case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
|
|
value = value - addend;
|
|
break;
|
|
|
|
case BFD_RELOC_AARCH64_ADD_LO12:
|
|
case BFD_RELOC_AARCH64_LD32_GOT_LO12_NC:
|
|
case BFD_RELOC_AARCH64_LD64_GOT_LO12_NC:
|
|
case BFD_RELOC_AARCH64_LDST128_LO12:
|
|
case BFD_RELOC_AARCH64_LDST16_LO12:
|
|
case BFD_RELOC_AARCH64_LDST32_LO12:
|
|
case BFD_RELOC_AARCH64_LDST64_LO12:
|
|
case BFD_RELOC_AARCH64_LDST8_LO12:
|
|
case BFD_RELOC_AARCH64_TLSDESC_ADD:
|
|
case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12:
|
|
case BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC:
|
|
case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12:
|
|
case BFD_RELOC_AARCH64_TLSDESC_LDR:
|
|
case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
|
|
case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
|
|
case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
|
|
case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC:
|
|
case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC:
|
|
case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC:
|
|
case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC:
|
|
case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
|
|
case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC:
|
|
case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC:
|
|
case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC:
|
|
case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC:
|
|
value = PG_OFFSET (value + addend);
|
|
break;
|
|
|
|
case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12:
|
|
value = value + addend;
|
|
break;
|
|
|
|
case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1:
|
|
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1:
|
|
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC:
|
|
value = (value + addend) & (bfd_vma) 0xffff0000;
|
|
break;
|
|
case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12:
|
|
/* Mask off low 12bits, keep all other high bits, so that the later
|
|
generic code could check whehter there is overflow. */
|
|
value = (value + addend) & ~(bfd_vma) 0xfff;
|
|
break;
|
|
|
|
case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC:
|
|
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0:
|
|
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC:
|
|
value = (value + addend) & (bfd_vma) 0xffff;
|
|
break;
|
|
|
|
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2:
|
|
value = (value + addend) & ~(bfd_vma) 0xffffffff;
|
|
value -= place & ~(bfd_vma) 0xffffffff;
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
|
|
return value;
|
|
}
|
|
|
|
/* Support for core dump NOTE sections. */
|
|
|
|
bfd_boolean
|
|
_bfd_aarch64_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
|
|
{
|
|
int offset;
|
|
size_t size;
|
|
|
|
switch (note->descsz)
|
|
{
|
|
default:
|
|
return FALSE;
|
|
|
|
case 392: /* sizeof(struct elf_prstatus) on Linux/arm64. */
|
|
/* pr_cursig */
|
|
elf_tdata (abfd)->core->signal
|
|
= bfd_get_16 (abfd, note->descdata + 12);
|
|
|
|
/* pr_pid */
|
|
elf_tdata (abfd)->core->lwpid
|
|
= bfd_get_32 (abfd, note->descdata + 32);
|
|
|
|
/* pr_reg */
|
|
offset = 112;
|
|
size = 272;
|
|
|
|
break;
|
|
}
|
|
|
|
/* Make a ".reg/999" section. */
|
|
return _bfd_elfcore_make_pseudosection (abfd, ".reg",
|
|
size, note->descpos + offset);
|
|
}
|
|
|
|
bfd_boolean
|
|
_bfd_aarch64_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
|
|
{
|
|
switch (note->descsz)
|
|
{
|
|
default:
|
|
return FALSE;
|
|
|
|
case 136: /* This is sizeof(struct elf_prpsinfo) on Linux/aarch64. */
|
|
elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
|
|
elf_tdata (abfd)->core->program
|
|
= _bfd_elfcore_strndup (abfd, note->descdata + 40, 16);
|
|
elf_tdata (abfd)->core->command
|
|
= _bfd_elfcore_strndup (abfd, note->descdata + 56, 80);
|
|
}
|
|
|
|
/* Note that for some reason, a spurious space is tacked
|
|
onto the end of the args in some (at least one anyway)
|
|
implementations, so strip it off if it exists. */
|
|
|
|
{
|
|
char *command = elf_tdata (abfd)->core->command;
|
|
int n = strlen (command);
|
|
|
|
if (0 < n && command[n - 1] == ' ')
|
|
command[n - 1] = '\0';
|
|
}
|
|
|
|
return TRUE;
|
|
}
|
|
|
|
char *
|
|
_bfd_aarch64_elf_write_core_note (bfd *abfd, char *buf, int *bufsiz, int note_type,
|
|
...)
|
|
{
|
|
switch (note_type)
|
|
{
|
|
default:
|
|
return NULL;
|
|
|
|
case NT_PRPSINFO:
|
|
{
|
|
char data[136] ATTRIBUTE_NONSTRING;
|
|
va_list ap;
|
|
|
|
va_start (ap, note_type);
|
|
memset (data, 0, sizeof (data));
|
|
strncpy (data + 40, va_arg (ap, const char *), 16);
|
|
#if GCC_VERSION == 8000 || GCC_VERSION == 8001
|
|
DIAGNOSTIC_PUSH;
|
|
/* GCC 8.0 and 8.1 warn about 80 equals destination size with
|
|
-Wstringop-truncation:
|
|
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85643
|
|
*/
|
|
DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION;
|
|
#endif
|
|
strncpy (data + 56, va_arg (ap, const char *), 80);
|
|
#if GCC_VERSION == 8000 || GCC_VERSION == 8001
|
|
DIAGNOSTIC_POP;
|
|
#endif
|
|
va_end (ap);
|
|
|
|
return elfcore_write_note (abfd, buf, bufsiz, "CORE",
|
|
note_type, data, sizeof (data));
|
|
}
|
|
|
|
case NT_PRSTATUS:
|
|
{
|
|
char data[392];
|
|
va_list ap;
|
|
long pid;
|
|
int cursig;
|
|
const void *greg;
|
|
|
|
va_start (ap, note_type);
|
|
memset (data, 0, sizeof (data));
|
|
pid = va_arg (ap, long);
|
|
bfd_put_32 (abfd, pid, data + 32);
|
|
cursig = va_arg (ap, int);
|
|
bfd_put_16 (abfd, cursig, data + 12);
|
|
greg = va_arg (ap, const void *);
|
|
memcpy (data + 112, greg, 272);
|
|
va_end (ap);
|
|
|
|
return elfcore_write_note (abfd, buf, bufsiz, "CORE",
|
|
note_type, data, sizeof (data));
|
|
}
|
|
}
|
|
}
|